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//! USB OTG peripherals
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//!
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//! Requires the `usb_hs` feature.
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- //!
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- //! Note that only full-speed mode is supported,
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- //! external high-speed PHY is not supported.
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use crate :: rcc;
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use crate :: stm32;
@@ -12,9 +9,15 @@ use crate::gpio::{
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gpioa:: { PA11 , PA12 } ,
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Alternate , AF10 ,
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} ;
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+
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#[ cfg( not( feature = "rm0455" ) ) ]
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use crate :: gpio:: {
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- gpiob:: { PB14 , PB15 } ,
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+ gpioa:: { PA3 , PA5 } ,
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+ gpiob:: { PB0 , PB1 , PB10 , PB11 , PB12 , PB13 , PB14 , PB15 , PB5 } ,
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+ gpioc:: PC0 ,
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+ gpioc:: { PC2 , PC3 } ,
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+ gpioh:: PH4 ,
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+ gpioi:: PI11 ,
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AF12 ,
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} ;
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@@ -33,6 +36,7 @@ pub struct USB1 {
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pub prec : rcc:: rec:: Usb1Otg ,
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pub hclk : Hertz ,
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}
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+
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#[ cfg( not( feature = "rm0455" ) ) ]
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pub struct USB2 {
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pub usb_global : stm32:: OTG2_HS_GLOBAL ,
@@ -64,7 +68,6 @@ macro_rules! usb_peripheral {
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const HIGH_SPEED : bool = true ;
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const FIFO_DEPTH_WORDS : usize = 1024 ;
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-
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const ENDPOINT_COUNT : usize = 9 ;
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fn enable( ) {
@@ -106,3 +109,102 @@ usb_peripheral! {
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}
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#[ cfg( not( feature = "rm0455" ) ) ]
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pub type Usb2BusType = UsbBus < USB2 > ;
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+
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+ #[ cfg( not( feature = "rm0455" ) ) ]
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+ pub struct USB1_ULPI {
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+ pub usb_global : stm32:: OTG1_HS_GLOBAL ,
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+ pub usb_device : stm32:: OTG1_HS_DEVICE ,
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+ pub usb_pwrclk : stm32:: OTG1_HS_PWRCLK ,
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+ pub prec : rcc:: rec:: Usb1Otg ,
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+ pub hclk : Hertz ,
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+ pub ulpi_clk : PA5 < Alternate < AF10 > > ,
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+ pub ulpi_dir : Usb1UlpiDirPin ,
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+ pub ulpi_nxt : Usb1UlpiNxtPin ,
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+ pub ulpi_stp : PC0 < Alternate < AF10 > > ,
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+ pub ulpi_d0 : PA3 < Alternate < AF10 > > ,
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+ pub ulpi_d1 : PB0 < Alternate < AF10 > > ,
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+ pub ulpi_d2 : PB1 < Alternate < AF10 > > ,
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+ pub ulpi_d3 : PB10 < Alternate < AF10 > > ,
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+ pub ulpi_d4 : PB11 < Alternate < AF10 > > ,
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+ pub ulpi_d5 : PB12 < Alternate < AF10 > > ,
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+ pub ulpi_d6 : PB13 < Alternate < AF10 > > ,
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+ pub ulpi_d7 : PB5 < Alternate < AF10 > > ,
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+ }
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+
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+ #[ cfg( not( feature = "rm0455" ) ) ]
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+ pub enum Usb1UlpiDirPin {
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+ PC2 ( PC2 < Alternate < AF10 > > ) ,
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+ PI11 ( PI11 < Alternate < AF10 > > ) ,
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+ }
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+
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+ #[ cfg( not( feature = "rm0455" ) ) ]
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+ impl From < PI11 < Alternate < AF10 > > > for Usb1UlpiDirPin {
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+ fn from ( v : PI11 < Alternate < AF10 > > ) -> Self {
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+ Usb1UlpiDirPin :: PI11 ( v)
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+ }
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+ }
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+
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+ #[ cfg( not( feature = "rm0455" ) ) ]
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+ impl From < PC2 < Alternate < AF10 > > > for Usb1UlpiDirPin {
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+ fn from ( v : PC2 < Alternate < AF10 > > ) -> Self {
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+ Usb1UlpiDirPin :: PC2 ( v)
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+ }
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+ }
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+
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+ #[ cfg( not( feature = "rm0455" ) ) ]
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+ pub enum Usb1UlpiNxtPin {
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+ PC3 ( PC3 < Alternate < AF10 > > ) ,
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+ PH4 ( PH4 < Alternate < AF10 > > ) ,
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+ }
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+
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+ #[ cfg( not( feature = "rm0455" ) ) ]
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+ impl From < PH4 < Alternate < AF10 > > > for Usb1UlpiNxtPin {
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+ fn from ( v : PH4 < Alternate < AF10 > > ) -> Self {
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+ Usb1UlpiNxtPin :: PH4 ( v)
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+ }
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+ }
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+
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+ #[ cfg( not( feature = "rm0455" ) ) ]
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+ impl From < PC3 < Alternate < AF10 > > > for Usb1UlpiNxtPin {
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+ fn from ( v : PC3 < Alternate < AF10 > > ) -> Self {
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+ Usb1UlpiNxtPin :: PC3 ( v)
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+ }
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+ }
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+
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+ #[ cfg( not( feature = "rm0455" ) ) ]
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+ unsafe impl Sync for USB1_ULPI { }
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+
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+ #[ cfg( not( feature = "rm0455" ) ) ]
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+ unsafe impl UsbPeripheral for USB1_ULPI {
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+ const REGISTERS : * const ( ) = stm32:: OTG1_HS_GLOBAL :: ptr ( ) as * const ( ) ;
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+
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+ const HIGH_SPEED : bool = true ;
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+ const FIFO_DEPTH_WORDS : usize = 1024 ;
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+ const ENDPOINT_COUNT : usize = 9 ;
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+
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+ fn enable ( ) {
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+ let rcc = unsafe { & * stm32:: RCC :: ptr ( ) } ;
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+
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+ cortex_m:: interrupt:: free ( |_| {
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+ // Enable USB peripheral
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+ rcc. ahb1enr . modify ( |_, w| w. usb1otgen ( ) . enabled ( ) ) ;
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+
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+ // Enable ULPI Clock
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+ rcc. ahb1enr . modify ( |_, w| w. usb1ulpien ( ) . enabled ( ) ) ;
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+
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+ // Reset USB peripheral
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+ rcc. ahb1rstr . modify ( |_, w| w. usb1otgrst ( ) . set_bit ( ) ) ;
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+ rcc. ahb1rstr . modify ( |_, w| w. usb1otgrst ( ) . clear_bit ( ) ) ;
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+ } ) ;
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+ }
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+
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+ fn ahb_frequency_hz ( & self ) -> u32 {
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+ self . hclk . 0
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+ }
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+
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+ fn phy_type ( & self ) -> synopsys_usb_otg:: PhyType {
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+ synopsys_usb_otg:: PhyType :: ExternalHighSpeed
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+ }
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+ }
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+ #[ cfg( not( feature = "rm0455" ) ) ]
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+ pub type Usb1UlpiBusType = UsbBus < USB1_ULPI > ;
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