Fixed a few clippy complaints

Signed-off-by: Daniel Egger <[email protected]>

Author: therealprof

src/adc.rs

@@ -18,16 +18,9 @@ const VTEMPCAL110: *const u16 = 0x1FFF_7A2E as *const u16;
 
 */
 
-use core::{ ptr, fmt };
-use embedded_hal::adc::{
-    Channel,
-    OneShot,
-};
-use crate::{
-    stm32,
-    gpio::*,
-    signature::VrefCal,
-};
+use crate::{gpio::*, signature::VrefCal, stm32};
+use core::fmt;
+use embedded_hal::adc::{Channel, OneShot};
 
 /// Vref internal signal, used for calibration
 pub struct Vref;
@@ -317,7 +310,7 @@ pub mod config {
         /// Right align output data
         Right,
         /// Left align output data
-        Left
+        Left,
     }
     impl From<Align> for bool {
         fn from(a: Align) -> bool {
@@ -422,7 +415,11 @@ pub mod config {
             self
         }
         /// change the external_trigger field
-        pub fn external_trigger(mut self, trigger_mode: TriggerMode, trigger: ExternalTrigger) -> Self {
+        pub fn external_trigger(
+            mut self,
+            trigger_mode: TriggerMode,
+            trigger: ExternalTrigger,
+        ) -> Self {
             self.external_trigger = (trigger_mode, trigger);
             self
         }
@@ -618,7 +615,11 @@ pub struct Adc<ADC> {
 }
 impl<ADC> fmt::Debug for Adc<ADC> {
     fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        write!(f, "Adc: {{ calibrated_vdda: {:?}, max_sample: {:?}, config: {:?}, ... }}", self.calibrated_vdda, self.max_sample, self.config)
+        write!(
+            f,
+            "Adc: {{ calibrated_vdda: {:?}, max_sample: {:?}, config: {:?}, ... }}",
+            self.calibrated_vdda, self.max_sample, self.config
+        )
     }
 }
 
@@ -1063,8 +1064,6 @@ adc!(ADC2 => (adc2, ADC_COMMON, apb2enr, adc2en, apb2rstr, adcrst));
 ))]
 adc!(ADC3 => (adc3, ADC_COMMON, apb2enr, adc3en, apb2rstr, adcrst));
 
-
-
 #[cfg(feature = "stm32f401")]
 adc_pins!(
     gpioa::PA0<Analog> => (ADC1, 0),

src/rcc.rs

@@ -265,7 +265,7 @@ impl CFGR {
         ))]
         let (pclk1_max, pclk2_max) = (50_000_000, 100_000_000);
 
-        let pclk1 = self.pclk1.unwrap_or(core::cmp::min(pclk1_max, hclk));
+        let pclk1 = self.pclk1.unwrap_or_else(|| core::cmp::min(pclk1_max, hclk));
         let (ppre1_bits, ppre1) = match (hclk + pclk1 - 1) / pclk1 {
             0 => unreachable!(),
             1 => (0b000, 1),
@@ -276,11 +276,11 @@ impl CFGR {
         };
 
         // Calculate real APB1 clock
-        let pclk1 = hclk / ppre1 as u32;
+        let pclk1 = hclk / u32::from(ppre1);
 
         assert!(pclk1 <= pclk1_max);
 
-        let pclk2 = self.pclk2.unwrap_or(core::cmp::min(pclk2_max, hclk));
+        let pclk2 = self.pclk2.unwrap_or_else(|| core::cmp::min(pclk2_max, hclk));
         let (ppre2_bits, ppre2) = match (hclk + pclk2 - 1) / pclk2 {
             0 => unreachable!(),
             1 => (0b000, 1),
@@ -291,7 +291,7 @@ impl CFGR {
         };
 
         // Calculate real APB2 clock
-        let pclk2 = hclk / ppre2 as u32;
+        let pclk2 = hclk / u32::from(ppre2);
 
         assert!(pclk2 <= pclk2_max);
 

src/serial.rs

@@ -1953,7 +1953,7 @@ where
     fn write_str(&mut self, s: &str) -> fmt::Result {
         let _ = s
             .as_bytes()
-            .into_iter()
+            .iter()
             .map(|c| block!(self.write(*c)))
             .last();
         Ok(())

src/signature.rs

@@ -42,7 +42,7 @@ impl Uid {
 
     /// Wafer number
     pub fn waf_num(&self) -> u8 {
-        self.waf_lot[0].into()
+        self.waf_lot[0]
     }
 
     /// Lot number