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author
oclyke
committed
trying to mirror the PR changes from #31
trying to match #31. it is too bad we have to do this manually...
1 parent 95ecbd0 commit 1e8f3b9

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3 files changed

+147
-114
lines changed

3 files changed

+147
-114
lines changed

targets/TARGET_Ambiq_Micro/TARGET_Apollo3/device/serial_api.c

+51-112
Original file line numberDiff line numberDiff line change
@@ -118,7 +118,6 @@ void uart_configure_pin_function(PinName pin, UARTName uart, const PinMap *map);
118118
*/
119119

120120
void serial_init(serial_t *obj, PinName tx, PinName rx) {
121-
//TODO: we should be able to call this multiple times
122121
// determine the UART to use
123122
UARTName uart_tx = (UARTName)pinmap_peripheral(tx, serial_tx_pinmap());
124123
UARTName uart_rx = (UARTName)pinmap_peripheral(rx, serial_rx_pinmap());
@@ -127,41 +126,41 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
127126
obj->serial.uart_control = &ap3_uart_control[uart];
128127
obj->serial.uart_control->inst = uart;
129128

130-
// ensure that HAL queueing is disabled (we want to use the FIFOs directly)
131-
obj->serial.uart_control->cfg.pui8RxBuffer = NULL;
132-
obj->serial.uart_control->cfg.pui8TxBuffer = NULL;
133-
obj->serial.uart_control->cfg.ui32RxBufferSize = 0;
134-
obj->serial.uart_control->cfg.ui32TxBufferSize = 0;
135-
136-
// memset(obj->serial.uart_control->cfg, 0x00, sizeof(am_hal_uart_config_t)); // ensure config begins zeroed
137-
138129
// config uart pins
139130
pinmap_config(tx, serial_tx_pinmap());
140131
pinmap_config(rx, serial_rx_pinmap());
141132

142-
// start UART instance
143-
MBED_ASSERT(am_hal_uart_initialize(uart, &(obj->serial.uart_control->handle)) == AM_HAL_STATUS_SUCCESS);
144-
MBED_ASSERT(am_hal_uart_power_control(obj->serial.uart_control->handle, AM_HAL_SYSCTRL_WAKE, false) == AM_HAL_STATUS_SUCCESS);
145-
MBED_ASSERT(am_hal_uart_configure(obj->serial.uart_control->handle, &(obj->serial.uart_control->cfg)) == AM_HAL_STATUS_SUCCESS);
133+
if(!obj->serial.uart_control->handle) {
134+
// if handle uninitialized this is first time set up
135+
// ensure that HAL queueing is disabled (we want to use the FIFOs directly)
136+
obj->serial.uart_control->cfg.pui8RxBuffer = NULL;
137+
obj->serial.uart_control->cfg.pui8TxBuffer = NULL;
138+
obj->serial.uart_control->cfg.ui32RxBufferSize = 0;
139+
obj->serial.uart_control->cfg.ui32TxBufferSize = 0;
140+
141+
obj->serial.uart_control->cfg.ui32FifoLevels = AM_HAL_UART_RX_FIFO_7_8;
142+
143+
// start UART instance
144+
MBED_ASSERT(am_hal_uart_initialize(uart, &(obj->serial.uart_control->handle)) == AM_HAL_STATUS_SUCCESS);
145+
MBED_ASSERT(am_hal_uart_power_control(obj->serial.uart_control->handle, AM_HAL_SYSCTRL_WAKE, false) == AM_HAL_STATUS_SUCCESS);
146+
MBED_ASSERT(am_hal_uart_configure_fifo(obj->serial.uart_control->handle, &(obj->serial.uart_control->cfg), false) == AM_HAL_STATUS_SUCCESS);
146147

147-
// set default baud rate and format
148-
serial_baud(obj, 9600);
149-
serial_format(obj, 8, ParityNone, 1);
148+
// set default format
149+
serial_format(obj, 8, ParityNone, 1);
150+
}
150151
}
151152

152-
void serial_free(serial_t *obj)
153-
{
153+
void serial_free(serial_t *obj) {
154154
// nothing to do unless resources are allocated for members of the serial_s serial member of obj
155155
// assuming mbed handles obj and its members
156156
}
157157

158158
void serial_baud(serial_t *obj, int baudrate) {
159159
obj->serial.uart_control->cfg.ui32BaudRate = (uint32_t)baudrate;
160-
MBED_ASSERT(am_hal_uart_configure(obj->serial.uart_control->handle, &(obj->serial.uart_control->cfg)) == AM_HAL_STATUS_SUCCESS);
160+
MBED_ASSERT(am_hal_uart_configure_fifo(obj->serial.uart_control->handle, &(obj->serial.uart_control->cfg), false) == AM_HAL_STATUS_SUCCESS);
161161
}
162162

163-
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
164-
{
163+
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
165164
uint32_t am_hal_data_bits = 0;
166165
switch (data_bits) {
167166
case 5:
@@ -214,36 +213,44 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
214213
obj->serial.uart_control->cfg.ui32DataBits = (uint32_t)am_hal_data_bits;
215214
obj->serial.uart_control->cfg.ui32Parity = (uint32_t)am_hal_parity;
216215
obj->serial.uart_control->cfg.ui32StopBits = (uint32_t)am_hal_stop_bits;
217-
MBED_ASSERT(am_hal_uart_configure(obj->serial.uart_control->handle, &(obj->serial.uart_control->cfg)) == AM_HAL_STATUS_SUCCESS);
216+
MBED_ASSERT(am_hal_uart_configure_fifo(obj->serial.uart_control->handle, &(obj->serial.uart_control->cfg), false) == AM_HAL_STATUS_SUCCESS);
218217
}
219218

220-
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
221-
{
219+
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
222220
irq_handler = handler;
223221
obj->serial.uart_control->serial_irq_id = id;
224222
}
225223

226-
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
227-
{
228-
MBED_ASSERT(obj->serial.uart_control != NULL);
229-
230-
am_hal_uart_interrupt_enable(obj->serial.uart_control->handle, (AM_HAL_UART_INT_RX | AM_HAL_UART_INT_TX | AM_HAL_UART_INT_TXCMP));
231-
232-
switch (obj->serial.uart_control->inst)
233-
{
234-
case 0:
235-
NVIC_SetVector((IRQn_Type)UART0_IRQn, (uint32_t)am_uart_isr);
236-
break;
237-
case 1:
238-
NVIC_SetVector((IRQn_Type)UART1_IRQn, (uint32_t)am_uart1_isr);
239-
break;
224+
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
225+
MBED_ASSERT(obj->serial.uart_control->handle != NULL);
226+
if (enable) {
227+
switch (irq) {
228+
case RxIrq:
229+
MBED_ASSERT(am_hal_uart_interrupt_enable(obj->serial.uart_control->handle, AM_HAL_UART_INT_RX) == AM_HAL_STATUS_SUCCESS);
230+
break;
231+
case TxIrq:
232+
MBED_ASSERT(am_hal_uart_interrupt_enable(obj->serial.uart_control->handle, AM_HAL_UART_INT_TXCMP) == AM_HAL_STATUS_SUCCESS);
233+
break;
234+
default:
235+
break;
236+
}
237+
// NVIC_SetVector(uart_irqs[obj->serial.index], vector);
238+
NVIC_EnableIRQ((IRQn_Type)(UART0_IRQn + obj->serial.uart_control->inst));
239+
} else { // disable
240+
switch (irq) {
241+
case RxIrq:
242+
MBED_ASSERT(am_hal_uart_interrupt_disable(obj->serial.uart_control->handle, AM_HAL_UART_INT_RX) == AM_HAL_STATUS_SUCCESS);
243+
break;
244+
case TxIrq:
245+
MBED_ASSERT(am_hal_uart_interrupt_disable(obj->serial.uart_control->handle, AM_HAL_UART_INT_TXCMP) == AM_HAL_STATUS_SUCCESS);
246+
break;
247+
default:
248+
break;
249+
}
240250
}
241-
242-
NVIC_EnableIRQ((IRQn_Type)(UART0_IRQn + obj->serial.uart_control->inst));
243251
}
244252

245-
int serial_getc(serial_t *obj)
246-
{
253+
int serial_getc(serial_t *obj) {
247254
MBED_ASSERT(obj->serial.uart_control != NULL);
248255

249256
uint8_t rx_c = 0x00;
@@ -263,8 +270,7 @@ int serial_getc(serial_t *obj)
263270
return (int)rx_c;
264271
}
265272

266-
void serial_putc(serial_t *obj, int c)
267-
{
273+
void serial_putc(serial_t *obj, int c) {
268274
MBED_ASSERT(obj->serial.uart_control != NULL);
269275

270276
volatile uint32_t bytes_sent = 0;
@@ -343,72 +349,6 @@ const PinMap *serial_rts_pinmap(void) {
343349
}
344350
#endif
345351

346-
#if DEVICE_SERIAL_ASYNCH
347-
348-
int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint)
349-
{
350-
MBED_ASSERT(obj->serial.uart_control != NULL);
351-
uint32_t bytes_written = 0;
352-
353-
am_hal_uart_transfer_t am_hal_uart_xfer_write = {
354-
.ui32Direction = AM_HAL_UART_WRITE,
355-
.pui8Data = (uint8_t *)obj->tx_buff.buffer,
356-
.ui32NumBytes = tx_length, // todo: consider maybe this? (uint32_t)obj->tx_buff.length,
357-
.ui32TimeoutMs = 0,
358-
.pui32BytesTransferred = &bytes_written,
359-
};
360-
361-
am_hal_uart_transfer(obj->serial.uart_control->handle, &am_hal_uart_xfer_write);
362-
363-
return (int)bytes_written;
364-
}
365-
366-
void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint)
367-
{
368-
// todo: revisit
369-
MBED_ASSERT(obj->serial.uart_control != NULL);
370-
uint32_t bytes_read = 0;
371-
372-
am_hal_uart_transfer_t am_hal_uart_xfer_read = {
373-
.ui32Direction = AM_HAL_UART_READ,
374-
.pui8Data = (uint8_t *)obj->rx_buff.buffer,
375-
.ui32NumBytes = rx_length, // todo: consider this (uint32_t)obj->rx_buff.length,
376-
.ui32TimeoutMs = 0,
377-
.pui32BytesTransferred = &bytes_read,
378-
};
379-
380-
am_hal_uart_transfer(obj->serial.uart_control->handle, &am_hal_uart_xfer_read);
381-
}
382-
383-
uint8_t serial_tx_active(serial_t *obj) {
384-
// todo:
385-
MBED_ASSERT(0);
386-
}
387-
388-
uint8_t serial_rx_active(serial_t *obj) {
389-
// todo:
390-
MBED_ASSERT(0);
391-
}
392-
393-
int serial_irq_handler_asynch(serial_t *obj) {
394-
// todo:
395-
MBED_ASSERT(0);
396-
}
397-
398-
void serial_tx_abort_asynch(serial_t *obj) {
399-
// todo:
400-
MBED_ASSERT(0);
401-
}
402-
403-
void serial_rx_abort_asynch(serial_t *obj) {
404-
// todo:
405-
MBED_ASSERT(0);
406-
}
407-
408-
/**@}*/
409-
410-
#endif
411-
412352
static inline void uart_irq(uint32_t instance)
413353
{
414354
void *handle = ap3_uart_control[instance].handle;
@@ -434,7 +374,6 @@ static inline void uart_irq(uint32_t instance)
434374
}
435375

436376
extern void am_uart_isr(void) {
437-
am_hal_gpio_output_set(16); // todo: this should not be here!
438377
uart_irq(UART_0);
439378
}
440379

@@ -448,4 +387,4 @@ extern void am_uart1_isr(void) {
448387

449388
#endif
450389

451-
/** @}*/
390+
/** @}*/

targets/TARGET_Ambiq_Micro/TARGET_Apollo3/sdk/mcu/apollo3/hal/am_hal_uart.c

+91-1
Original file line numberDiff line numberDiff line change
@@ -445,6 +445,96 @@ am_hal_uart_configure(void *pHandle, const am_hal_uart_config_t *psConfig)
445445
return AM_HAL_STATUS_SUCCESS;
446446
} // am_hal_uart_configure()
447447

448+
uint32_t
449+
am_hal_uart_configure_fifo(void *pHandle, const am_hal_uart_config_t *psConfig, bool bEnableFIFO)
450+
{
451+
am_hal_uart_state_t *pState = (am_hal_uart_state_t *) pHandle;
452+
uint32_t ui32Module = pState->ui32Module;
453+
454+
uint32_t ui32ErrorStatus;
455+
456+
//
457+
// Check to make sure this is a valid handle.
458+
//
459+
if (!AM_HAL_UART_CHK_HANDLE(pHandle))
460+
{
461+
return AM_HAL_STATUS_INVALID_HANDLE;
462+
}
463+
464+
//
465+
// Reset the CR register to a known value.
466+
//
467+
UARTn(ui32Module)->CR = 0;
468+
469+
//
470+
// Start by enabling the clocks, which needs to happen in a critical
471+
// section.
472+
//
473+
AM_CRITICAL_BEGIN
474+
475+
UARTn(ui32Module)->CR_b.CLKEN = 1;
476+
UARTn(ui32Module)->CR_b.CLKSEL = UART0_CR_CLKSEL_24MHZ;
477+
478+
AM_CRITICAL_END
479+
480+
//
481+
// Disable the UART.
482+
//
483+
AM_CRITICAL_BEGIN
484+
485+
UARTn(ui32Module)->CR_b.UARTEN = 0;
486+
UARTn(ui32Module)->CR_b.RXE = 0;
487+
UARTn(ui32Module)->CR_b.TXE = 0;
488+
489+
AM_CRITICAL_END
490+
491+
//
492+
// Set the baud rate.
493+
//
494+
ui32ErrorStatus = config_baudrate(ui32Module, psConfig->ui32BaudRate,
495+
&(pState->ui32BaudRate));
496+
497+
RETURN_ON_ERROR(ui32ErrorStatus);
498+
499+
//
500+
// Copy the configuration options into the appropriate registers.
501+
//
502+
UARTn(ui32Module)->CR_b.RTSEN = 0;
503+
UARTn(ui32Module)->CR_b.CTSEN = 0;
504+
UARTn(ui32Module)->CR |= psConfig->ui32FlowControl;
505+
506+
UARTn(ui32Module)->IFLS = psConfig->ui32FifoLevels;
507+
508+
UARTn(ui32Module)->LCRH = (psConfig->ui32DataBits |
509+
psConfig->ui32Parity |
510+
psConfig->ui32StopBits |
511+
((bEnableFIFO) ? AM_HAL_UART_FIFO_ENABLE : AM_HAL_UART_FIFO_DISABLE));
512+
513+
//
514+
// Enable the UART, RX, and TX.
515+
//
516+
AM_CRITICAL_BEGIN
517+
518+
UARTn(ui32Module)->CR_b.UARTEN = 1;
519+
UARTn(ui32Module)->CR_b.RXE = 1;
520+
UARTn(ui32Module)->CR_b.TXE = 1;
521+
522+
AM_CRITICAL_END
523+
524+
if(bEnableFIFO){
525+
//
526+
// Set up any buffers that might exist.
527+
//
528+
buffer_configure(pHandle,
529+
psConfig->pui8TxBuffer,
530+
psConfig->ui32TxBufferSize,
531+
psConfig->pui8RxBuffer,
532+
psConfig->ui32RxBufferSize);
533+
}
534+
535+
return AM_HAL_STATUS_SUCCESS;
536+
} // am_hal_uart_configure_fifo()
537+
448538
//*****************************************************************************
449539
//
450540
// Allows the UART HAL to use extra space to store TX and RX data.
@@ -1423,4 +1513,4 @@ am_hal_uart_interrupt_enable_get(void *pHandle, uint32_t *pui32IntMask)
14231513
*pui32IntMask = UARTn(ui32Module)->IER;
14241514

14251515
return AM_HAL_STATUS_SUCCESS;
1426-
} // am_hal_uart_interrupt_enable_get()
1516+
} // am_hal_uart_interrupt_enable_get()

targets/TARGET_Ambiq_Micro/TARGET_Apollo3/sdk/mcu/apollo3/hal/am_hal_uart.h

+5-1
Original file line numberDiff line numberDiff line change
@@ -312,6 +312,10 @@ extern uint32_t am_hal_uart_power_control(void *pHandle,
312312
extern uint32_t am_hal_uart_configure(void *pHandle,
313313
const am_hal_uart_config_t *psConfig);
314314

315+
extern uint32_t am_hal_uart_configure_fifo(void *pHandle,
316+
const am_hal_uart_config_t *psConfig,
317+
bool bEnableFIFO);
318+
315319
//*****************************************************************************
316320
//
317321
//! @brief Transfer data through the UART interface.
@@ -716,4 +720,4 @@ extern uint32_t am_hal_uart_interrupt_enable_get(void *pHandle, uint32_t *pui32I
716720
// End Doxygen group.
717721
//! @}
718722
//
719-
//*****************************************************************************
723+
//*****************************************************************************

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