@@ -27,9 +27,9 @@ SOFTWARE.
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#include " ap3_analog.h"
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- // Define the clock source and frequency to use for
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- // PWM generation.
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- // Chose 12 MHz to allow maximal resolution with a
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+ // Define the clock source and frequency to use for
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+ // PWM generation.
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+ // Chose 12 MHz to allow maximal resolution with a
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// target maximum width of 2ms (for RC servos)
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// 1/12MHz = 0.083 uS per LSB.
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// 2ms/0.083us = 24000 LSB for 2 ms wide pulse
@@ -41,14 +41,14 @@ SOFTWARE.
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instead or maybe we can even go ahead and support the Servo library
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*/
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- #define AP3_ANALOG_CLK
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- #define AP3_ANALOG_FREQ 12000000
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- #define AP3_ANALOG_FRAME_PERIOD 24000
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+ #define AP3_ANALOG_CLK
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+ #define AP3_ANALOG_FREQ 12000000
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+ #define AP3_ANALOG_FRAME_PERIOD 24000
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// *****************************************************************************
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//
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// Tables copied from am_hal_ctimer.c because they are declared as static within
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- // that file, but they would be useful here too.
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+ // that file, but they would be useful here too.
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//
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// Lookup tables used by am_hal_ctimer_output_config().
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//
@@ -65,63 +65,63 @@ SOFTWARE.
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// OUTCFG 7 = A7OUT2.
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//
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// *****************************************************************************
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- #define CTXPADNUM (ctx ) ((CTx_tbl[ctx] >> 0 ) & 0x3f )
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- #define CTXPADFNC (ctx ) ((CTx_tbl[ctx] >> 8 ) & 0x7 )
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- #define CTX (pad, fn ) ((fn << 8 ) | (pad << 0 ))
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+ #define CTXPADNUM (ctx ) ((CTx_tbl[ctx] >> 0 ) & 0x3f )
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+ #define CTXPADFNC (ctx ) ((CTx_tbl[ctx] >> 8 ) & 0x7 )
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+ #define CTX (pad, fn ) ((fn << 8 ) | (pad << 0 ))
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static const uint16_t CTx_tbl[32 ] =
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- {
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- CTX (12 ,2 ), CTX (25 ,2 ), CTX (13 ,2 ), CTX (26 ,2 ), CTX (18 ,2 ), // 0 - 4
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- CTX (27 ,2 ), CTX (19 ,2 ), CTX (28 ,2 ), CTX ( 5 , 7 ), CTX (29 ,2 ), // 5 - 9
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- CTX ( 6 , 5 ), CTX (30 ,2 ), CTX (22 ,2 ), CTX (31 ,2 ), CTX (23 ,2 ), // 10 - 14
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- CTX (32 ,2 ), CTX (42 ,2 ), CTX ( 4 , 6 ), CTX (43 ,2 ), CTX ( 7 , 7 ), // 15 - 19
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- CTX (44 ,2 ), CTX (24 ,5 ), CTX (45 ,2 ), CTX (33 ,6 ), CTX (46 ,2 ), // 20 - 24
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- CTX (39 ,2 ), CTX (47 ,2 ), CTX (35 ,5 ), CTX (48 ,2 ), CTX (37 ,7 ), // 25 - 29
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- CTX (49 ,2 ), CTX (11 ,2 ) // 30 - 31
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+ {
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+ CTX (12 , 2 ), CTX (25 , 2 ), CTX (13 , 2 ), CTX (26 , 2 ), CTX (18 , 2 ), // 0 - 4
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+ CTX (27 , 2 ), CTX (19 , 2 ), CTX (28 , 2 ), CTX (5 , 7 ), CTX (29 , 2 ), // 5 - 9
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+ CTX (6 , 5 ), CTX (30 , 2 ), CTX (22 , 2 ), CTX (31 , 2 ), CTX (23 , 2 ), // 10 - 14
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+ CTX (32 , 2 ), CTX (42 , 2 ), CTX (4 , 6 ), CTX (43 , 2 ), CTX (7 , 7 ), // 15 - 19
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+ CTX (44 , 2 ), CTX (24 , 5 ), CTX (45 , 2 ), CTX (33 , 6 ), CTX (46 , 2 ), // 20 - 24
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+ CTX (39 , 2 ), CTX (47 , 2 ), CTX (35 , 5 ), CTX (48 , 2 ), CTX (37 , 7 ), // 25 - 29
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+ CTX (49 , 2 ), CTX (11 , 2 ) // 30 - 31
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};
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- #define OUTC (timB,timN,N2 ) ((N2 << 4 ) | (timB << 3 ) | (timN << 0 ))
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- #define OUTCTIMN (ctx,n ) (outcfg_tbl[ctx][n] & (0x7 << 0 ))
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- #define OUTCTIMB (ctx,n ) (outcfg_tbl[ctx][n] & (0x1 << 3 ))
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- #define OUTCO2 (ctx,n ) (outcfg_tbl[ctx][n] & (0x1 << 4 ))
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+ #define OUTC (timB, timN, N2 ) ((N2 << 4 ) | (timB << 3 ) | (timN << 0 ))
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+ #define OUTCTIMN (ctx, n ) (outcfg_tbl[ctx][n] & (0x7 << 0 ))
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+ #define OUTCTIMB (ctx, n ) (outcfg_tbl[ctx][n] & (0x1 << 3 ))
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+ #define OUTCO2 (ctx, n ) (outcfg_tbl[ctx][n] & (0x1 << 4 ))
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static const uint8_t outcfg_tbl[32 ][4 ] =
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- {
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- {OUTC (0 ,0 , 0 ), OUTC (1 ,2 , 1 ), OUTC (0 ,5 , 1 ), OUTC (0 ,6 , 0 )}, // CTX0: A0OUT, B2OUT2, A5OUT2, A6OUT
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- {OUTC (0 ,0 , 1 ), OUTC (0 ,0 , 0 ), OUTC (0 ,5 , 0 ), OUTC (1 ,7 , 1 )}, // CTX1: A0OUT2, A0OUT, A5OUT, B7OUT2
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- {OUTC (1 ,0 , 0 ), OUTC (1 ,1 , 1 ), OUTC (1 ,6 , 1 ), OUTC (0 ,7 , 0 )}, // CTX2: B0OUT, B1OUT2, B6OUT2, A7OUT
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- {OUTC (1 ,0 , 1 ), OUTC (1 ,0 , 0 ), OUTC (0 ,1 , 0 ), OUTC (0 ,6 , 0 )}, // CTX3: B0OUT2, B0OUT, A1OUT, A6OUT
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- {OUTC (0 ,1 , 0 ), OUTC (0 ,2 , 1 ), OUTC (0 ,5 , 1 ), OUTC (1 ,5 , 0 )}, // CTX4: A1OUT, A2OUT2, A5OUT2, B5OUT
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- {OUTC (0 ,1 , 1 ), OUTC (0 ,1 , 0 ), OUTC (1 ,6 , 0 ), OUTC (0 ,7 , 0 )}, // CTX5: A1OUT2, A1OUT, B6OUT, A7OUT
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- {OUTC (1 ,1 , 0 ), OUTC (0 ,1 , 0 ), OUTC (1 ,5 , 1 ), OUTC (1 ,7 , 0 )}, // CTX6: B1OUT, A1OUT, B5OUT2, B7OUT
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- {OUTC (1 ,1 , 1 ), OUTC (1 ,1 , 0 ), OUTC (1 ,5 , 0 ), OUTC (0 ,7 , 0 )}, // CTX7: B1OUT2, B1OUT, B5OUT, A7OUT
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- {OUTC (0 ,2 , 0 ), OUTC (0 ,3 , 1 ), OUTC (0 ,4 , 1 ), OUTC (1 ,6 , 0 )}, // CTX8: A2OUT, A3OUT2, A4OUT2, B6OUT
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- {OUTC (0 ,2 , 1 ), OUTC (0 ,2 , 0 ), OUTC (0 ,4 , 0 ), OUTC (1 ,0 , 0 )}, // CTX9: A2OUT2, A2OUT, A4OUT, B0OUT
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- {OUTC (1 ,2 , 0 ), OUTC (1 ,3 , 1 ), OUTC (1 ,4 , 1 ), OUTC (0 ,6 , 0 )}, // CTX10: B2OUT, B3OUT2, B4OUT2, A6OUT
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- {OUTC (1 ,2 , 1 ), OUTC (1 ,2 , 0 ), OUTC (1 ,4 , 0 ), OUTC (1 ,5 , 1 )}, // CTX11: B2OUT2, B2OUT, B4OUT, B5OUT2
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- {OUTC (0 ,3 , 0 ), OUTC (1 ,1 , 0 ), OUTC (1 ,0 , 1 ), OUTC (1 ,6 , 1 )}, // CTX12: A3OUT, B1OUT, B0OUT2, B6OUT2
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- {OUTC (0 ,3 , 1 ), OUTC (0 ,3 , 0 ), OUTC (0 ,6 , 0 ), OUTC (1 ,4 , 1 )}, // CTX13: A3OUT2, A3OUT, A6OUT, B4OUT2
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- {OUTC (1 ,3 , 0 ), OUTC (1 ,1 , 0 ), OUTC (1 ,7 , 1 ), OUTC (0 ,7 , 0 )}, // CTX14: B3OUT, B1OUT, B7OUT2, A7OUT
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- {OUTC (1 ,3 , 1 ), OUTC (1 ,3 , 0 ), OUTC (0 ,7 , 0 ), OUTC (0 ,4 , 1 )}, // CTX15: B3OUT2, B3OUT, A7OUT, A4OUT2
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- {OUTC (0 ,4 , 0 ), OUTC (0 ,0 , 0 ), OUTC (0 ,0 , 1 ), OUTC (1 ,3 , 1 )}, // CTX16: A4OUT, A0OUT, A0OUT2, B3OUT2
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- {OUTC (0 ,4 , 1 ), OUTC (1 ,7 , 0 ), OUTC (0 ,4 , 0 ), OUTC (0 ,1 , 1 )}, // CTX17: A4OUT2, B7OUT, A4OUT, A1OUT2
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- {OUTC (1 ,4 , 0 ), OUTC (1 ,0 , 0 ), OUTC (0 ,0 , 0 ), OUTC (0 ,3 , 1 )}, // CTX18: B4OUT, B0OUT, A0OUT, A3OUT2
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- {OUTC (1 ,4 , 1 ), OUTC (0 ,2 , 0 ), OUTC (1 ,4 , 0 ), OUTC (1 ,1 , 1 )}, // CTX19: B4OUT2, A2OUT, B4OUT, B1OUT2
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- {OUTC (0 ,5 , 0 ), OUTC (0 ,1 , 0 ), OUTC (0 ,1 , 1 ), OUTC (1 ,2 , 1 )}, // CTX20: A5OUT, A1OUT, A1OUT2, B2OUT2
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- {OUTC (0 ,5 , 1 ), OUTC (0 ,1 , 0 ), OUTC (1 ,5 , 0 ), OUTC (0 ,0 , 1 )}, // CTX21: A5OUT2, A1OUT, B5OUT, A0OUT2
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- {OUTC (1 ,5 , 0 ), OUTC (0 ,6 , 0 ), OUTC (0 ,1 , 0 ), OUTC (0 ,2 , 1 )}, // CTX22: B5OUT, A6OUT, A1OUT, A2OUT2
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- {OUTC (1 ,5 , 1 ), OUTC (0 ,7 , 0 ), OUTC (0 ,5 , 0 ), OUTC (1 ,0 , 1 )}, // CTX23: B5OUT2, A7OUT, A5OUT, B0OUT2
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- {OUTC (0 ,6 , 0 ), OUTC (0 ,2 , 0 ), OUTC (0 ,1 , 0 ), OUTC (1 ,1 , 1 )}, // CTX24: A6OUT, A2OUT, A1OUT, B1OUT2
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- {OUTC (1 ,4 , 1 ), OUTC (1 ,2 , 0 ), OUTC (0 ,6 , 0 ), OUTC (0 ,2 , 1 )}, // CTX25: B4OUT2, B2OUT, A6OUT, A2OUT2
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- {OUTC (1 ,6 , 0 ), OUTC (1 ,2 , 0 ), OUTC (0 ,5 , 0 ), OUTC (0 ,1 , 1 )}, // CTX26: B6OUT, B2OUT, A5OUT, A1OUT2
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- {OUTC (1 ,6 , 1 ), OUTC (0 ,1 , 0 ), OUTC (1 ,6 , 0 ), OUTC (1 ,2 , 1 )}, // CTX27: B6OUT2, A1OUT, B6OUT, B2OUT2
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- {OUTC (0 ,7 , 0 ), OUTC (0 ,3 , 0 ), OUTC (0 ,5 , 1 ), OUTC (1 ,0 , 1 )}, // CTX28: A7OUT, A3OUT, A5OUT2, B0OUT2
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- {OUTC (1 ,5 , 1 ), OUTC (0 ,1 , 0 ), OUTC (0 ,7 , 0 ), OUTC (0 ,3 , 1 )}, // CTX29: B5OUT2, A1OUT, A7OUT, A3OUT2
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- {OUTC (1 ,7 , 0 ), OUTC (1 ,3 , 0 ), OUTC (0 ,4 , 1 ), OUTC (0 ,0 , 1 )}, // CTX30: B7OUT, B3OUT, A4OUT2, A0OUT2
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- {OUTC (1 ,7 , 1 ), OUTC (0 ,6 , 0 ), OUTC (1 ,7 , 0 ), OUTC (1 ,3 , 1 )}, // CTX31: B7OUT2, A6OUT, B7OUT, B3OUT2
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+ {
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+ {OUTC (0 , 0 , 0 ), OUTC (1 , 2 , 1 ), OUTC (0 , 5 , 1 ), OUTC (0 , 6 , 0 )}, // CTX0: A0OUT, B2OUT2, A5OUT2, A6OUT
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+ {OUTC (0 , 0 , 1 ), OUTC (0 , 0 , 0 ), OUTC (0 , 5 , 0 ), OUTC (1 , 7 , 1 )}, // CTX1: A0OUT2, A0OUT, A5OUT, B7OUT2
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+ {OUTC (1 , 0 , 0 ), OUTC (1 , 1 , 1 ), OUTC (1 , 6 , 1 ), OUTC (0 , 7 , 0 )}, // CTX2: B0OUT, B1OUT2, B6OUT2, A7OUT
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+ {OUTC (1 , 0 , 1 ), OUTC (1 , 0 , 0 ), OUTC (0 , 1 , 0 ), OUTC (0 , 6 , 0 )}, // CTX3: B0OUT2, B0OUT, A1OUT, A6OUT
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+ {OUTC (0 , 1 , 0 ), OUTC (0 , 2 , 1 ), OUTC (0 , 5 , 1 ), OUTC (1 , 5 , 0 )}, // CTX4: A1OUT, A2OUT2, A5OUT2, B5OUT
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+ {OUTC (0 , 1 , 1 ), OUTC (0 , 1 , 0 ), OUTC (1 , 6 , 0 ), OUTC (0 , 7 , 0 )}, // CTX5: A1OUT2, A1OUT, B6OUT, A7OUT
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+ {OUTC (1 , 1 , 0 ), OUTC (0 , 1 , 0 ), OUTC (1 , 5 , 1 ), OUTC (1 , 7 , 0 )}, // CTX6: B1OUT, A1OUT, B5OUT2, B7OUT
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+ {OUTC (1 , 1 , 1 ), OUTC (1 , 1 , 0 ), OUTC (1 , 5 , 0 ), OUTC (0 , 7 , 0 )}, // CTX7: B1OUT2, B1OUT, B5OUT, A7OUT
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+ {OUTC (0 , 2 , 0 ), OUTC (0 , 3 , 1 ), OUTC (0 , 4 , 1 ), OUTC (1 , 6 , 0 )}, // CTX8: A2OUT, A3OUT2, A4OUT2, B6OUT
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+ {OUTC (0 , 2 , 1 ), OUTC (0 , 2 , 0 ), OUTC (0 , 4 , 0 ), OUTC (1 , 0 , 0 )}, // CTX9: A2OUT2, A2OUT, A4OUT, B0OUT
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+ {OUTC (1 , 2 , 0 ), OUTC (1 , 3 , 1 ), OUTC (1 , 4 , 1 ), OUTC (0 , 6 , 0 )}, // CTX10: B2OUT, B3OUT2, B4OUT2, A6OUT
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+ {OUTC (1 , 2 , 1 ), OUTC (1 , 2 , 0 ), OUTC (1 , 4 , 0 ), OUTC (1 , 5 , 1 )}, // CTX11: B2OUT2, B2OUT, B4OUT, B5OUT2
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+ {OUTC (0 , 3 , 0 ), OUTC (1 , 1 , 0 ), OUTC (1 , 0 , 1 ), OUTC (1 , 6 , 1 )}, // CTX12: A3OUT, B1OUT, B0OUT2, B6OUT2
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+ {OUTC (0 , 3 , 1 ), OUTC (0 , 3 , 0 ), OUTC (0 , 6 , 0 ), OUTC (1 , 4 , 1 )}, // CTX13: A3OUT2, A3OUT, A6OUT, B4OUT2
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+ {OUTC (1 , 3 , 0 ), OUTC (1 , 1 , 0 ), OUTC (1 , 7 , 1 ), OUTC (0 , 7 , 0 )}, // CTX14: B3OUT, B1OUT, B7OUT2, A7OUT
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+ {OUTC (1 , 3 , 1 ), OUTC (1 , 3 , 0 ), OUTC (0 , 7 , 0 ), OUTC (0 , 4 , 1 )}, // CTX15: B3OUT2, B3OUT, A7OUT, A4OUT2
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+ {OUTC (0 , 4 , 0 ), OUTC (0 , 0 , 0 ), OUTC (0 , 0 , 1 ), OUTC (1 , 3 , 1 )}, // CTX16: A4OUT, A0OUT, A0OUT2, B3OUT2
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+ {OUTC (0 , 4 , 1 ), OUTC (1 , 7 , 0 ), OUTC (0 , 4 , 0 ), OUTC (0 , 1 , 1 )}, // CTX17: A4OUT2, B7OUT, A4OUT, A1OUT2
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+ {OUTC (1 , 4 , 0 ), OUTC (1 , 0 , 0 ), OUTC (0 , 0 , 0 ), OUTC (0 , 3 , 1 )}, // CTX18: B4OUT, B0OUT, A0OUT, A3OUT2
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+ {OUTC (1 , 4 , 1 ), OUTC (0 , 2 , 0 ), OUTC (1 , 4 , 0 ), OUTC (1 , 1 , 1 )}, // CTX19: B4OUT2, A2OUT, B4OUT, B1OUT2
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+ {OUTC (0 , 5 , 0 ), OUTC (0 , 1 , 0 ), OUTC (0 , 1 , 1 ), OUTC (1 , 2 , 1 )}, // CTX20: A5OUT, A1OUT, A1OUT2, B2OUT2
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+ {OUTC (0 , 5 , 1 ), OUTC (0 , 1 , 0 ), OUTC (1 , 5 , 0 ), OUTC (0 , 0 , 1 )}, // CTX21: A5OUT2, A1OUT, B5OUT, A0OUT2
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+ {OUTC (1 , 5 , 0 ), OUTC (0 , 6 , 0 ), OUTC (0 , 1 , 0 ), OUTC (0 , 2 , 1 )}, // CTX22: B5OUT, A6OUT, A1OUT, A2OUT2
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+ {OUTC (1 , 5 , 1 ), OUTC (0 , 7 , 0 ), OUTC (0 , 5 , 0 ), OUTC (1 , 0 , 1 )}, // CTX23: B5OUT2, A7OUT, A5OUT, B0OUT2
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+ {OUTC (0 , 6 , 0 ), OUTC (0 , 2 , 0 ), OUTC (0 , 1 , 0 ), OUTC (1 , 1 , 1 )}, // CTX24: A6OUT, A2OUT, A1OUT, B1OUT2
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+ {OUTC (1 , 4 , 1 ), OUTC (1 , 2 , 0 ), OUTC (0 , 6 , 0 ), OUTC (0 , 2 , 1 )}, // CTX25: B4OUT2, B2OUT, A6OUT, A2OUT2
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+ {OUTC (1 , 6 , 0 ), OUTC (1 , 2 , 0 ), OUTC (0 , 5 , 0 ), OUTC (0 , 1 , 1 )}, // CTX26: B6OUT, B2OUT, A5OUT, A1OUT2
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+ {OUTC (1 , 6 , 1 ), OUTC (0 , 1 , 0 ), OUTC (1 , 6 , 0 ), OUTC (1 , 2 , 1 )}, // CTX27: B6OUT2, A1OUT, B6OUT, B2OUT2
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+ {OUTC (0 , 7 , 0 ), OUTC (0 , 3 , 0 ), OUTC (0 , 5 , 1 ), OUTC (1 , 0 , 1 )}, // CTX28: A7OUT, A3OUT, A5OUT2, B0OUT2
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+ {OUTC (1 , 5 , 1 ), OUTC (0 , 1 , 0 ), OUTC (0 , 7 , 0 ), OUTC (0 , 3 , 1 )}, // CTX29: B5OUT2, A1OUT, A7OUT, A3OUT2
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+ {OUTC (1 , 7 , 0 ), OUTC (1 , 3 , 0 ), OUTC (0 , 4 , 1 ), OUTC (0 , 0 , 1 )}, // CTX30: B7OUT, B3OUT, A4OUT2, A0OUT2
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+ {OUTC (1 , 7 , 1 ), OUTC (0 , 6 , 0 ), OUTC (1 , 7 , 0 ), OUTC (1 , 3 , 1 )}, // CTX31: B7OUT2, A6OUT, B7OUT, B3OUT2
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};
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- uint16_t _analogBits = 10 ; // 10-bit by default
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- uint8_t _analogWriteBits = 8 ; // 8-bit by default for writes
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- uint8_t _servoWriteBits = 8 ; // 8-bit by default for writes
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+ uint16_t _analogBits = 10 ; // 10-bit by default
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+ uint8_t _analogWriteBits = 8 ; // 8-bit by default for writes
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+ uint8_t _servoWriteBits = 8 ; // 8-bit by default for writes
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uint16_t analogRead (uint8_t pinNumber)
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{
@@ -202,6 +202,34 @@ uint16_t analogRead(uint8_t pinNumber)
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}
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}
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+ // Power down ADC. Comes from adc_lpmode2.c example from Ambiq SDK
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+ bool power_adc_disable ()
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+ {
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+ // Disable the ADC.
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+ if (AM_HAL_STATUS_SUCCESS != am_hal_adc_disable (g_ADCHandle))
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+ {
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+ // am_util_stdio_printf("Error - disable ADC failed.\n");
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+ return (false );
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+ }
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+
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+ // Enable the ADC power domain.
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+ if (AM_HAL_STATUS_SUCCESS != am_hal_pwrctrl_periph_disable (AM_HAL_PWRCTRL_PERIPH_ADC))
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+ {
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+ // am_util_stdio_printf("Error - disabling the ADC power domain failed.\n");
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+ return (false );
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+ }
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+
222
+ // Deinitialize the ADC
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+ if (AM_HAL_STATUS_SUCCESS != am_hal_adc_deinitialize (g_ADCHandle))
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+ {
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+ // am_util_stdio_printf("Error - return of the ADC instance failed.\n");
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+ return (false );
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+ }
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+
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+ g_ADCHandle = NULL ;
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+ return (true );
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+ }
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+
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// Apollo3 is capapble of 14-bit ADC but Arduino defaults to 10-bit
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// This modifies the global var that controls what is returned from analogRead()
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void analogReadResolution (uint8_t bits)
@@ -325,92 +353,102 @@ ap3_err_t ap3_change_channel(uint8_t padNumber)
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}
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}
327
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-
329
-
330
-
331
-
332
-
333
-
334
-
335
-
336
-
337
- ap3_err_t ap3_pwm_output ( uint8_t pin, uint32_t th, uint32_t fw, uint32_t clk ){
356
+ ap3_err_t ap3_pwm_output (uint8_t pin, uint32_t th, uint32_t fw, uint32_t clk)
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+ {
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// handle configuration, if necessary
339
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ap3_err_t retval = AP3_OK;
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ap3_gpio_pad_t pad = ap3_gpio_pin2pad (pin);
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- if (( pad == AP3_GPIO_PAD_UNUSED) || ( pad >= AP3_GPIO_MAX_PADS )){ return AP3_INVALID_ARG; }
362
+ if ((pad == AP3_GPIO_PAD_UNUSED) || (pad >= AP3_GPIO_MAX_PADS))
363
+ {
364
+ return AP3_INVALID_ARG;
365
+ }
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uint32_t timer = 0 ;
345
368
uint32_t segment = AM_HAL_CTIMER_TIMERA;
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uint32_t output = AM_HAL_CTIMER_OUTPUT_NORMAL;
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uint8_t ctx = 0 ;
349
- for (ctx = 0 ; ctx < 32 ; ctx++){
350
- if ( CTXPADNUM (ctx) == pad ){
372
+ for (ctx = 0 ; ctx < 32 ; ctx++)
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+ {
374
+ if (CTXPADNUM (ctx) == pad)
375
+ {
351
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break ;
352
377
}
353
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}
354
- if ( ctx >= 32 ){
379
+ if (ctx >= 32 )
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+ {
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return AP3_ERR; // could not find pad in CTx table
356
382
}
357
383
// Now use CTx index to get configuration information
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// Now, for the given pad, determine the above values
360
- if ( (pad == 39 ) || (pad == 37 ) ){
386
+ if ((pad == 39 ) || (pad == 37 ))
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+ {
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388
// pads 39 and 37 must be handled differently to avoid conflicting with other pins
362
- if (pad == 39 ){
389
+ if (pad == 39 )
390
+ {
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// 39
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timer = 6 ;
365
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segment = AM_HAL_CTIMER_TIMERA;
366
394
output = AM_HAL_CTIMER_OUTPUT_SECONDARY;
367
- }else {
395
+ }
396
+ else
397
+ {
368
398
// 37
369
399
timer = 7 ;
370
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segment = AM_HAL_CTIMER_TIMERA;
371
401
output = AM_HAL_CTIMER_OUTPUT_NORMAL;
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}
373
- }else {
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- const uint8_t n = 0 ; // use the zeroeth index into the options for any pd except 37 and 39
403
+ }
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+ else
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+ {
406
+ const uint8_t n = 0 ; // use the zeroeth index into the options for any pd except 37 and 39
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timer = OUTCTIMN (ctx, 0 );
377
- if ( OUTCTIMB (ctx, 0 ) ){
409
+ if (OUTCTIMB (ctx, 0 ))
410
+ {
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411
segment = AM_HAL_CTIMER_TIMERB;
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}
380
- if ( OUTCO2 (ctx, 0 ) ){
413
+ if (OUTCO2 (ctx, 0 ))
414
+ {
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output = AM_HAL_CTIMER_OUTPUT_SECONDARY;
382
416
}
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}
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// Configure the pin
386
- am_hal_ctimer_output_config (timer,
387
- segment,
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- pad,
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- output,
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- AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA); //
420
+ am_hal_ctimer_output_config (timer,
421
+ segment,
422
+ pad,
423
+ output,
424
+ AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA); //
391
425
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426
// Configure the repeated pulse mode with our clock source
393
427
am_hal_ctimer_config_single (timer,
394
- segment,
428
+ segment,
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429
// (AM_HAL_CTIMER_FN_PWM_REPEAT | AP3_ANALOG_CLK | AM_HAL_CTIMER_INT_ENABLE) );
396
- (AM_HAL_CTIMER_FN_PWM_REPEAT | clk) );
430
+ (AM_HAL_CTIMER_FN_PWM_REPEAT | clk));
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// If this pad uses secondary output:
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- if ( output == AM_HAL_CTIMER_OUTPUT_SECONDARY ){
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+ if (output == AM_HAL_CTIMER_OUTPUT_SECONDARY)
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+ {
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// Need to explicitly enable compare registers 2/3
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- uint32_t * pui32ConfigReg = NULL ;
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- pui32ConfigReg = (uint32_t *)CTIMERADDRn (CTIMER, timer, AUX0);
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+ uint32_t * pui32ConfigReg = NULL ;
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+ pui32ConfigReg = (uint32_t *)CTIMERADDRn (CTIMER, timer, AUX0);
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uint32_t ui32WriteVal = AM_REGVAL (pui32ConfigReg);
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- uint32_t ui32ConfigVal = (1 << CTIMER_AUX0_TMRA0EN23_Pos ); // using CTIMER_AUX0_TMRA0EN23_Pos because for now this number is common to all CTimer instances
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- if ( segment == AM_HAL_CTIMER_TIMERB ){
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+ uint32_t ui32ConfigVal = (1 << CTIMER_AUX0_TMRA0EN23_Pos); // using CTIMER_AUX0_TMRA0EN23_Pos because for now this number is common to all CTimer instances
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+ if (segment == AM_HAL_CTIMER_TIMERB)
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+ {
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ui32ConfigVal = ((ui32ConfigVal & 0xFFFF ) << 16 );
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}
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ui32WriteVal = (ui32WriteVal & ~(segment)) | ui32ConfigVal;
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AM_REGVAL (pui32ConfigReg) = ui32WriteVal;
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// then set the duty cycle with the 'aux' function
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- am_hal_ctimer_aux_period_set ( timer, segment, fw, th);
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- }else {
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+ am_hal_ctimer_aux_period_set (timer, segment, fw, th);
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+ }
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+ else
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+ {
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// Otherwise simply set the primary duty cycle
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am_hal_ctimer_period_set (timer, segment, fw, th);
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}
@@ -423,58 +461,58 @@ ap3_err_t ap3_pwm_output( uint8_t pin, uint32_t th, uint32_t fw, uint32_t clk ){
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return AP3_OK;
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}
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-
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- ap3_err_t analogWriteResolution ( uint8_t res ){
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- if ( res > 15 ){
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+ ap3_err_t analogWriteResolution (uint8_t res)
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+ {
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+ if (res > 15 )
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+ {
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_analogWriteBits = 15 ; // max out the resolution when this happens
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return AP3_ERR;
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}
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_analogWriteBits = res;
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return AP3_OK;
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}
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- ap3_err_t analogWrite ( uint8_t pin, uint32_t val ){
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+ ap3_err_t analogWrite (uint8_t pin, uint32_t val)
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+ {
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// Determine the high time based on input value and the current resolution setting
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- uint32_t fsv = (0x01 << _analogWriteBits); // full scale value for the current resolution setting
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- val = val % fsv; // prevent excess
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- uint32_t clk = AM_HAL_CTIMER_HFRC_12MHZ; // Use an Ambiq HAL provided value to select which clock
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+ uint32_t fsv = (0x01 << _analogWriteBits); // full scale value for the current resolution setting
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+ val = val % fsv; // prevent excess
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+ uint32_t clk = AM_HAL_CTIMER_HFRC_12MHZ; // Use an Ambiq HAL provided value to select which clock
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// uint32_t fw = 32768; // Choose the frame width in clock periods (32768 -> ~ 350 Hz)
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// uint32_t th = (uint32_t)( (fw * val) / fsv );
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- if (val == 0 ){
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- val = 1 ; // todo: change this so that when val==0 we set the mode to "force output low"
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+ if (val == 0 )
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+ {
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+ val = 1 ; // todo: change this so that when val==0 we set the mode to "force output low"
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}
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- if ( val == fsv ){
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- val -= 1 ; // todo: change this so that when val==fsv we just set the mode to "force output high"
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+ if (val == fsv)
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+ {
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+ val -= 1 ; // todo: change this so that when val==fsv we just set the mode to "force output high"
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}
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- return ap3_pwm_output ( pin, val, fsv, clk );
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+ return ap3_pwm_output (pin, val, fsv, clk);
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}
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- ap3_err_t servoWriteResolution ( uint8_t res ){
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- if ( res > 15 ){
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+ ap3_err_t servoWriteResolution (uint8_t res)
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+ {
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+ if (res > 15 )
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+ {
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_servoWriteBits = 15 ; // max out the resolution when this happens
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return AP3_ERR;
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}
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_servoWriteBits = res;
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return AP3_OK;
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}
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- ap3_err_t servoWrite ( uint8_t pin, uint32_t val ){
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+ ap3_err_t servoWrite (uint8_t pin, uint32_t val)
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+ {
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// Determine the high time based on input value and the current resolution setting
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- uint32_t fsv = (0x01 << _servoWriteBits); // full scale value for the current resolution setting
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- val = val % fsv; // prevent excess
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- uint32_t clk = AM_HAL_CTIMER_HFRC_3MHZ; // Using 3 MHz to get fine-grained control up to 20 ms wide
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- uint32_t fw = 60000 ; // 20 ms wide frame
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- uint32_t max = 6000 ; // max width of RC pwm pulse is 2 ms or 6000 counts
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- uint32_t min = 3000 ; // min width of RC pwm pulse is 1 ms or 3000 counts
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- uint32_t th = (uint32_t )( ((max - min) * val) / fsv ) + min;
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-
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- return ap3_pwm_output ( pin, th, fw, clk );
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+ uint32_t fsv = (0x01 << _servoWriteBits); // full scale value for the current resolution setting
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+ val = val % fsv; // prevent excess
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+ uint32_t clk = AM_HAL_CTIMER_HFRC_3MHZ; // Using 3 MHz to get fine-grained control up to 20 ms wide
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+ uint32_t fw = 60000 ; // 20 ms wide frame
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+ uint32_t max = 6000 ; // max width of RC pwm pulse is 2 ms or 6000 counts
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+ uint32_t min = 3000 ; // min width of RC pwm pulse is 1 ms or 3000 counts
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+ uint32_t th = (uint32_t )(((max - min) * val) / fsv) + min;
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+
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+ return ap3_pwm_output (pin, th, fw, clk);
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}
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-
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-
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-
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-
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-
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-
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-
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