Skip to content

Commit a289272

Browse files
authored
Merge pull request #57 from sparkfun/smallCleanup
Small cleanup
2 parents d90e673 + bb6649c commit a289272

File tree

2 files changed

+57
-46
lines changed

2 files changed

+57
-46
lines changed

libraries/SPI/src/SPI.cpp

+9-5
Original file line numberDiff line numberDiff line change
@@ -128,8 +128,9 @@ void SPIClass::end()
128128
static inline unsigned char __interruptsStatus(void) __attribute__((always_inline, unused));
129129
static inline unsigned char __interruptsStatus(void)
130130
{
131-
// // See http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0497a/CHDBIBGJ.html
132-
// return (__get_PRIMASK() ? 0 : 1);
131+
// See http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0497a/CHDBIBGJ.html - Cortex-M0
132+
// Equivalent Cortex-M3 http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/CHDBIBGJ.html
133+
return (__get_PRIMASK() ? 0 : 1);
133134
}
134135
#endif
135136

@@ -300,12 +301,15 @@ void SPIClass::_transfer(void *buf_out, void *buf_in, size_t count)
300301
}
301302

302303
uint32_t retVal32 = 0;
303-
if( iomTransfer.eDirection == AM_HAL_IOM_FULLDUPLEX ){
304+
if (iomTransfer.eDirection == AM_HAL_IOM_FULLDUPLEX)
305+
{
304306
retVal32 = am_hal_iom_spi_blocking_fullduplex(_handle, &iomTransfer);
305-
}else{
307+
}
308+
else
309+
{
306310
retVal32 = am_hal_iom_blocking_transfer(_handle, &iomTransfer);
307311
}
308-
312+
309313
// if (retVal32 != 0)
310314
// {
311315
// Serial.printf("got an error on _transfer: %d\n", retVal32);

libraries/SPI/src/SPI.h

+48-41
Original file line numberDiff line numberDiff line change
@@ -24,18 +24,15 @@
2424
#include "ap3_iomaster.h"
2525

2626
// Give a warning if the variant did not define these symbols:
27-
#ifndef SS
28-
#warning "variant has no definition for pin number 'SS'"
29-
#endif // SS
3027
#ifndef MOSI
3128
#warning "variant has no definition for pin number 'MOSI'"
32-
#endif // MOSI
29+
#endif // MOSI
3330
#ifndef MISO
3431
#warning "variant has no definition for pin number 'MISO'"
35-
#endif // MISO
36-
#ifndef CLK
37-
#warning "variant has no definition for pin number 'CLK'"
38-
#endif // CLK
32+
#endif // MISO
33+
#ifndef SCK
34+
#warning "variant has no definition for pin number 'SCK'"
35+
#endif // SCK
3936

4037
// SPI_HAS_TRANSACTION means SPI has
4138
// - beginTransaction()
@@ -52,34 +49,43 @@
5249
#define SPI_MODE2 AM_HAL_IOM_SPI_MODE_2
5350
#define SPI_MODE3 AM_HAL_IOM_SPI_MODE_3
5451

55-
typedef enum{
52+
typedef enum
53+
{
5654
ap3_spi_tx_only = 1,
5755
ap3_spi_rx_only = 2,
5856
ap3_spi_full_duplex = 3,
59-
}ap3_spi_duplex_e;
60-
61-
class SPISettings {
62-
public:
63-
SPISettings(uint32_t clock, BitOrder bitOrder, uint8_t dataMode) {
64-
if (__builtin_constant_p(clock)) {
57+
} ap3_spi_duplex_e;
58+
59+
class SPISettings
60+
{
61+
public:
62+
SPISettings(uint32_t clock, BitOrder bitOrder, uint8_t dataMode)
63+
{
64+
if (__builtin_constant_p(clock))
65+
{
6566
init_AlwaysInline(clock, bitOrder, dataMode);
66-
} else {
67+
}
68+
else
69+
{
6770
init_MightInline(clock, bitOrder, dataMode);
6871
}
6972
}
7073

7174
// Default speed set to 4MHz, SPI mode set to MODE 0 and Bit order set to MSB first.
72-
SPISettings() {
73-
init_AlwaysInline(4000000, MSBFIRST, SPI_MODE0);
75+
SPISettings()
76+
{
77+
init_AlwaysInline(4000000, MSBFIRST, SPI_MODE0);
7478
}
7579

76-
private:
77-
public: // temporary
78-
void init_MightInline(uint32_t clock, BitOrder bitOrder, uint8_t dataMode) {
80+
private:
81+
public: // temporary
82+
void init_MightInline(uint32_t clock, BitOrder bitOrder, uint8_t dataMode)
83+
{
7984
init_AlwaysInline(clock, bitOrder, dataMode);
8085
}
8186

82-
void init_AlwaysInline(uint32_t clock, BitOrder bitOrder, uint8_t dataMode) __attribute__((__always_inline__)) {
87+
void init_AlwaysInline(uint32_t clock, BitOrder bitOrder, uint8_t dataMode) __attribute__((__always_inline__))
88+
{
8389
this->clockFreq = clock;
8490
this->bitOrder = bitOrder;
8591
this->dataMode = (am_hal_iom_spi_mode_e)dataMode;
@@ -92,8 +98,9 @@ class SPISettings {
9298
friend class SPIClass;
9399
};
94100

95-
class SPIClass : public IOMaster {
96-
public:
101+
class SPIClass : public IOMaster
102+
{
103+
public:
97104
SPIClass(uint8_t iom_instance);
98105
SPIClass(uint8_t iom_instance, ap3_spi_duplex_e duplex);
99106

@@ -122,7 +129,7 @@ class SPIClass : public IOMaster {
122129

123130
private:
124131
void config(SPISettings settings);
125-
void _transfer(void* buf_out = NULL, void* buf_in = NULL, size_t count = 0);
132+
void _transfer(void *buf_out = NULL, void *buf_in = NULL, size_t count = 0);
126133

127134
// Bit Order (need a better way to handle this)
128135
BitOrder _order;
@@ -131,9 +138,9 @@ class SPIClass : public IOMaster {
131138
ap3_spi_duplex_e _duplex;
132139

133140
// Pads (for reference)
134-
ap3_gpio_pin_t _padSCLK;
135-
ap3_gpio_pin_t _padMOSI;
136-
ap3_gpio_pin_t _padMISO;
141+
ap3_gpio_pin_t _padSCLK;
142+
ap3_gpio_pin_t _padMOSI;
143+
ap3_gpio_pin_t _padMISO;
137144

138145
// SERCOM *_p_sercom;
139146
// uint8_t _uc_pinMiso;
@@ -150,34 +157,34 @@ class SPIClass : public IOMaster {
150157
};
151158

152159
#if SPI_INTERFACES_COUNT > 0
153-
extern SPIClass SPI;
160+
extern SPIClass SPI;
154161
#endif
155162
#if SPI_INTERFACES_COUNT > 1
156-
extern SPIClass SPI1;
163+
extern SPIClass SPI1;
157164
#endif
158165
#if SPI_INTERFACES_COUNT > 2
159-
extern SPIClass SPI2;
166+
extern SPIClass SPI2;
160167
#endif
161168
#if SPI_INTERFACES_COUNT > 3
162-
extern SPIClass SPI3;
169+
extern SPIClass SPI3;
163170
#endif
164171
#if SPI_INTERFACES_COUNT > 4
165-
extern SPIClass SPI4;
172+
extern SPIClass SPI4;
166173
#endif
167174
#if SPI_INTERFACES_COUNT > 5
168-
extern SPIClass SPI5;
175+
extern SPIClass SPI5;
169176
#endif
170177

171178
// For compatibility with sketches designed for AVR @ 16 MHz
172179
// New programs should use SPI.beginTransaction to set the SPI clock
173180
#if F_CPU == 48000000
174-
#define SPI_CLOCK_DIV2 6
175-
#define SPI_CLOCK_DIV4 12
176-
#define SPI_CLOCK_DIV8 24
177-
#define SPI_CLOCK_DIV16 48
178-
#define SPI_CLOCK_DIV32 96
179-
#define SPI_CLOCK_DIV64 192
180-
#define SPI_CLOCK_DIV128 255
181+
#define SPI_CLOCK_DIV2 6
182+
#define SPI_CLOCK_DIV4 12
183+
#define SPI_CLOCK_DIV8 24
184+
#define SPI_CLOCK_DIV16 48
185+
#define SPI_CLOCK_DIV32 96
186+
#define SPI_CLOCK_DIV64 192
187+
#define SPI_CLOCK_DIV128 255
181188
#endif
182189

183190
#endif

0 commit comments

Comments
 (0)