@@ -445,6 +445,96 @@ am_hal_uart_configure(void *pHandle, const am_hal_uart_config_t *psConfig)
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return AM_HAL_STATUS_SUCCESS ;
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} // am_hal_uart_configure()
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+ uint32_t
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+ am_hal_uart_configure_fifo (void * pHandle , const am_hal_uart_config_t * psConfig , bool bEnableFIFO )
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+ {
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+ am_hal_uart_state_t * pState = (am_hal_uart_state_t * ) pHandle ;
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+ uint32_t ui32Module = pState -> ui32Module ;
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+
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+ uint32_t ui32ErrorStatus ;
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+
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+ //
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+ // Check to make sure this is a valid handle.
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+ //
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+ if (!AM_HAL_UART_CHK_HANDLE (pHandle ))
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+ {
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+ return AM_HAL_STATUS_INVALID_HANDLE ;
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+ }
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+
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+ //
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+ // Reset the CR register to a known value.
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+ //
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+ UARTn (ui32Module )-> CR = 0 ;
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+
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+ //
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+ // Start by enabling the clocks, which needs to happen in a critical
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+ // section.
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+ //
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+ AM_CRITICAL_BEGIN
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+
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+ UARTn (ui32Module )-> CR_b .CLKEN = 1 ;
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+ UARTn (ui32Module )-> CR_b .CLKSEL = UART0_CR_CLKSEL_24MHZ ;
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+
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+ AM_CRITICAL_END
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+
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+ //
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+ // Disable the UART.
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+ //
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+ AM_CRITICAL_BEGIN
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+
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+ UARTn (ui32Module )-> CR_b .UARTEN = 0 ;
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+ UARTn (ui32Module )-> CR_b .RXE = 0 ;
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+ UARTn (ui32Module )-> CR_b .TXE = 0 ;
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+
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+ AM_CRITICAL_END
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+
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+ //
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+ // Set the baud rate.
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+ //
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+ ui32ErrorStatus = config_baudrate (ui32Module , psConfig -> ui32BaudRate ,
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+ & (pState -> ui32BaudRate ));
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+
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+ RETURN_ON_ERROR (ui32ErrorStatus );
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+
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+ //
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+ // Copy the configuration options into the appropriate registers.
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+ //
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+ UARTn (ui32Module )-> CR_b .RTSEN = 0 ;
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+ UARTn (ui32Module )-> CR_b .CTSEN = 0 ;
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+ UARTn (ui32Module )-> CR |= psConfig -> ui32FlowControl ;
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+
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+ UARTn (ui32Module )-> IFLS = psConfig -> ui32FifoLevels ;
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+
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+ UARTn (ui32Module )-> LCRH = (psConfig -> ui32DataBits |
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+ psConfig -> ui32Parity |
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+ psConfig -> ui32StopBits |
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+ ((bEnableFIFO ) ? AM_HAL_UART_FIFO_ENABLE : AM_HAL_UART_FIFO_DISABLE ));
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+
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+ //
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+ // Enable the UART, RX, and TX.
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+ //
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+ AM_CRITICAL_BEGIN
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+
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+ UARTn (ui32Module )-> CR_b .UARTEN = 1 ;
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+ UARTn (ui32Module )-> CR_b .RXE = 1 ;
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+ UARTn (ui32Module )-> CR_b .TXE = 1 ;
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+
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+ AM_CRITICAL_END
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+
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+ if (bEnableFIFO ){
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+ //
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+ // Set up any buffers that might exist.
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+ //
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+ buffer_configure (pHandle ,
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+ psConfig -> pui8TxBuffer ,
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+ psConfig -> ui32TxBufferSize ,
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+ psConfig -> pui8RxBuffer ,
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+ psConfig -> ui32RxBufferSize );
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+ }
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+
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+ return AM_HAL_STATUS_SUCCESS ;
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+ } // am_hal_uart_configure_fifo()
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+
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//*****************************************************************************
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//
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// Allows the UART HAL to use extra space to store TX and RX data.
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