@@ -15,28 +15,36 @@ func TestParseISAInfo(t *testing.T) {
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}{
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{
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"1cpu_1core_isainfo.txt" ,
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- []string {"rdseed" , "adx" , "avx2" , "fma" , "bmi2" , "bmi1" , "rdrand" , "f16c" , "vmx" ,
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+ []string {
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+ "rdseed" , "adx" , "avx2" , "fma" , "bmi2" , "bmi1" , "rdrand" , "f16c" , "vmx" ,
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"avx" , "xsave" , "pclmulqdq" , "aes" , "movbe" , "sse4.2" , "sse4.1" , "ssse3" , "popcnt" ,
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"tscp" , "cx16" , "sse3" , "sse2" , "sse" , "fxsr" , "mmx" , "cmov" , "amd_sysc" , "cx8" ,
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- "tsc" , "fpu" },
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+ "tsc" , "fpu" ,
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+ },
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},
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{
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"2cpu_1core_isainfo.txt" ,
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- []string {"rdseed" , "adx" , "avx2" , "fma" , "bmi2" , "bmi1" , "rdrand" , "f16c" , "vmx" ,
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+ []string {
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+ "rdseed" , "adx" , "avx2" , "fma" , "bmi2" , "bmi1" , "rdrand" , "f16c" , "vmx" ,
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"avx" , "xsave" , "pclmulqdq" , "aes" , "movbe" , "sse4.2" , "sse4.1" , "ssse3" , "popcnt" ,
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"tscp" , "cx16" , "sse3" , "sse2" , "sse" , "fxsr" , "mmx" , "cmov" , "amd_sysc" , "cx8" ,
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- "tsc" , "fpu" },
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+ "tsc" , "fpu" ,
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+ },
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},
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{
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"2cpu_8core_isainfo.txt" ,
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- []string {"vmx" , "avx" , "xsave" , "pclmulqdq" , "aes" , "sse4.2" , "sse4.1" , "ssse3" , "popcnt" ,
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+ []string {
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+ "vmx" , "avx" , "xsave" , "pclmulqdq" , "aes" , "sse4.2" , "sse4.1" , "ssse3" , "popcnt" ,
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"tscp" , "cx16" , "sse3" , "sse2" , "sse" , "fxsr" , "mmx" , "cmov" , "amd_sysc" , "cx8" ,
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- "tsc" , "fpu" },
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+ "tsc" , "fpu" ,
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+ },
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},
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{
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"2cpu_12core_isainfo.txt" ,
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- []string {"amd_svm" , "amd_lzcnt" , "popcnt" , "amd_sse4a" , "tscp" , "ahf" , "cx16" , "sse3" , "sse2" ,
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- "sse" , "fxsr" , "amd_3dnowx" , "amd_3dnow" , "amd_mmx" , "mmx" , "cmov" , "amd_sysc" , "cx8" , "tsc" , "fpu" },
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+ []string {
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+ "amd_svm" , "amd_lzcnt" , "popcnt" , "amd_sse4a" , "tscp" , "ahf" , "cx16" , "sse3" , "sse2" ,
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+ "sse" , "fxsr" , "amd_3dnowx" , "amd_3dnow" , "amd_mmx" , "mmx" , "cmov" , "amd_sysc" , "cx8" , "tsc" , "fpu" ,
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+ },
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},
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}
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