@@ -4,8 +4,6 @@ use crate::{
4
4
ptr,
5
5
};
6
6
7
-
8
-
9
7
#[cfg(test)]
10
8
use stdarch_test::assert_instr;
11
9
@@ -11304,33 +11302,32 @@ pub fn _mm512_bsrli_epi128<const IMM8: i32>(a: __m512i) -> __m512i {
11304
11302
#[rustc_legacy_const_generics(2)]
11305
11303
pub fn _mm512_alignr_epi8<const IMM8: i32>(a: __m512i, b: __m512i) -> __m512i {
11306
11304
const fn mask(shift: u32, i: u32) -> u32 {
11307
- let shift = shift % 16;
11308
- let mod_i = i%16;
11309
- if mod_i < (16 - shift) {
11310
- i + shift
11311
- } else {
11312
- i + 48 + shift
11313
- }
11314
- }
11315
-
11316
- // If palignr is shifting the pair of vectors more than the size of two
11317
- // lanes, emit zero.
11318
- if IMM8 >= 32 {
11319
- return _mm512_setzero_si512();
11320
- }
11321
- // If palignr is shifting the pair of input vectors more than one lane,
11322
- // but less than two lanes, convert to shifting in zeroes.
11323
- let (a, b) = if IMM8 > 16 {
11324
- (_mm512_setzero_si512(), a)
11305
+ let shift = shift % 16;
11306
+ let mod_i = i % 16;
11307
+ if mod_i < (16 - shift) {
11308
+ i + shift
11325
11309
} else {
11326
- (a, b)
11327
- };
11310
+ i + 48 + shift
11311
+ }
11312
+ }
11313
+
11314
+ // If palignr is shifting the pair of vectors more than the size of two
11315
+ // lanes, emit zero.
11316
+ if IMM8 >= 32 {
11317
+ return _mm512_setzero_si512();
11318
+ }
11319
+ // If palignr is shifting the pair of input vectors more than one lane,
11320
+ // but less than two lanes, convert to shifting in zeroes.
11321
+ let (a, b) = if IMM8 > 16 {
11322
+ (_mm512_setzero_si512(), a)
11323
+ } else {
11324
+ (a, b)
11325
+ };
11328
11326
unsafe {
11329
11327
if IMM8 == 16 {
11330
11328
return transmute(a);
11331
11329
}
11332
-
11333
-
11330
+
11334
11331
let r: i8x64 = simd_shuffle!(
11335
11332
b.as_i8x64(),
11336
11333
a.as_i8x64(),
@@ -11351,7 +11348,7 @@ pub fn _mm512_alignr_epi8<const IMM8: i32>(a: __m512i, b: __m512i) -> __m512i {
11351
11348
mask(IMM8 as u32, 13),
11352
11349
mask(IMM8 as u32, 14),
11353
11350
mask(IMM8 as u32, 15),
11354
- mask(IMM8 as u32, 16),
11351
+ mask(IMM8 as u32, 16),
11355
11352
mask(IMM8 as u32, 17),
11356
11353
mask(IMM8 as u32, 18),
11357
11354
mask(IMM8 as u32, 19),
@@ -11367,7 +11364,7 @@ pub fn _mm512_alignr_epi8<const IMM8: i32>(a: __m512i, b: __m512i) -> __m512i {
11367
11364
mask(IMM8 as u32, 29),
11368
11365
mask(IMM8 as u32, 30),
11369
11366
mask(IMM8 as u32, 31),
11370
- mask(IMM8 as u32, 32),
11367
+ mask(IMM8 as u32, 32),
11371
11368
mask(IMM8 as u32, 33),
11372
11369
mask(IMM8 as u32, 34),
11373
11370
mask(IMM8 as u32, 35),
@@ -11383,7 +11380,7 @@ pub fn _mm512_alignr_epi8<const IMM8: i32>(a: __m512i, b: __m512i) -> __m512i {
11383
11380
mask(IMM8 as u32, 45),
11384
11381
mask(IMM8 as u32, 46),
11385
11382
mask(IMM8 as u32, 47),
11386
- mask(IMM8 as u32, 48),
11383
+ mask(IMM8 as u32, 48),
11387
11384
mask(IMM8 as u32, 49),
11388
11385
mask(IMM8 as u32, 50),
11389
11386
mask(IMM8 as u32, 51),
@@ -11493,7 +11490,7 @@ pub fn _mm_mask_alignr_epi8<const IMM8: i32>(
11493
11490
a: __m128i,
11494
11491
b: __m128i,
11495
11492
) -> __m128i {
11496
- unsafe {`
11493
+ unsafe {
11497
11494
static_assert_uimm_bits!(IMM8, 8);
11498
11495
let r = _mm_alignr_epi8::<IMM8>(a, b);
11499
11496
transmute(simd_select_bitmask(k, r.as_i8x16(), src.as_i8x16()))
0 commit comments