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JamesbarfordJamesbarford
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fix rebase, remove the const_vector attribure
1 parent a26d756 commit d66490e

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2 files changed

+19
-67
lines changed

2 files changed

+19
-67
lines changed

‎crates/core_arch/src/arm_shared/neon/generated.rs

Lines changed: 16 additions & 53 deletions
Original file line numberDiff line numberDiff line change
@@ -21988,7 +21988,6 @@ pub unsafe fn vqrshrn_n_s16<const N: i32>(a: int16x8_t) -> int8x8_t {
2198821988
#[allow(improper_ctypes)]
2198921989
extern "unadjusted" {
2199021990
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftns.v8i8")]
21991-
#[rustc_intrinsic_const_vector_arg(1)]
2199221991
fn vqrshrn_n_s16_(a: int16x8_t, n: int16x8_t) -> int8x8_t;
2199321992
}
2199421993
vqrshrn_n_s16_(a, const { int16x8_t(-N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16) })
@@ -22027,7 +22026,6 @@ pub unsafe fn vqrshrn_n_s32<const N: i32>(a: int32x4_t) -> int16x4_t {
2202722026
#[allow(improper_ctypes)]
2202822027
extern "unadjusted" {
2202922028
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftns.v4i16")]
22030-
#[rustc_intrinsic_const_vector_arg(1)]
2203122029
fn vqrshrn_n_s32_(a: int32x4_t, n: int32x4_t) -> int16x4_t;
2203222030
}
2203322031
vqrshrn_n_s32_(a, const { int32x4_t(-N as i32, -N as i32, -N as i32, -N as i32) })
@@ -22066,7 +22064,6 @@ pub unsafe fn vqrshrn_n_s64<const N: i32>(a: int64x2_t) -> int32x2_t {
2206622064
#[allow(improper_ctypes)]
2206722065
extern "unadjusted" {
2206822066
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftns.v2i32")]
22069-
#[rustc_intrinsic_const_vector_arg(1)]
2207022067
fn vqrshrn_n_s64_(a: int64x2_t, n: int64x2_t) -> int32x2_t;
2207122068
}
2207222069
vqrshrn_n_s64_(a, const { int64x2_t(-N as i64, -N as i64) })
@@ -22105,7 +22102,6 @@ pub unsafe fn vqrshrn_n_u16<const N: i32>(a: uint16x8_t) -> uint8x8_t {
2210522102
#[allow(improper_ctypes)]
2210622103
extern "unadjusted" {
2210722104
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftnu.v8i8")]
22108-
#[rustc_intrinsic_const_vector_arg(1)]
2210922105
fn vqrshrn_n_u16_(a: uint16x8_t, n: uint16x8_t) -> uint8x8_t;
2211022106
}
2211122107
vqrshrn_n_u16_(a, const { uint16x8_t(-N as u16, -N as u16, -N as u16, -N as u16, -N as u16, -N as u16, -N as u16, -N as u16) })
@@ -22144,7 +22140,6 @@ pub unsafe fn vqrshrn_n_u32<const N: i32>(a: uint32x4_t) -> uint16x4_t {
2214422140
#[allow(improper_ctypes)]
2214522141
extern "unadjusted" {
2214622142
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftnu.v4i16")]
22147-
#[rustc_intrinsic_const_vector_arg(1)]
2214822143
fn vqrshrn_n_u32_(a: uint32x4_t, n: uint32x4_t) -> uint16x4_t;
2214922144
}
2215022145
vqrshrn_n_u32_(a, const { uint32x4_t(-N as u32, -N as u32, -N as u32, -N as u32) })
@@ -22183,7 +22178,6 @@ pub unsafe fn vqrshrn_n_u64<const N: i32>(a: uint64x2_t) -> uint32x2_t {
2218322178
#[allow(improper_ctypes)]
2218422179
extern "unadjusted" {
2218522180
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftnu.v2i32")]
22186-
#[rustc_intrinsic_const_vector_arg(1)]
2218722181
fn vqrshrn_n_u64_(a: uint64x2_t, n: uint64x2_t) -> uint32x2_t;
2218822182
}
2218922183
vqrshrn_n_u64_(a, const { uint64x2_t(-N as u64, -N as u64) })
@@ -22222,7 +22216,6 @@ pub unsafe fn vqrshrun_n_s16<const N: i32>(a: int16x8_t) -> uint8x8_t {
2222222216
#[allow(improper_ctypes)]
2222322217
extern "unadjusted" {
2222422218
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftnsu.v8i8")]
22225-
#[rustc_intrinsic_const_vector_arg(1)]
2222622219
fn vqrshrun_n_s16_(a: int16x8_t, n: int16x8_t) -> uint8x8_t;
2222722220
}
2222822221
vqrshrun_n_s16_(a, const { int16x8_t(-N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16) })
@@ -22261,7 +22254,6 @@ pub unsafe fn vqrshrun_n_s32<const N: i32>(a: int32x4_t) -> uint16x4_t {
2226122254
#[allow(improper_ctypes)]
2226222255
extern "unadjusted" {
2226322256
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftnsu.v4i16")]
22264-
#[rustc_intrinsic_const_vector_arg(1)]
2226522257
fn vqrshrun_n_s32_(a: int32x4_t, n: int32x4_t) -> uint16x4_t;
2226622258
}
2226722259
vqrshrun_n_s32_(a, const { int32x4_t(-N as i32, -N as i32, -N as i32, -N as i32) })
@@ -22300,7 +22292,6 @@ pub unsafe fn vqrshrun_n_s64<const N: i32>(a: int64x2_t) -> uint32x2_t {
2230022292
#[allow(improper_ctypes)]
2230122293
extern "unadjusted" {
2230222294
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqrshiftnsu.v2i32")]
22303-
#[rustc_intrinsic_const_vector_arg(1)]
2230422295
fn vqrshrun_n_s64_(a: int64x2_t, n: int64x2_t) -> uint32x2_t;
2230522296
}
2230622297
vqrshrun_n_s64_(a, const { int64x2_t(-N as i64, -N as i64) })
@@ -22915,7 +22906,6 @@ pub unsafe fn vqshlu_n_s8<const N: i32>(a: int8x8_t) -> uint8x8_t {
2291522906
#[allow(improper_ctypes)]
2291622907
extern "unadjusted" {
2291722908
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftsu.v8i8")]
22918-
#[rustc_intrinsic_const_vector_arg(1)]
2291922909
fn vqshlu_n_s8_(a: int8x8_t, n: int8x8_t) -> uint8x8_t;
2292022910
}
2292122911
vqshlu_n_s8_(a, const { int8x8_t(N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8) })
@@ -22934,11 +22924,10 @@ pub unsafe fn vqshlu_n_s8<const N: i32>(a: int8x8_t) -> uint8x8_t {
2293422924
static_assert_uimm_bits!(N, 3);
2293522925
#[allow(improper_ctypes)]
2293622926
extern "unadjusted" {
22937-
#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqshlu.v8i8")]
22938-
#[rustc_intrinsic_const_vector_arg(1)]
22927+
#[cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), link_name = "llvm.aarch64.neon.sqshlu.v8i8")]
2293922928
fn vqshlu_n_s8_(a: int8x8_t, n: int8x8_t) -> uint8x8_t;
2294022929
}
22941-
vqshlu_n_s8_(a, const { int8x8_t(N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8) })
22930+
vqshlu_n_s8_(a, const { int8x8_t([N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8]) })
2294222931
}
2294322932

2294422933
/// Signed saturating shift left unsigned
@@ -22955,7 +22944,6 @@ pub unsafe fn vqshlu_n_s16<const N: i32>(a: int16x4_t) -> uint16x4_t {
2295522944
#[allow(improper_ctypes)]
2295622945
extern "unadjusted" {
2295722946
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftsu.v4i16")]
22958-
#[rustc_intrinsic_const_vector_arg(1)]
2295922947
fn vqshlu_n_s16_(a: int16x4_t, n: int16x4_t) -> uint16x4_t;
2296022948
}
2296122949
vqshlu_n_s16_(a, const { int16x4_t(N as i16, N as i16, N as i16, N as i16) })
@@ -22974,11 +22962,10 @@ pub unsafe fn vqshlu_n_s16<const N: i32>(a: int16x4_t) -> uint16x4_t {
2297422962
static_assert_uimm_bits!(N, 4);
2297522963
#[allow(improper_ctypes)]
2297622964
extern "unadjusted" {
22977-
#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqshlu.v4i16")]
22978-
#[rustc_intrinsic_const_vector_arg(1)]
22965+
#[cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), link_name = "llvm.aarch64.neon.sqshlu.v4i16")]
2297922966
fn vqshlu_n_s16_(a: int16x4_t, n: int16x4_t) -> uint16x4_t;
2298022967
}
22981-
vqshlu_n_s16_(a, const { int16x4_t(N as i16, N as i16, N as i16, N as i16) })
22968+
vqshlu_n_s16_(a, const { int16x4_t([N as i16, N as i16, N as i16, N as i16]) })
2298222969
}
2298322970

2298422971
/// Signed saturating shift left unsigned
@@ -22995,7 +22982,6 @@ pub unsafe fn vqshlu_n_s32<const N: i32>(a: int32x2_t) -> uint32x2_t {
2299522982
#[allow(improper_ctypes)]
2299622983
extern "unadjusted" {
2299722984
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftsu.v2i32")]
22998-
#[rustc_intrinsic_const_vector_arg(1)]
2299922985
fn vqshlu_n_s32_(a: int32x2_t, n: int32x2_t) -> uint32x2_t;
2300022986
}
2300122987
vqshlu_n_s32_(a, const { int32x2_t(N as i32, N as i32) })
@@ -23014,11 +23000,10 @@ pub unsafe fn vqshlu_n_s32<const N: i32>(a: int32x2_t) -> uint32x2_t {
2301423000
static_assert_uimm_bits!(N, 5);
2301523001
#[allow(improper_ctypes)]
2301623002
extern "unadjusted" {
23017-
#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqshlu.v2i32")]
23018-
#[rustc_intrinsic_const_vector_arg(1)]
23003+
#[cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), link_name = "llvm.aarch64.neon.sqshlu.v2i32")]
2301923004
fn vqshlu_n_s32_(a: int32x2_t, n: int32x2_t) -> uint32x2_t;
2302023005
}
23021-
vqshlu_n_s32_(a, const { int32x2_t(N as i32, N as i32) })
23006+
vqshlu_n_s32_(a, const { int32x2_t([N as i32, N as i32]) })
2302223007
}
2302323008

2302423009
/// Signed saturating shift left unsigned
@@ -23035,7 +23020,6 @@ pub unsafe fn vqshlu_n_s64<const N: i32>(a: int64x1_t) -> uint64x1_t {
2303523020
#[allow(improper_ctypes)]
2303623021
extern "unadjusted" {
2303723022
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftsu.v1i64")]
23038-
#[rustc_intrinsic_const_vector_arg(1)]
2303923023
fn vqshlu_n_s64_(a: int64x1_t, n: int64x1_t) -> uint64x1_t;
2304023024
}
2304123025
vqshlu_n_s64_(a, const { int64x1_t(N as i64) })
@@ -23054,11 +23038,10 @@ pub unsafe fn vqshlu_n_s64<const N: i32>(a: int64x1_t) -> uint64x1_t {
2305423038
static_assert_uimm_bits!(N, 6);
2305523039
#[allow(improper_ctypes)]
2305623040
extern "unadjusted" {
23057-
#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqshlu.v1i64")]
23058-
#[rustc_intrinsic_const_vector_arg(1)]
23041+
#[cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), link_name = "llvm.aarch64.neon.sqshlu.v1i64")]
2305923042
fn vqshlu_n_s64_(a: int64x1_t, n: int64x1_t) -> uint64x1_t;
2306023043
}
23061-
vqshlu_n_s64_(a, const { int64x1_t(N as i64) })
23044+
vqshlu_n_s64_(a, const { int64x1_t([N as i64]) })
2306223045
}
2306323046

2306423047
/// Signed saturating shift left unsigned
@@ -23075,7 +23058,6 @@ pub unsafe fn vqshluq_n_s8<const N: i32>(a: int8x16_t) -> uint8x16_t {
2307523058
#[allow(improper_ctypes)]
2307623059
extern "unadjusted" {
2307723060
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftsu.v16i8")]
23078-
#[rustc_intrinsic_const_vector_arg(1)]
2307923061
fn vqshluq_n_s8_(a: int8x16_t, n: int8x16_t) -> uint8x16_t;
2308023062
}
2308123063
vqshluq_n_s8_(a, const { int8x16_t(N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8) })
@@ -23094,11 +23076,10 @@ pub unsafe fn vqshluq_n_s8<const N: i32>(a: int8x16_t) -> uint8x16_t {
2309423076
static_assert_uimm_bits!(N, 3);
2309523077
#[allow(improper_ctypes)]
2309623078
extern "unadjusted" {
23097-
#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqshlu.v16i8")]
23098-
#[rustc_intrinsic_const_vector_arg(1)]
23079+
#[cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), link_name = "llvm.aarch64.neon.sqshlu.v16i8")]
2309923080
fn vqshluq_n_s8_(a: int8x16_t, n: int8x16_t) -> uint8x16_t;
2310023081
}
23101-
vqshluq_n_s8_(a, const { int8x16_t(N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8) })
23082+
vqshluq_n_s8_(a, const { int8x16_t([N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8, N as i8]) })
2310223083
}
2310323084

2310423085
/// Signed saturating shift left unsigned
@@ -23115,7 +23096,6 @@ pub unsafe fn vqshluq_n_s16<const N: i32>(a: int16x8_t) -> uint16x8_t {
2311523096
#[allow(improper_ctypes)]
2311623097
extern "unadjusted" {
2311723098
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftsu.v8i16")]
23118-
#[rustc_intrinsic_const_vector_arg(1)]
2311923099
fn vqshluq_n_s16_(a: int16x8_t, n: int16x8_t) -> uint16x8_t;
2312023100
}
2312123101
vqshluq_n_s16_(a, const { int16x8_t(N as i16, N as i16, N as i16, N as i16, N as i16, N as i16, N as i16, N as i16) })
@@ -23134,11 +23114,10 @@ pub unsafe fn vqshluq_n_s16<const N: i32>(a: int16x8_t) -> uint16x8_t {
2313423114
static_assert_uimm_bits!(N, 4);
2313523115
#[allow(improper_ctypes)]
2313623116
extern "unadjusted" {
23137-
#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqshlu.v8i16")]
23138-
#[rustc_intrinsic_const_vector_arg(1)]
23117+
#[cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), link_name = "llvm.aarch64.neon.sqshlu.v8i16")]
2313923118
fn vqshluq_n_s16_(a: int16x8_t, n: int16x8_t) -> uint16x8_t;
2314023119
}
23141-
vqshluq_n_s16_(a, const { int16x8_t(N as i16, N as i16, N as i16, N as i16, N as i16, N as i16, N as i16, N as i16) })
23120+
vqshluq_n_s16_(a, const { int16x8_t([N as i16, N as i16, N as i16, N as i16, N as i16, N as i16, N as i16, N as i16]) })
2314223121
}
2314323122

2314423123
/// Signed saturating shift left unsigned
@@ -23155,7 +23134,6 @@ pub unsafe fn vqshluq_n_s32<const N: i32>(a: int32x4_t) -> uint32x4_t {
2315523134
#[allow(improper_ctypes)]
2315623135
extern "unadjusted" {
2315723136
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftsu.v4i32")]
23158-
#[rustc_intrinsic_const_vector_arg(1)]
2315923137
fn vqshluq_n_s32_(a: int32x4_t, n: int32x4_t) -> uint32x4_t;
2316023138
}
2316123139
vqshluq_n_s32_(a, const { int32x4_t(N as i32, N as i32, N as i32, N as i32) })
@@ -23174,11 +23152,10 @@ pub unsafe fn vqshluq_n_s32<const N: i32>(a: int32x4_t) -> uint32x4_t {
2317423152
static_assert_uimm_bits!(N, 5);
2317523153
#[allow(improper_ctypes)]
2317623154
extern "unadjusted" {
23177-
#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqshlu.v4i32")]
23178-
#[rustc_intrinsic_const_vector_arg(1)]
23155+
#[cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), link_name = "llvm.aarch64.neon.sqshlu.v4i32")]
2317923156
fn vqshluq_n_s32_(a: int32x4_t, n: int32x4_t) -> uint32x4_t;
2318023157
}
23181-
vqshluq_n_s32_(a, const { int32x4_t(N as i32, N as i32, N as i32, N as i32) })
23158+
vqshluq_n_s32_(a, const { int32x4_t([N as i32, N as i32, N as i32, N as i32]) })
2318223159
}
2318323160

2318423161
/// Signed saturating shift left unsigned
@@ -23195,7 +23172,6 @@ pub unsafe fn vqshluq_n_s64<const N: i32>(a: int64x2_t) -> uint64x2_t {
2319523172
#[allow(improper_ctypes)]
2319623173
extern "unadjusted" {
2319723174
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftsu.v2i64")]
23198-
#[rustc_intrinsic_const_vector_arg(1)]
2319923175
fn vqshluq_n_s64_(a: int64x2_t, n: int64x2_t) -> uint64x2_t;
2320023176
}
2320123177
vqshluq_n_s64_(a, const { int64x2_t(N as i64, N as i64) })
@@ -23214,11 +23190,10 @@ pub unsafe fn vqshluq_n_s64<const N: i32>(a: int64x2_t) -> uint64x2_t {
2321423190
static_assert_uimm_bits!(N, 6);
2321523191
#[allow(improper_ctypes)]
2321623192
extern "unadjusted" {
23217-
#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqshlu.v2i64")]
23218-
#[rustc_intrinsic_const_vector_arg(1)]
23193+
#[cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), link_name = "llvm.aarch64.neon.sqshlu.v2i64")]
2321923194
fn vqshluq_n_s64_(a: int64x2_t, n: int64x2_t) -> uint64x2_t;
2322023195
}
23221-
vqshluq_n_s64_(a, const { int64x2_t(N as i64, N as i64) })
23196+
vqshluq_n_s64_(a, const { int64x2_t([N as i64, N as i64]) })
2322223197
}
2322323198

2322423199
/// Signed saturating shift right narrow
@@ -23235,7 +23210,6 @@ pub unsafe fn vqshrn_n_s16<const N: i32>(a: int16x8_t) -> int8x8_t {
2323523210
#[allow(improper_ctypes)]
2323623211
extern "unadjusted" {
2323723212
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftns.v8i8")]
23238-
#[rustc_intrinsic_const_vector_arg(1)]
2323923213
fn vqshrn_n_s16_(a: int16x8_t, n: int16x8_t) -> int8x8_t;
2324023214
}
2324123215
vqshrn_n_s16_(a, const { int16x8_t(-N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16) })
@@ -23274,7 +23248,6 @@ pub unsafe fn vqshrn_n_s32<const N: i32>(a: int32x4_t) -> int16x4_t {
2327423248
#[allow(improper_ctypes)]
2327523249
extern "unadjusted" {
2327623250
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftns.v4i16")]
23277-
#[rustc_intrinsic_const_vector_arg(1)]
2327823251
fn vqshrn_n_s32_(a: int32x4_t, n: int32x4_t) -> int16x4_t;
2327923252
}
2328023253
vqshrn_n_s32_(a, const { int32x4_t(-N as i32, -N as i32, -N as i32, -N as i32) })
@@ -23313,7 +23286,6 @@ pub unsafe fn vqshrn_n_s64<const N: i32>(a: int64x2_t) -> int32x2_t {
2331323286
#[allow(improper_ctypes)]
2331423287
extern "unadjusted" {
2331523288
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftns.v2i32")]
23316-
#[rustc_intrinsic_const_vector_arg(1)]
2331723289
fn vqshrn_n_s64_(a: int64x2_t, n: int64x2_t) -> int32x2_t;
2331823290
}
2331923291
vqshrn_n_s64_(a, const { int64x2_t(-N as i64, -N as i64) })
@@ -23352,7 +23324,6 @@ pub unsafe fn vqshrn_n_u16<const N: i32>(a: uint16x8_t) -> uint8x8_t {
2335223324
#[allow(improper_ctypes)]
2335323325
extern "unadjusted" {
2335423326
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftnu.v8i8")]
23355-
#[rustc_intrinsic_const_vector_arg(1)]
2335623327
fn vqshrn_n_u16_(a: uint16x8_t, n: uint16x8_t) -> uint8x8_t;
2335723328
}
2335823329
vqshrn_n_u16_(a, const { uint16x8_t(-N as u16, -N as u16, -N as u16, -N as u16, -N as u16, -N as u16, -N as u16, -N as u16) })
@@ -23391,7 +23362,6 @@ pub unsafe fn vqshrn_n_u32<const N: i32>(a: uint32x4_t) -> uint16x4_t {
2339123362
#[allow(improper_ctypes)]
2339223363
extern "unadjusted" {
2339323364
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftnu.v4i16")]
23394-
#[rustc_intrinsic_const_vector_arg(1)]
2339523365
fn vqshrn_n_u32_(a: uint32x4_t, n: uint32x4_t) -> uint16x4_t;
2339623366
}
2339723367
vqshrn_n_u32_(a, const { uint32x4_t(-N as u32, -N as u32, -N as u32, -N as u32) })
@@ -23430,7 +23400,6 @@ pub unsafe fn vqshrn_n_u64<const N: i32>(a: uint64x2_t) -> uint32x2_t {
2343023400
#[allow(improper_ctypes)]
2343123401
extern "unadjusted" {
2343223402
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftnu.v2i32")]
23433-
#[rustc_intrinsic_const_vector_arg(1)]
2343423403
fn vqshrn_n_u64_(a: uint64x2_t, n: uint64x2_t) -> uint32x2_t;
2343523404
}
2343623405
vqshrn_n_u64_(a, const { uint64x2_t(-N as u64, -N as u64) })
@@ -23469,7 +23438,6 @@ pub unsafe fn vqshrun_n_s16<const N: i32>(a: int16x8_t) -> uint8x8_t {
2346923438
#[allow(improper_ctypes)]
2347023439
extern "unadjusted" {
2347123440
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftnsu.v8i8")]
23472-
#[rustc_intrinsic_const_vector_arg(1)]
2347323441
fn vqshrun_n_s16_(a: int16x8_t, n: int16x8_t) -> uint8x8_t;
2347423442
}
2347523443
vqshrun_n_s16_(a, const { int16x8_t(-N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16) })
@@ -23508,7 +23476,6 @@ pub unsafe fn vqshrun_n_s32<const N: i32>(a: int32x4_t) -> uint16x4_t {
2350823476
#[allow(improper_ctypes)]
2350923477
extern "unadjusted" {
2351023478
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftnsu.v4i16")]
23511-
#[rustc_intrinsic_const_vector_arg(1)]
2351223479
fn vqshrun_n_s32_(a: int32x4_t, n: int32x4_t) -> uint16x4_t;
2351323480
}
2351423481
vqshrun_n_s32_(a, const { int32x4_t(-N as i32, -N as i32, -N as i32, -N as i32) })
@@ -23547,7 +23514,6 @@ pub unsafe fn vqshrun_n_s64<const N: i32>(a: int64x2_t) -> uint32x2_t {
2354723514
#[allow(improper_ctypes)]
2354823515
extern "unadjusted" {
2354923516
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqshiftnsu.v2i32")]
23550-
#[rustc_intrinsic_const_vector_arg(1)]
2355123517
fn vqshrun_n_s64_(a: int64x2_t, n: int64x2_t) -> uint32x2_t;
2355223518
}
2355323519
vqshrun_n_s64_(a, const { int64x2_t(-N as i64, -N as i64) })
@@ -28266,7 +28232,6 @@ pub unsafe fn vrshrn_n_s16<const N: i32>(a: int16x8_t) -> int8x8_t {
2826628232
#[allow(improper_ctypes)]
2826728233
extern "unadjusted" {
2826828234
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrshiftn.v8i8")]
28269-
#[rustc_intrinsic_const_vector_arg(1)]
2827028235
fn vrshrn_n_s16_(a: int16x8_t, n: int16x8_t) -> int8x8_t;
2827128236
}
2827228237
vrshrn_n_s16_(a, const { int16x8_t(-N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16, -N as i16) })
@@ -28305,7 +28270,6 @@ pub unsafe fn vrshrn_n_s32<const N: i32>(a: int32x4_t) -> int16x4_t {
2830528270
#[allow(improper_ctypes)]
2830628271
extern "unadjusted" {
2830728272
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrshiftn.v4i16")]
28308-
#[rustc_intrinsic_const_vector_arg(1)]
2830928273
fn vrshrn_n_s32_(a: int32x4_t, n: int32x4_t) -> int16x4_t;
2831028274
}
2831128275
vrshrn_n_s32_(a, const { int32x4_t(-N as i32, -N as i32, -N as i32, -N as i32) })
@@ -28344,7 +28308,6 @@ pub unsafe fn vrshrn_n_s64<const N: i32>(a: int64x2_t) -> int32x2_t {
2834428308
#[allow(improper_ctypes)]
2834528309
extern "unadjusted" {
2834628310
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrshiftn.v2i32")]
28347-
#[rustc_intrinsic_const_vector_arg(1)]
2834828311
fn vrshrn_n_s64_(a: int64x2_t, n: int64x2_t) -> int32x2_t;
2834928312
}
2835028313
vrshrn_n_s64_(a, const { int64x2_t(-N as i64, -N as i64) })

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