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sayantnAmanieu
sayantn
authored and
Amanieu
committed
Fix _mm*_mask_cmp_ep*_mask bug with IMM3=7 
1 parent 684de0d commit 2b77252

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+24
-24
lines changed

2 files changed

+24
-24
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Diff for: ‎crates/core_arch/src/x86/avx512bw.rs

+12-12
Original file line numberDiff line numberDiff line change
@@ -3907,7 +3907,7 @@ pub unsafe fn _mm512_mask_cmp_epu16_mask<const IMM8: i32>(
39073907
4 => simd_and(k1, simd_ne(a, b)),
39083908
5 => simd_and(k1, simd_ge(a, b)),
39093909
6 => simd_and(k1, simd_gt(a, b)),
3910-
_ => i16x32::splat(-1),
3910+
_ => k1,
39113911
};
39123912
simd_bitmask(r)
39133913
}
@@ -3962,7 +3962,7 @@ pub unsafe fn _mm256_mask_cmp_epu16_mask<const IMM8: i32>(
39623962
4 => simd_and(k1, simd_ne(a, b)),
39633963
5 => simd_and(k1, simd_ge(a, b)),
39643964
6 => simd_and(k1, simd_gt(a, b)),
3965-
_ => i16x16::splat(-1),
3965+
_ => k1,
39663966
};
39673967
simd_bitmask(r)
39683968
}
@@ -4017,7 +4017,7 @@ pub unsafe fn _mm_mask_cmp_epu16_mask<const IMM8: i32>(
40174017
4 => simd_and(k1, simd_ne(a, b)),
40184018
5 => simd_and(k1, simd_ge(a, b)),
40194019
6 => simd_and(k1, simd_gt(a, b)),
4020-
_ => i16x8::splat(-1),
4020+
_ => k1,
40214021
};
40224022
simd_bitmask(r)
40234023
}
@@ -4072,7 +4072,7 @@ pub unsafe fn _mm512_mask_cmp_epu8_mask<const IMM8: i32>(
40724072
4 => simd_and(k1, simd_ne(a, b)),
40734073
5 => simd_and(k1, simd_ge(a, b)),
40744074
6 => simd_and(k1, simd_gt(a, b)),
4075-
_ => i8x64::splat(-1),
4075+
_ => k1,
40764076
};
40774077
simd_bitmask(r)
40784078
}
@@ -4127,7 +4127,7 @@ pub unsafe fn _mm256_mask_cmp_epu8_mask<const IMM8: i32>(
41274127
4 => simd_and(k1, simd_ne(a, b)),
41284128
5 => simd_and(k1, simd_ge(a, b)),
41294129
6 => simd_and(k1, simd_gt(a, b)),
4130-
_ => i8x32::splat(-1),
4130+
_ => k1,
41314131
};
41324132
simd_bitmask(r)
41334133
}
@@ -4182,7 +4182,7 @@ pub unsafe fn _mm_mask_cmp_epu8_mask<const IMM8: i32>(
41824182
4 => simd_and(k1, simd_ne(a, b)),
41834183
5 => simd_and(k1, simd_ge(a, b)),
41844184
6 => simd_and(k1, simd_gt(a, b)),
4185-
_ => i8x16::splat(-1),
4185+
_ => k1,
41864186
};
41874187
simd_bitmask(r)
41884188
}
@@ -4237,7 +4237,7 @@ pub unsafe fn _mm512_mask_cmp_epi16_mask<const IMM8: i32>(
42374237
4 => simd_and(k1, simd_ne(a, b)),
42384238
5 => simd_and(k1, simd_ge(a, b)),
42394239
6 => simd_and(k1, simd_gt(a, b)),
4240-
_ => i16x32::splat(-1),
4240+
_ => k1,
42414241
};
42424242
simd_bitmask(r)
42434243
}
@@ -4292,7 +4292,7 @@ pub unsafe fn _mm256_mask_cmp_epi16_mask<const IMM8: i32>(
42924292
4 => simd_and(k1, simd_ne(a, b)),
42934293
5 => simd_and(k1, simd_ge(a, b)),
42944294
6 => simd_and(k1, simd_gt(a, b)),
4295-
_ => i16x16::splat(-1),
4295+
_ => k1,
42964296
};
42974297
simd_bitmask(r)
42984298
}
@@ -4347,7 +4347,7 @@ pub unsafe fn _mm_mask_cmp_epi16_mask<const IMM8: i32>(
43474347
4 => simd_and(k1, simd_ne(a, b)),
43484348
5 => simd_and(k1, simd_ge(a, b)),
43494349
6 => simd_and(k1, simd_gt(a, b)),
4350-
_ => i16x8::splat(-1),
4350+
_ => k1,
43514351
};
43524352
simd_bitmask(r)
43534353
}
@@ -4402,7 +4402,7 @@ pub unsafe fn _mm512_mask_cmp_epi8_mask<const IMM8: i32>(
44024402
4 => simd_and(k1, simd_ne(a, b)),
44034403
5 => simd_and(k1, simd_ge(a, b)),
44044404
6 => simd_and(k1, simd_gt(a, b)),
4405-
_ => i8x64::splat(-1),
4405+
_ => k1,
44064406
};
44074407
simd_bitmask(r)
44084408
}
@@ -4457,7 +4457,7 @@ pub unsafe fn _mm256_mask_cmp_epi8_mask<const IMM8: i32>(
44574457
4 => simd_and(k1, simd_ne(a, b)),
44584458
5 => simd_and(k1, simd_ge(a, b)),
44594459
6 => simd_and(k1, simd_gt(a, b)),
4460-
_ => i8x32::splat(-1),
4460+
_ => k1,
44614461
};
44624462
simd_bitmask(r)
44634463
}
@@ -4512,7 +4512,7 @@ pub unsafe fn _mm_mask_cmp_epi8_mask<const IMM8: i32>(
45124512
4 => simd_and(k1, simd_ne(a, b)),
45134513
5 => simd_and(k1, simd_ge(a, b)),
45144514
6 => simd_and(k1, simd_gt(a, b)),
4515-
_ => i8x16::splat(-1),
4515+
_ => k1,
45164516
};
45174517
simd_bitmask(r)
45184518
}

Diff for: ‎crates/core_arch/src/x86/avx512f.rs

+12-12
Original file line numberDiff line numberDiff line change
@@ -29722,7 +29722,7 @@ pub unsafe fn _mm512_mask_cmp_epu32_mask<const IMM3: _MM_CMPINT_ENUM>(
2972229722
4 => simd_and(k1, simd_ne(a, b)),
2972329723
5 => simd_and(k1, simd_ge(a, b)),
2972429724
6 => simd_and(k1, simd_gt(a, b)),
29725-
_ => i32x16::splat(-1),
29725+
_ => k1,
2972629726
};
2972729727
simd_bitmask(r)
2972829728
}
@@ -29780,7 +29780,7 @@ pub unsafe fn _mm256_mask_cmp_epu32_mask<const IMM3: _MM_CMPINT_ENUM>(
2978029780
4 => simd_and(k1, simd_ne(a, b)),
2978129781
5 => simd_and(k1, simd_ge(a, b)),
2978229782
6 => simd_and(k1, simd_gt(a, b)),
29783-
_ => i32x8::splat(-1),
29783+
_ => k1,
2978429784
};
2978529785
simd_bitmask(r)
2978629786
}
@@ -29835,7 +29835,7 @@ pub unsafe fn _mm_mask_cmp_epu32_mask<const IMM3: _MM_CMPINT_ENUM>(
2983529835
4 => simd_and(k1, simd_ne(a, b)),
2983629836
5 => simd_and(k1, simd_ge(a, b)),
2983729837
6 => simd_and(k1, simd_gt(a, b)),
29838-
_ => i32x4::splat(-1),
29838+
_ => k1,
2983929839
};
2984029840
simd_bitmask(r)
2984129841
}
@@ -30289,7 +30289,7 @@ pub unsafe fn _mm512_mask_cmp_epi32_mask<const IMM3: _MM_CMPINT_ENUM>(
3028930289
4 => simd_and(k1, simd_ne(a, b)),
3029030290
5 => simd_and(k1, simd_ge(a, b)),
3029130291
6 => simd_and(k1, simd_gt(a, b)),
30292-
_ => i32x16::splat(-1),
30292+
_ => k1,
3029330293
};
3029430294
simd_bitmask(r)
3029530295
}
@@ -30347,7 +30347,7 @@ pub unsafe fn _mm256_mask_cmp_epi32_mask<const IMM3: _MM_CMPINT_ENUM>(
3034730347
4 => simd_and(k1, simd_ne(a, b)),
3034830348
5 => simd_and(k1, simd_ge(a, b)),
3034930349
6 => simd_and(k1, simd_gt(a, b)),
30350-
_ => i32x8::splat(-1),
30350+
_ => k1,
3035130351
};
3035230352
simd_bitmask(r)
3035330353
}
@@ -30402,7 +30402,7 @@ pub unsafe fn _mm_mask_cmp_epi32_mask<const IMM3: _MM_CMPINT_ENUM>(
3040230402
4 => simd_and(k1, simd_ne(a, b)),
3040330403
5 => simd_and(k1, simd_ge(a, b)),
3040430404
6 => simd_and(k1, simd_gt(a, b)),
30405-
_ => i32x4::splat(-1),
30405+
_ => k1,
3040630406
};
3040730407
simd_bitmask(r)
3040830408
}
@@ -30856,7 +30856,7 @@ pub unsafe fn _mm512_mask_cmp_epu64_mask<const IMM3: _MM_CMPINT_ENUM>(
3085630856
4 => simd_and(k1, simd_ne(a, b)),
3085730857
5 => simd_and(k1, simd_ge(a, b)),
3085830858
6 => simd_and(k1, simd_gt(a, b)),
30859-
_ => i64x8::splat(-1),
30859+
_ => k1,
3086030860
};
3086130861
simd_bitmask(r)
3086230862
}
@@ -30914,7 +30914,7 @@ pub unsafe fn _mm256_mask_cmp_epu64_mask<const IMM3: _MM_CMPINT_ENUM>(
3091430914
4 => simd_and(k1, simd_ne(a, b)),
3091530915
5 => simd_and(k1, simd_ge(a, b)),
3091630916
6 => simd_and(k1, simd_gt(a, b)),
30917-
_ => i64x4::splat(-1),
30917+
_ => k1,
3091830918
};
3091930919
simd_bitmask(r)
3092030920
}
@@ -30969,7 +30969,7 @@ pub unsafe fn _mm_mask_cmp_epu64_mask<const IMM3: _MM_CMPINT_ENUM>(
3096930969
4 => simd_and(k1, simd_ne(a, b)),
3097030970
5 => simd_and(k1, simd_ge(a, b)),
3097130971
6 => simd_and(k1, simd_gt(a, b)),
30972-
_ => i64x2::splat(-1),
30972+
_ => k1,
3097330973
};
3097430974
simd_bitmask(r)
3097530975
}
@@ -31423,7 +31423,7 @@ pub unsafe fn _mm512_mask_cmp_epi64_mask<const IMM3: _MM_CMPINT_ENUM>(
3142331423
4 => simd_and(k1, simd_ne(a, b)),
3142431424
5 => simd_and(k1, simd_ge(a, b)),
3142531425
6 => simd_and(k1, simd_gt(a, b)),
31426-
_ => i64x8::splat(-1),
31426+
_ => k1,
3142731427
};
3142831428
simd_bitmask(r)
3142931429
}
@@ -31481,7 +31481,7 @@ pub unsafe fn _mm256_mask_cmp_epi64_mask<const IMM3: _MM_CMPINT_ENUM>(
3148131481
4 => simd_and(k1, simd_ne(a, b)),
3148231482
5 => simd_and(k1, simd_ge(a, b)),
3148331483
6 => simd_and(k1, simd_gt(a, b)),
31484-
_ => i64x4::splat(-1),
31484+
_ => k1,
3148531485
};
3148631486
simd_bitmask(r)
3148731487
}
@@ -31536,7 +31536,7 @@ pub unsafe fn _mm_mask_cmp_epi64_mask<const IMM3: _MM_CMPINT_ENUM>(
3153631536
4 => simd_and(k1, simd_ne(a, b)),
3153731537
5 => simd_and(k1, simd_ge(a, b)),
3153831538
6 => simd_and(k1, simd_gt(a, b)),
31539-
_ => i64x2::splat(-1),
31539+
_ => k1,
3154031540
};
3154131541
simd_bitmask(r)
3154231542
}

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