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removed stagnant code
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+36
-49
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  • crates/core_arch/src/x86_64

1 file changed

+36
-49
lines changed

crates/core_arch/src/x86_64/amx.rs

Lines changed: 36 additions & 49 deletions
Original file line numberDiff line numberDiff line change
@@ -28,13 +28,12 @@ pub unsafe fn _tile_storeconfig(mem_addr: *mut i8) {
2828
///
2929
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_loadd&ig_expand=6877)
3030
#[inline]
31-
#[allow(non_upper_case_globals)]
3231
#[rustc_legacy_const_generics(0)]
3332
#[target_feature(enable = "amx-tile")]
3433
#[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
35-
pub unsafe fn _tile_loadd<const dst: i8>(base: *const i8, stride: usize) {
36-
static_assert_uimm_bits!(dst, 3);
37-
tileloadd64(dst, base, stride);
34+
pub unsafe fn _tile_loadd<const DST: i8>(base: *const i8, stride: usize) {
35+
static_assert_uimm_bits!(DST, 3);
36+
tileloadd64(DST, base, stride);
3837
}
3938

4039
/// Release the tile configuration to return to the init state, which releases all storage it currently holds.
@@ -51,13 +50,12 @@ pub unsafe fn _tile_release() {
5150
///
5251
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_stored&ig_expand=6881)
5352
#[inline]
54-
#[allow(non_upper_case_globals)]
5553
#[rustc_legacy_const_generics(0)]
5654
#[target_feature(enable = "amx-tile")]
5755
#[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
58-
pub unsafe fn _tile_stored<const dst: i8>(base: *mut i8, stride: usize) {
59-
static_assert_uimm_bits!(dst, 3);
60-
tilestored64(dst, base, stride);
56+
pub unsafe fn _tile_stored<const DST: i8>(base: *mut i8, stride: usize) {
57+
static_assert_uimm_bits!(DST, 3);
58+
tilestored64(DST, base, stride);
6159
}
6260

6361
/// Load tile rows from memory specifieid by base address and stride into destination tile dst using the tile configuration
@@ -66,26 +64,24 @@ pub unsafe fn _tile_stored<const dst: i8>(base: *mut i8, stride: usize) {
6664
///
6765
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_stream_loadd&ig_expand=6883)
6866
#[inline]
69-
#[allow(non_upper_case_globals)]
7067
#[rustc_legacy_const_generics(0)]
7168
#[target_feature(enable = "amx-tile")]
7269
#[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
73-
pub unsafe fn _tile_stream_loadd<const dst: i8>(base: *const i8, stride: usize) {
74-
static_assert_uimm_bits!(dst, 3);
75-
tileloaddt164(dst, base, stride);
70+
pub unsafe fn _tile_stream_loadd<const DST: i8>(base: *const i8, stride: usize) {
71+
static_assert_uimm_bits!(DST, 3);
72+
tileloaddt164(DST, base, stride);
7673
}
7774

7875
/// Zero the tile specified by tdest.
7976
///
8077
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_zero&ig_expand=6885)
8178
#[inline]
82-
#[allow(non_upper_case_globals)]
8379
#[rustc_legacy_const_generics(0)]
8480
#[target_feature(enable = "amx-tile")]
8581
#[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
86-
pub unsafe fn _tile_zero<const dst: i8>() {
87-
static_assert_uimm_bits!(dst, 3);
88-
tilezero(dst);
82+
pub unsafe fn _tile_zero<const DST: i8>() {
83+
static_assert_uimm_bits!(DST, 3);
84+
tilezero(DST);
8985
}
9086

9187
/// Compute dot-product of BF16 (16-bit) floating-point pairs in tiles a and b,
@@ -94,15 +90,14 @@ pub unsafe fn _tile_zero<const dst: i8>() {
9490
///
9591
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_dpbf16ps&ig_expand=6864)
9692
#[inline]
97-
#[allow(non_upper_case_globals)]
9893
#[rustc_legacy_const_generics(0, 1, 2)]
9994
#[target_feature(enable = "amx-bf16")]
10095
#[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
101-
pub unsafe fn _tile_dpbf16ps<const dst: i8, const A: i8, const B: i8>() {
102-
static_assert_uimm_bits!(dst, 3);
96+
pub unsafe fn _tile_dpbf16ps<const DST: i8, const A: i8, const B: i8>() {
97+
static_assert_uimm_bits!(DST, 3);
10398
static_assert_uimm_bits!(A, 3);
10499
static_assert_uimm_bits!(B, 3);
105-
tdpbf16ps(dst, A, B);
100+
tdpbf16ps(DST, A, B);
106101
}
107102

108103
/// Compute dot-product of bytes in tiles with a source/destination accumulator.
@@ -112,15 +107,14 @@ pub unsafe fn _tile_dpbf16ps<const dst: i8, const A: i8, const B: i8>() {
112107
///
113108
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_dpbssd&ig_expand=6866)
114109
#[inline]
115-
#[allow(non_upper_case_globals)]
116110
#[rustc_legacy_const_generics(0, 1, 2)]
117111
#[target_feature(enable = "amx-int8")]
118112
#[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
119-
pub unsafe fn _tile_dpbssd<const dst: i8, const A: i8, const B: i8>() {
120-
static_assert_uimm_bits!(dst, 3);
113+
pub unsafe fn _tile_dpbssd<const DST: i8, const A: i8, const B: i8>() {
114+
static_assert_uimm_bits!(DST, 3);
121115
static_assert_uimm_bits!(A, 3);
122116
static_assert_uimm_bits!(B, 3);
123-
tdpbssd(dst, A, B);
117+
tdpbssd(DST, A, B);
124118
}
125119

126120
/// Compute dot-product of bytes in tiles with a source/destination accumulator.
@@ -130,15 +124,14 @@ pub unsafe fn _tile_dpbssd<const dst: i8, const A: i8, const B: i8>() {
130124
///
131125
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_dpbsud&ig_expand=6868)
132126
#[inline]
133-
#[allow(non_upper_case_globals)]
134127
#[rustc_legacy_const_generics(0, 1, 2)]
135128
#[target_feature(enable = "amx-int8")]
136129
#[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
137-
pub unsafe fn _tile_dpbsud<const dst: i8, const A: i8, const B: i8>() {
138-
static_assert_uimm_bits!(dst, 3);
130+
pub unsafe fn _tile_dpbsud<const DST: i8, const A: i8, const B: i8>() {
131+
static_assert_uimm_bits!(DST, 3);
139132
static_assert_uimm_bits!(A, 3);
140133
static_assert_uimm_bits!(B, 3);
141-
tdpbsud(dst, A, B);
134+
tdpbsud(DST, A, B);
142135
}
143136

144137
/// Compute dot-product of bytes in tiles with a source/destination accumulator.
@@ -148,15 +141,14 @@ pub unsafe fn _tile_dpbsud<const dst: i8, const A: i8, const B: i8>() {
148141
///
149142
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_dpbusd&ig_expand=6870)
150143
#[inline]
151-
#[allow(non_upper_case_globals)]
152144
#[rustc_legacy_const_generics(0, 1, 2)]
153145
#[target_feature(enable = "amx-int8")]
154146
#[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
155-
pub unsafe fn _tile_dpbusd<const dst: i8, const A: i8, const B: i8>() {
156-
static_assert_uimm_bits!(dst, 3);
147+
pub unsafe fn _tile_dpbusd<const DST: i8, const A: i8, const B: i8>() {
148+
static_assert_uimm_bits!(DST, 3);
157149
static_assert_uimm_bits!(A, 3);
158150
static_assert_uimm_bits!(B, 3);
159-
tdpbusd(dst, A, B);
151+
tdpbusd(DST, A, B);
160152
}
161153

162154
/// Compute dot-product of bytes in tiles with a source/destination accumulator.
@@ -166,15 +158,14 @@ pub unsafe fn _tile_dpbusd<const dst: i8, const A: i8, const B: i8>() {
166158
///
167159
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_dpbuud&ig_expand=6872)
168160
#[inline]
169-
#[allow(non_upper_case_globals)]
170161
#[rustc_legacy_const_generics(0, 1, 2)]
171162
#[target_feature(enable = "amx-int8")]
172163
#[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
173-
pub unsafe fn _tile_dpbuud<const dst: i8, const A: i8, const B: i8>() {
174-
static_assert_uimm_bits!(dst, 3);
164+
pub unsafe fn _tile_dpbuud<const DST: i8, const A: i8, const B: i8>() {
165+
static_assert_uimm_bits!(DST, 3);
175166
static_assert_uimm_bits!(A, 3);
176167
static_assert_uimm_bits!(B, 3);
177-
tdpbuud(dst, A, B);
168+
tdpbuud(DST, A, B);
178169
}
179170

180171
/// Compute dot-product of FP16 (16-bit) floating-point pairs in tiles a and b,
@@ -183,15 +174,14 @@ pub unsafe fn _tile_dpbuud<const dst: i8, const A: i8, const B: i8>() {
183174
///
184175
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_dpfp16ps&ig_expand=6874)
185176
#[inline]
186-
#[allow(non_upper_case_globals)]
187177
#[rustc_legacy_const_generics(0, 1, 2)]
188178
#[target_feature(enable = "amx-fp16")]
189179
#[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
190-
pub unsafe fn _tile_dpfp16ps<const dst: i8, const A: i8, const B: i8>() {
191-
static_assert_uimm_bits!(dst, 3);
180+
pub unsafe fn _tile_dpfp16ps<const DST: i8, const A: i8, const B: i8>() {
181+
static_assert_uimm_bits!(DST, 3);
192182
static_assert_uimm_bits!(A, 3);
193183
static_assert_uimm_bits!(B, 3);
194-
tdpfp16ps(dst, A, B);
184+
tdpfp16ps(DST, A, B);
195185
}
196186

197187
/// Perform matrix multiplication of two tiles containing complex elements and accumulate the results into a packed single precision tile.
@@ -204,15 +194,14 @@ pub unsafe fn _tile_dpfp16ps<const dst: i8, const A: i8, const B: i8>() {
204194
///
205195
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_cmmimfp16ps&ig_expand=6860)
206196
#[inline]
207-
#[allow(non_upper_case_globals)]
208197
#[rustc_legacy_const_generics(0, 1, 2)]
209198
#[target_feature(enable = "amx-complex")]
210199
#[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
211-
pub unsafe fn _tile_cmmimfp16ps<const dst: i8, const A: i8, const B: i8>() {
212-
static_assert_uimm_bits!(dst, 3);
200+
pub unsafe fn _tile_cmmimfp16ps<const DST: i8, const A: i8, const B: i8>() {
201+
static_assert_uimm_bits!(DST, 3);
213202
static_assert_uimm_bits!(A, 3);
214203
static_assert_uimm_bits!(B, 3);
215-
tcmmimfp16ps(dst, A, B);
204+
tcmmimfp16ps(DST, A, B);
216205
}
217206

218207
/// Perform matrix multiplication of two tiles containing complex elements and accumulate the results into a packed single precision tile.
@@ -225,19 +214,17 @@ pub unsafe fn _tile_cmmimfp16ps<const dst: i8, const A: i8, const B: i8>() {
225214
///
226215
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_cmmrlfp16ps&ig_expand=6862)
227216
#[inline]
228-
#[allow(non_upper_case_globals)]
229217
#[rustc_legacy_const_generics(0, 1, 2)]
230218
#[target_feature(enable = "amx-complex")]
231219
#[unstable(feature = "x86_amx_intrinsics", issue = "126622")]
232-
pub unsafe fn _tile_cmmrlfp16ps<const dst: i8, const A: i8, const B: i8>() {
233-
static_assert_uimm_bits!(dst, 3);
220+
pub unsafe fn _tile_cmmrlfp16ps<const DST: i8, const A: i8, const B: i8>() {
221+
static_assert_uimm_bits!(DST, 3);
234222
static_assert_uimm_bits!(A, 3);
235223
static_assert_uimm_bits!(B, 3);
236-
tcmmrlfp16ps(dst, A, B);
224+
tcmmrlfp16ps(DST, A, B);
237225
}
238226

239227
#[allow(improper_ctypes)]
240-
#[allow(clashing_extern_declarations)]
241228
extern "C" {
242229
#[link_name = "llvm.x86.ldtilecfg"]
243230
fn ldtilecfg(mem_addr: *const i8);

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