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JamesbarfordAmanieu
Jamesbarford
authored and
Amanieu
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fix non-working intrinsics
1 parent 0b148f1 commit 13219b5

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4 files changed

+1056
-1106
lines changed

4 files changed

+1056
-1106
lines changed

Diff for: ‎crates/core_arch/src/arm/neon.rs

+127
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,136 @@
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use crate::core_arch::arm_shared::neon::*;
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#[cfg(test)]
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use stdarch_test::assert_instr;
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#[allow(improper_ctypes)]
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unsafe extern "unadjusted" {
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#[link_name = "llvm.arm.neon.vbsl.v8i8"]
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fn vbsl_s8_(a: int8x8_t, b: int8x8_t, c: int8x8_t) -> int8x8_t;
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#[link_name = "llvm.arm.neon.vbsl.v16i8"]
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fn vbslq_s8_(a: int8x16_t, b: int8x16_t, c: int8x16_t) -> int8x16_t;
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}
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#[doc = "Shift Left and Insert (immediate)"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsli_n_p64)"]
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#[doc = "## Safety"]
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#[doc = " * Neon instrinsic unsafe"]
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#[inline]
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#[cfg(target_arch = "arm")]
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#[target_feature(enable = "neon,v7,aes")]
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#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
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#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsli.64", N = 1))]
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#[rustc_legacy_const_generics(2)]
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pub unsafe fn vsli_n_p64<const N: i32>(a: poly64x1_t, b: poly64x1_t) -> poly64x1_t {
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static_assert!(0 <= N && N <= 63);
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transmute(vshiftins_v1i64(
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transmute(a),
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transmute(b),
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int64x1_t::splat(N as i64),
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))
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}
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#[doc = "Shift Left and Insert (immediate)"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsliq_n_p64)"]
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#[doc = "## Safety"]
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#[doc = " * Neon instrinsic unsafe"]
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#[inline]
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#[cfg(target_endian = "little")]
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#[cfg(target_arch = "arm")]
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#[target_feature(enable = "neon,v7,aes")]
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#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
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#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsli.64", N = 1))]
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#[rustc_legacy_const_generics(2)]
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pub unsafe fn vsliq_n_p64<const N: i32>(a: poly64x2_t, b: poly64x2_t) -> poly64x2_t {
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static_assert!(0 <= N && N <= 63);
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transmute(vshiftins_v2i64(
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transmute(a),
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transmute(b),
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int64x2_t::splat(N as i64),
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))
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}
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#[doc = "Shift Left and Insert (immediate)"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsliq_n_p64)"]
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#[doc = "## Safety"]
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#[doc = " * Neon instrinsic unsafe"]
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#[inline]
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#[cfg(target_endian = "big")]
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#[cfg(target_arch = "arm")]
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#[target_feature(enable = "neon,v7,aes")]
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#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
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#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsli.64", N = 1))]
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#[rustc_legacy_const_generics(2)]
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pub unsafe fn vsliq_n_p64<const N: i32>(a: poly64x2_t, b: poly64x2_t) -> poly64x2_t {
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static_assert!(0 <= N && N <= 63);
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let a: poly64x2_t = simd_shuffle!(a, a, [0, 1]);
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let b: poly64x2_t = simd_shuffle!(b, b, [0, 1]);
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let ret_val: poly64x2_t = transmute(vshiftins_v2i64(
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transmute(a),
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transmute(b),
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int64x2_t::splat(N as i64),
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));
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simd_shuffle!(ret_val, ret_val, [0, 1])
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}
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#[doc = "Shift Right and Insert (immediate)"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsri_n_p64)"]
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#[doc = "## Safety"]
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#[doc = " * Neon instrinsic unsafe"]
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#[inline]
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#[cfg(target_arch = "arm")]
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#[target_feature(enable = "neon,v7,aes")]
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#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
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#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsri.64", N = 1))]
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#[rustc_legacy_const_generics(2)]
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pub unsafe fn vsri_n_p64<const N: i32>(a: poly64x1_t, b: poly64x1_t) -> poly64x1_t {
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static_assert!(1 <= N && N <= 64);
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transmute(vshiftins_v1i64(
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transmute(a),
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transmute(b),
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int64x1_t::splat(-N as i64),
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))
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}
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#[doc = "Shift Right and Insert (immediate)"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsriq_n_p64)"]
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#[doc = "## Safety"]
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#[doc = " * Neon instrinsic unsafe"]
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#[inline]
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#[cfg(target_endian = "little")]
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#[cfg(target_arch = "arm")]
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#[target_feature(enable = "neon,v7,aes")]
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#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
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#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsri.64", N = 1))]
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#[rustc_legacy_const_generics(2)]
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pub unsafe fn vsriq_n_p64<const N: i32>(a: poly64x2_t, b: poly64x2_t) -> poly64x2_t {
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static_assert!(1 <= N && N <= 64);
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transmute(vshiftins_v2i64(
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transmute(a),
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transmute(b),
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int64x2_t::splat(-N as i64),
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))
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}
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#[doc = "Shift Right and Insert (immediate)"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsriq_n_p64)"]
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#[doc = "## Safety"]
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#[doc = " * Neon instrinsic unsafe"]
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#[inline]
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#[cfg(target_endian = "big")]
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#[cfg(target_arch = "arm")]
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#[target_feature(enable = "neon,v7,aes")]
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#[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]
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#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsri.64", N = 1))]
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#[rustc_legacy_const_generics(2)]
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pub unsafe fn vsriq_n_p64<const N: i32>(a: poly64x2_t, b: poly64x2_t) -> poly64x2_t {
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static_assert!(1 <= N && N <= 64);
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let a: poly64x2_t = simd_shuffle!(a, a, [0, 1]);
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let b: poly64x2_t = simd_shuffle!(b, b, [0, 1]);
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let ret_val: poly64x2_t = transmute(vshiftins_v2i64(
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transmute(a),
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transmute(b),
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int64x2_t::splat(-N as i64),
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));
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simd_shuffle!(ret_val, ret_val, [0, 1])
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}

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