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Auto merge of #115580 - eduardosm:stdarch-intrinsics, r=davidtwco,bjorn3
Update stdarch submodule and remove special handling in cranelift codegen for some AVX and SSE2 LLVM intrinsics rust-lang/stdarch#1463 reimplemented some x86 intrinsics to avoid using some x86-specific LLVM intrinsics: * Store unaligned (`_mm*_storeu_*`) use `<*mut _>::write_unaligned` instead of `llvm.x86.*.storeu.*`. * Shift by immediate (`_mm*_s{ll,rl,ra}i_epi*`) use `if` (srl, sll) or `min` (sra) to simulate the behaviour when the RHS is out of range. RHS is constant, so the `if`/`min` will be optimized away. This PR updates the stdarch submodule to pull these changes and removes special handling for those LLVM intrinsics from cranelift codegen. I left gcc codegen untouched because there are some autogenerated lists.
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Diff for: ‎compiler/rustc_codegen_cranelift/src/intrinsics/llvm_x86.rs

-248
Original file line numberDiff line numberDiff line change
@@ -177,244 +177,6 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>(
177177
bool_to_zero_or_max_uint(fx, res_lane_ty, res_lane)
178178
});
179179
}
180-
"llvm.x86.sse2.psrli.d" => {
181-
let (a, imm8) = match args {
182-
[a, imm8] => (a, imm8),
183-
_ => bug!("wrong number of args for intrinsic {intrinsic}"),
184-
};
185-
let a = codegen_operand(fx, a);
186-
let imm8 = crate::constant::mir_operand_get_const_val(fx, imm8)
187-
.expect("llvm.x86.sse2.psrli.d imm8 not const");
188-
189-
simd_for_each_lane(fx, a, ret, &|fx, _lane_ty, _res_lane_ty, lane| match imm8
190-
.try_to_bits(Size::from_bytes(4))
191-
.unwrap_or_else(|| panic!("imm8 not scalar: {:?}", imm8))
192-
{
193-
imm8 if imm8 < 32 => fx.bcx.ins().ushr_imm(lane, i64::from(imm8 as u8)),
194-
_ => fx.bcx.ins().iconst(types::I32, 0),
195-
});
196-
}
197-
"llvm.x86.sse2.psrai.d" => {
198-
let (a, imm8) = match args {
199-
[a, imm8] => (a, imm8),
200-
_ => bug!("wrong number of args for intrinsic {intrinsic}"),
201-
};
202-
let a = codegen_operand(fx, a);
203-
let imm8 = crate::constant::mir_operand_get_const_val(fx, imm8)
204-
.expect("llvm.x86.sse2.psrai.d imm8 not const");
205-
206-
simd_for_each_lane(fx, a, ret, &|fx, _lane_ty, _res_lane_ty, lane| match imm8
207-
.try_to_bits(Size::from_bytes(4))
208-
.unwrap_or_else(|| panic!("imm8 not scalar: {:?}", imm8))
209-
{
210-
imm8 if imm8 < 32 => fx.bcx.ins().sshr_imm(lane, i64::from(imm8 as u8)),
211-
_ => fx.bcx.ins().iconst(types::I32, 0),
212-
});
213-
}
214-
"llvm.x86.sse2.pslli.d" => {
215-
let (a, imm8) = match args {
216-
[a, imm8] => (a, imm8),
217-
_ => bug!("wrong number of args for intrinsic {intrinsic}"),
218-
};
219-
let a = codegen_operand(fx, a);
220-
let imm8 = crate::constant::mir_operand_get_const_val(fx, imm8)
221-
.expect("llvm.x86.sse2.pslli.d imm8 not const");
222-
223-
simd_for_each_lane(fx, a, ret, &|fx, _lane_ty, _res_lane_ty, lane| match imm8
224-
.try_to_bits(Size::from_bytes(4))
225-
.unwrap_or_else(|| panic!("imm8 not scalar: {:?}", imm8))
226-
{
227-
imm8 if imm8 < 32 => fx.bcx.ins().ishl_imm(lane, i64::from(imm8 as u8)),
228-
_ => fx.bcx.ins().iconst(types::I32, 0),
229-
});
230-
}
231-
"llvm.x86.sse2.psrli.w" => {
232-
let (a, imm8) = match args {
233-
[a, imm8] => (a, imm8),
234-
_ => bug!("wrong number of args for intrinsic {intrinsic}"),
235-
};
236-
let a = codegen_operand(fx, a);
237-
let imm8 = crate::constant::mir_operand_get_const_val(fx, imm8)
238-
.expect("llvm.x86.sse2.psrli.d imm8 not const");
239-
240-
simd_for_each_lane(fx, a, ret, &|fx, _lane_ty, _res_lane_ty, lane| match imm8
241-
.try_to_bits(Size::from_bytes(4))
242-
.unwrap_or_else(|| panic!("imm8 not scalar: {:?}", imm8))
243-
{
244-
imm8 if imm8 < 16 => fx.bcx.ins().ushr_imm(lane, i64::from(imm8 as u8)),
245-
_ => fx.bcx.ins().iconst(types::I32, 0),
246-
});
247-
}
248-
"llvm.x86.sse2.psrai.w" => {
249-
let (a, imm8) = match args {
250-
[a, imm8] => (a, imm8),
251-
_ => bug!("wrong number of args for intrinsic {intrinsic}"),
252-
};
253-
let a = codegen_operand(fx, a);
254-
let imm8 = crate::constant::mir_operand_get_const_val(fx, imm8)
255-
.expect("llvm.x86.sse2.psrai.d imm8 not const");
256-
257-
simd_for_each_lane(fx, a, ret, &|fx, _lane_ty, _res_lane_ty, lane| match imm8
258-
.try_to_bits(Size::from_bytes(4))
259-
.unwrap_or_else(|| panic!("imm8 not scalar: {:?}", imm8))
260-
{
261-
imm8 if imm8 < 16 => fx.bcx.ins().sshr_imm(lane, i64::from(imm8 as u8)),
262-
_ => fx.bcx.ins().iconst(types::I32, 0),
263-
});
264-
}
265-
"llvm.x86.sse2.pslli.w" => {
266-
let (a, imm8) = match args {
267-
[a, imm8] => (a, imm8),
268-
_ => bug!("wrong number of args for intrinsic {intrinsic}"),
269-
};
270-
let a = codegen_operand(fx, a);
271-
let imm8 = crate::constant::mir_operand_get_const_val(fx, imm8)
272-
.expect("llvm.x86.sse2.pslli.d imm8 not const");
273-
274-
simd_for_each_lane(fx, a, ret, &|fx, _lane_ty, _res_lane_ty, lane| match imm8
275-
.try_to_bits(Size::from_bytes(4))
276-
.unwrap_or_else(|| panic!("imm8 not scalar: {:?}", imm8))
277-
{
278-
imm8 if imm8 < 16 => fx.bcx.ins().ishl_imm(lane, i64::from(imm8 as u8)),
279-
_ => fx.bcx.ins().iconst(types::I32, 0),
280-
});
281-
}
282-
"llvm.x86.avx.psrli.d" => {
283-
let (a, imm8) = match args {
284-
[a, imm8] => (a, imm8),
285-
_ => bug!("wrong number of args for intrinsic {intrinsic}"),
286-
};
287-
let a = codegen_operand(fx, a);
288-
let imm8 = crate::constant::mir_operand_get_const_val(fx, imm8)
289-
.expect("llvm.x86.avx.psrli.d imm8 not const");
290-
291-
simd_for_each_lane(fx, a, ret, &|fx, _lane_ty, _res_lane_ty, lane| match imm8
292-
.try_to_bits(Size::from_bytes(4))
293-
.unwrap_or_else(|| panic!("imm8 not scalar: {:?}", imm8))
294-
{
295-
imm8 if imm8 < 32 => fx.bcx.ins().ushr_imm(lane, i64::from(imm8 as u8)),
296-
_ => fx.bcx.ins().iconst(types::I32, 0),
297-
});
298-
}
299-
"llvm.x86.avx.psrai.d" => {
300-
let (a, imm8) = match args {
301-
[a, imm8] => (a, imm8),
302-
_ => bug!("wrong number of args for intrinsic {intrinsic}"),
303-
};
304-
let a = codegen_operand(fx, a);
305-
let imm8 = crate::constant::mir_operand_get_const_val(fx, imm8)
306-
.expect("llvm.x86.avx.psrai.d imm8 not const");
307-
308-
simd_for_each_lane(fx, a, ret, &|fx, _lane_ty, _res_lane_ty, lane| match imm8
309-
.try_to_bits(Size::from_bytes(4))
310-
.unwrap_or_else(|| panic!("imm8 not scalar: {:?}", imm8))
311-
{
312-
imm8 if imm8 < 32 => fx.bcx.ins().sshr_imm(lane, i64::from(imm8 as u8)),
313-
_ => fx.bcx.ins().iconst(types::I32, 0),
314-
});
315-
}
316-
"llvm.x86.sse2.psrli.q" => {
317-
let (a, imm8) = match args {
318-
[a, imm8] => (a, imm8),
319-
_ => bug!("wrong number of args for intrinsic {intrinsic}"),
320-
};
321-
let a = codegen_operand(fx, a);
322-
let imm8 = crate::constant::mir_operand_get_const_val(fx, imm8)
323-
.expect("llvm.x86.avx.psrli.q imm8 not const");
324-
325-
simd_for_each_lane(fx, a, ret, &|fx, _lane_ty, _res_lane_ty, lane| match imm8
326-
.try_to_bits(Size::from_bytes(4))
327-
.unwrap_or_else(|| panic!("imm8 not scalar: {:?}", imm8))
328-
{
329-
imm8 if imm8 < 64 => fx.bcx.ins().ushr_imm(lane, i64::from(imm8 as u8)),
330-
_ => fx.bcx.ins().iconst(types::I32, 0),
331-
});
332-
}
333-
"llvm.x86.sse2.pslli.q" => {
334-
let (a, imm8) = match args {
335-
[a, imm8] => (a, imm8),
336-
_ => bug!("wrong number of args for intrinsic {intrinsic}"),
337-
};
338-
let a = codegen_operand(fx, a);
339-
let imm8 = crate::constant::mir_operand_get_const_val(fx, imm8)
340-
.expect("llvm.x86.avx.pslli.q imm8 not const");
341-
342-
simd_for_each_lane(fx, a, ret, &|fx, _lane_ty, _res_lane_ty, lane| match imm8
343-
.try_to_bits(Size::from_bytes(4))
344-
.unwrap_or_else(|| panic!("imm8 not scalar: {:?}", imm8))
345-
{
346-
imm8 if imm8 < 64 => fx.bcx.ins().ishl_imm(lane, i64::from(imm8 as u8)),
347-
_ => fx.bcx.ins().iconst(types::I32, 0),
348-
});
349-
}
350-
"llvm.x86.avx.pslli.d" => {
351-
let (a, imm8) = match args {
352-
[a, imm8] => (a, imm8),
353-
_ => bug!("wrong number of args for intrinsic {intrinsic}"),
354-
};
355-
let a = codegen_operand(fx, a);
356-
let imm8 = crate::constant::mir_operand_get_const_val(fx, imm8)
357-
.expect("llvm.x86.avx.pslli.d imm8 not const");
358-
359-
simd_for_each_lane(fx, a, ret, &|fx, _lane_ty, _res_lane_ty, lane| match imm8
360-
.try_to_bits(Size::from_bytes(4))
361-
.unwrap_or_else(|| panic!("imm8 not scalar: {:?}", imm8))
362-
{
363-
imm8 if imm8 < 32 => fx.bcx.ins().ishl_imm(lane, i64::from(imm8 as u8)),
364-
_ => fx.bcx.ins().iconst(types::I32, 0),
365-
});
366-
}
367-
"llvm.x86.avx2.psrli.w" => {
368-
let (a, imm8) = match args {
369-
[a, imm8] => (a, imm8),
370-
_ => bug!("wrong number of args for intrinsic {intrinsic}"),
371-
};
372-
let a = codegen_operand(fx, a);
373-
let imm8 = crate::constant::mir_operand_get_const_val(fx, imm8)
374-
.expect("llvm.x86.avx.psrli.w imm8 not const");
375-
376-
simd_for_each_lane(fx, a, ret, &|fx, _lane_ty, _res_lane_ty, lane| match imm8
377-
.try_to_bits(Size::from_bytes(4))
378-
.unwrap_or_else(|| panic!("imm8 not scalar: {:?}", imm8))
379-
{
380-
imm8 if imm8 < 16 => fx.bcx.ins().ushr_imm(lane, i64::from(imm8 as u8)),
381-
_ => fx.bcx.ins().iconst(types::I32, 0),
382-
});
383-
}
384-
"llvm.x86.avx2.psrai.w" => {
385-
let (a, imm8) = match args {
386-
[a, imm8] => (a, imm8),
387-
_ => bug!("wrong number of args for intrinsic {intrinsic}"),
388-
};
389-
let a = codegen_operand(fx, a);
390-
let imm8 = crate::constant::mir_operand_get_const_val(fx, imm8)
391-
.expect("llvm.x86.avx.psrai.w imm8 not const");
392-
393-
simd_for_each_lane(fx, a, ret, &|fx, _lane_ty, _res_lane_ty, lane| match imm8
394-
.try_to_bits(Size::from_bytes(4))
395-
.unwrap_or_else(|| panic!("imm8 not scalar: {:?}", imm8))
396-
{
397-
imm8 if imm8 < 16 => fx.bcx.ins().sshr_imm(lane, i64::from(imm8 as u8)),
398-
_ => fx.bcx.ins().iconst(types::I32, 0),
399-
});
400-
}
401-
"llvm.x86.avx2.pslli.w" => {
402-
let (a, imm8) = match args {
403-
[a, imm8] => (a, imm8),
404-
_ => bug!("wrong number of args for intrinsic {intrinsic}"),
405-
};
406-
let a = codegen_operand(fx, a);
407-
let imm8 = crate::constant::mir_operand_get_const_val(fx, imm8)
408-
.expect("llvm.x86.avx.pslli.w imm8 not const");
409-
410-
simd_for_each_lane(fx, a, ret, &|fx, _lane_ty, _res_lane_ty, lane| match imm8
411-
.try_to_bits(Size::from_bytes(4))
412-
.unwrap_or_else(|| panic!("imm8 not scalar: {:?}", imm8))
413-
{
414-
imm8 if imm8 < 16 => fx.bcx.ins().ishl_imm(lane, i64::from(imm8 as u8)),
415-
_ => fx.bcx.ins().iconst(types::I32, 0),
416-
});
417-
}
418180
"llvm.x86.ssse3.pshuf.b.128" | "llvm.x86.avx2.pshuf.b" => {
419181
let (a, b) = match args {
420182
[a, b] => (a, b),
@@ -506,14 +268,6 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>(
506268
ret.place_lane(fx, 2).to_ptr().store(fx, res_2, MemFlags::trusted());
507269
ret.place_lane(fx, 3).to_ptr().store(fx, res_3, MemFlags::trusted());
508270
}
509-
"llvm.x86.sse2.storeu.dq" | "llvm.x86.sse2.storeu.pd" => {
510-
intrinsic_args!(fx, args => (mem_addr, a); intrinsic);
511-
let mem_addr = mem_addr.load_scalar(fx);
512-
513-
// FIXME correctly handle the unalignment
514-
let dest = CPlace::for_ptr(Pointer::new(mem_addr), a.layout());
515-
dest.write_cvalue(fx, a);
516-
}
517271
"llvm.x86.ssse3.pabs.b.128" | "llvm.x86.ssse3.pabs.w.128" | "llvm.x86.ssse3.pabs.d.128" => {
518272
let a = match args {
519273
[a] => a,
@@ -571,8 +325,6 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>(
571325
// llvm.x86.avx2.vperm2i128
572326
// llvm.x86.ssse3.pshuf.b.128
573327
// llvm.x86.avx2.pshuf.b
574-
// llvm.x86.avx2.psrli.w
575-
// llvm.x86.sse2.psrli.w
576328

577329
fn llvm_add_sub<'tcx>(
578330
fx: &mut FunctionCx<'_, '_, 'tcx>,

Diff for: ‎library/stdarch

Submodule stdarch updated 54 files

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