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Auto merge of #28079 - huonw:simd, r=alexcrichton
This adds a new Python script (compatible with 2.7 and 3.x) that will consume some JSON files that define a platform's intrinsics. It can output a file that defines the intrinsics in the compiler, or an `extern` block that will import them. The complexity of the generator is to be DRY: platforms (especially ARM and AArch64) have a lot of repetition with their intrinsics, for different versions with different types, so being able to write it once is nice.
2 parents f9f82f8 + 14f9c97 commit 2d3e837

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19 files changed

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-610
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19 files changed

+8173
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‎src/etc/platform-intrinsics/aarch64.json

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‎src/etc/platform-intrinsics/arm.json

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{
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"platform": "arm",
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"intrinsic_prefix": "arm_v",
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"llvm_prefix": "llvm.neon.v",
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"number_info": {
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"signed": {
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"kind": "s",
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"data_type": { "pattern": "s{bitwidth}" }
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},
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"unsigned": {
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"kind": "u",
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"data_type": { "pattern": "u{bitwidth}" }
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},
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"float": {
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"kind": "f",
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"data_type": { "pattern": "f{bitwidth}" }
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}
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},
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"width_info": {
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"64": { "width": "" },
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"128": { "width": "q" }
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},
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"intrinsics": [
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{
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"intrinsic": "hadd{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "hadd{0.kind}.{0.llvm_name}",
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"ret": "i(8-32)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "rhadd{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "rhadd{0.kind}.{0.llvm_name}",
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"ret": "i(8-32)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "qadd{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "qadd{0.kind}.{0.llvm_name}",
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"ret": "i(8-64)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "raddhn_{1.data_type}",
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"width": [64],
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"llvm": "raddhn.{0.llvm_name}",
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"ret": "i(8-32)",
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"args": ["0w", "0w"]
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},
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{
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"intrinsic": "fma{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "!llvm.fma.{0.llvm_name}",
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"ret": "f32",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "qdmulh{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "sqdmulh.{0.llvm_name}",
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"ret": "s(16-32)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "qrdmulh{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "sqrdmulh.{0.llvm_name}",
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"ret": "s(16-32)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "mull_{1.data_type}",
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"width": [128],
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"llvm": "mull{0.kind}.{0.llvm_name}",
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"ret": "i(16-64)",
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"args": ["0n", "0n"]
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},
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{
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"intrinsic": "qdmull{0.width}_{1.data_type}",
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"width": [128],
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"llvm": "sqdmull.{0.llvm_name}",
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"ret": "s(16-32)",
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"args": ["0n", "0n"]
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},
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{
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"intrinsic": "hsub{0.width}_{1.data_type}",
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"width": [64, 128],
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"llvm": "hsub{0.kind}.{0.llvm_name}",
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"ret": "i(8-32)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "qsub{0.width}_{1.data_type}",
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"width": [64, 128],
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"llvm": "qsub{0.kind}.{0.llvm_name}",
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"ret": "i(8-64)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "rsubhn_{1.data_type}",
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"width": [64],
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"llvm": "rsubhn.{0.llvm_name}",
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"ret": "i(8-32)",
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"args": ["0w", "0w"]
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},
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{
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"intrinsic": "abd{0.width}_{1.data_type}",
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"width": [64, 128],
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"llvm": "abd{0.kind}.{0.llvm_name}",
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"ret": ["i(8-32)","f32"],
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"args": ["0", "0"]
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},
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{
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"intrinsic": "max{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "max{0.kind}.{0.llvm_name}",
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"ret": ["i(8-32)","f32"],
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"args": ["0", "0"]
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},
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{
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"intrinsic": "min{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "min{0.kind}.{0.llvm_name}",
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"ret": ["i(8-32)","f32"],
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"args": ["0", "0"]
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},
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{
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"intrinsic": "shl{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "shl{0.kind}.{0.llvm_name}",
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"ret": "i(8-64)",
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"args": ["0", "0s"]
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},
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{
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"intrinsic": "qshl{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "qshl{0.kind}.{0.llvm_name}",
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"ret": "i(8-64)",
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"args": ["0", "0s"]
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},
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{
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"intrinsic": "rshl{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "rshl{0.kind}.{0.llvm_name}",
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"ret": "i(8-64)",
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"args": ["0", "0s"]
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},
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{
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"intrinsic": "qrshl{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "qrshl{0.kind}.{0.llvm_name}",
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"ret": "i(8-64)",
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"args": ["0", "0s"]
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},
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{
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"intrinsic": "qshrun_n_{1.data_type}",
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"width": [64],
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"llvm": "sqshrun.{0.llvm_name}",
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"ret": "s(8-32)",
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"args": ["0w", "U32"]
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},
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{
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"intrinsic": "qrshrun_n_{1.data_type}",
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"width": [64],
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"llvm": "sqrshrun.{0.llvm_name}",
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"ret": "s(8-32)",
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"args": ["0w", "U32"]
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},
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{
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"intrinsic": "qshrn_n_{1.data_type}",
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"width": [64],
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"llvm": "qshrn{0.kind}.{0.llvm_name}",
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"ret": "i(8-32)",
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"args": ["0w", "U32"]
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},
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{
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"intrinsic": "rshrn_n_{1.data_type}",
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"width": [64],
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"llvm": "rshrn.{0.llvm_name}",
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"ret": "i(8-32)",
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"args": ["0w", "U32"]
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},
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{
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"intrinsic": "qrshrn_n_{1.data_type}",
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"width": [64],
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"llvm": "qrshrn{0.kind}.{0.llvm_name}",
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"ret": "i(8-32)",
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"args": ["0w", "U32"]
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},
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{
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"intrinsic": "sri{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "vsri.{0.llvm_name}",
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"ret": "i(8-64)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "sli{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "vsli.{0.llvm_name}",
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"ret": "i(8-64)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "vqmovn_{1.data_type}",
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"width": [64],
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"llvm": "qxtn{0.kind}.{0.llvm_name}",
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"ret": "i(8-32)",
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"args": ["0w"]
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},
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{
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"intrinsic": "abs{0.width}_{0.data_type}",
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"width": [64,128],
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"llvm": "abs.{0.llvm_name}",
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"ret": "s(8-32)",
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"args": ["0"]
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},
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{
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"intrinsic": "abs{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "!llvm.fabs.{0.llvm_name}",
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"ret": "f32",
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"args": ["0"]
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},
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{
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"intrinsic": "qabs{0.width}_{0.data_type}",
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"width": [64,128],
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"llvm": "sqabs.{0.llvm_name}",
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"ret": "s(8-32)",
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"args": ["0"]
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},
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{
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"intrinsic": "qneg{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "sqneg.{0.llvm_name}",
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"ret": "s(8-32)",
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"args": ["0"]
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},
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{
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"intrinsic": "clz{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "!llvm.ctlz.{0.llvm_name}",
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"ret": "i(8-32)",
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"args": ["0"]
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},
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{
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"intrinsic": "cls{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "cls.{0.llvm_name}",
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"ret": "i(8-32)",
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"args": ["0"]
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},
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{
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"intrinsic": "cnt{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "!llvm.ctpop.{0.llvm_name}",
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"ret": "i8",
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"args": ["0"]
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},
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{
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"intrinsic": "recpe{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "recpe.{0.llvm_name}",
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"ret": ["u32","f32"],
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"args": ["0"]
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},
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{
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"intrinsic": "recps{0.width}_{0.data_type}",
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"width": [64,128],
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"llvm": "frecps.{0.llvm_name}",
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"ret": "f32",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "sqrt{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "!llvm.sqrt.{0.llvm_name}",
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"ret": "f32",
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"args": ["0"]
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},
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{
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"intrinsic": "rsqrte{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "rsqrte.{0.llvm_name}",
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"ret": ["u32","f32"],
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"args": ["0"]
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},
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{
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"intrinsic": "rsqrts{0.width}_{0.data_type}",
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"width": [64,128],
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"llvm": "rsqrts.{0.llvm_name}",
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"ret": "f32",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "bsl{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "bsl.{0.llvm_name}",
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"ret": "i(8-64)",
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"args": ["0u", "0"]
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},
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{
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"intrinsic": "padd{0.width}_{0.data_type}",
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"width": [64],
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"llvm": "padd.{0.llvm_name}",
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"ret": ["i(8-32)","f32"],
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"args": ["0", "0"]
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},
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{
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"intrinsic": "paddl{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "paddl{0.kind}.{0.llvm_name}.{1.llvm_name}",
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"ret": "i(16-64)",
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"args": ["0dn"]
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},
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{
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"intrinsic": "padal{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "padal{0.kind}.{0.llvm_name}.{1.llvm_name}",
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"ret": "i(16-64)",
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"args": ["0", "0dn"]
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},
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{
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"intrinsic": "pmax{0.width}_{0.data_type}",
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"width": [64],
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"llvm": "pmax{0.kind}.{0.llvm_name}",
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"ret": ["i(8-32)","f32"],
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"args": ["0", "0"]
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},
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{
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"intrinsic": "pmin{0.width}_{0.data_type}",
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"width": [64, 128],
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"llvm": "pmin{0.kind}.{0.llvm_name}",
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"ret": ["i(8-32)","f32"],
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"args": ["0", "0"]
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},
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{
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"intrinsic": "tbl1_{0.data_type}",
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"width": [64],
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"llvm": "tbl1",
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"ret": "i8",
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"args": ["0", "0u"]
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},
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{
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"intrinsic": "tbx1_{0.data_type}",
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"width": [64],
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"llvm": "tbx1",
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"ret": "i8",
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"args": ["0", "0", "0u"]
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},
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{
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"intrinsic": "tbl2_{0.data_type}",
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"width": [64],
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"llvm": "tbl2",
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"ret": "i8",
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"args": ["(0,0)f", "0u"]
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},
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{
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"intrinsic": "tbx2_{0.data_type}",
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"width": [64],
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"llvm": "tbx2",
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"ret": "i8",
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"args": ["(0,0)f", "0u"]
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},
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{
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"intrinsic": "tbl3_{0.data_type}",
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"width": [64],
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"llvm": "tbl3",
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"ret": "i8",
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"args": ["(0,0,0)f", "0u"]
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},
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{
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"intrinsic": "tbx3_{0.data_type}",
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"width": [64],
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"llvm": "tbx3",
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"ret": "i8",
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"args": ["0", "(0,0,0)f", "0u"]
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},
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{
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"intrinsic": "tbl4_{0.data_type}",
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"width": [64],
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"llvm": "tbl4",
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"ret": "i8",
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"args": ["(0,0,0,0)f", "0u"]
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},
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{
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"intrinsic": "tbx4_{0.data_type}",
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"width": [64],
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"llvm": "tbx4",
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"ret": "i8",
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"args": ["0", "(0,0,0,0)f", "0u"]
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}
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]
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}

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