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alexey-bataevalexey-bataev
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[SLP]Do not vectorize code in EH and non-returning blocks
The code in EH and non-returning blocks can be skipped by the vectorizer, since it does not add to the perfromance, just consumes compile/link time. Reviewers: RKSimon Reviewed By: RKSimon Pull Request: llvm#112221
1 parent 88591aa commit e05def0

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8 files changed

+105
-45
lines changed

8 files changed

+105
-45
lines changed

‎llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

+8-1
Original file line numberDiff line numberDiff line change
@@ -8160,9 +8160,13 @@ void BoUpSLP::buildTree_rec(ArrayRef<Value *> VL, unsigned Depth,
81608160
auto *VL0 = cast<Instruction>(S.OpValue);
81618161
BB = VL0->getParent();
81628162

8163-
if (S.MainOp && !DT->isReachableFromEntry(BB)) {
8163+
if (S.MainOp &&
8164+
(BB->isEHPad() || isa_and_nonnull<UnreachableInst>(BB->getTerminator()) ||
8165+
!DT->isReachableFromEntry(BB))) {
81648166
// Don't go into unreachable blocks. They may contain instructions with
81658167
// dependency cycles which confuse the final scheduling.
8168+
// Do not vectorize EH and non-returning blocks, not profitable in most
8169+
// cases.
81668170
LLVM_DEBUG(dbgs() << "SLP: bundle in unreachable block.\n");
81678171
newTreeEntry(VL, std::nullopt /*not vectorized*/, S, UserTreeIdx);
81688172
return;
@@ -17732,6 +17736,9 @@ bool SLPVectorizerPass::runImpl(Function &F, ScalarEvolution *SE_,
1773217736

1773317737
// Scan the blocks in the function in post order.
1773417738
for (auto *BB : post_order(&F.getEntryBlock())) {
17739+
if (BB->isEHPad() || isa_and_nonnull<UnreachableInst>(BB->getTerminator()))
17740+
continue;
17741+
1773517742
// Start new block - clear the list of reduction roots.
1773617743
R.clearReductionData();
1773717744
collectSeedInstructions(BB);

‎llvm/test/Transforms/SLPVectorizer/AArch64/landing_pad.ll

+16-9
Original file line numberDiff line numberDiff line change
@@ -28,9 +28,9 @@
2828
; YAML-NEXT: Function: foo
2929
; YAML-NEXT: Args:
3030
; YAML-NEXT: - String: 'SLP vectorized with cost '
31-
; YAML-NEXT: - Cost: '2'
31+
; YAML-NEXT: - Cost: '8'
3232
; YAML-NEXT: - String: ' and with tree size '
33-
; YAML-NEXT: - TreeSize: '9'
33+
; YAML-NEXT: - TreeSize: '5'
3434

3535
define void @foo() personality ptr @bar {
3636
; CHECK-LABEL: @foo(
@@ -44,8 +44,10 @@ define void @foo() personality ptr @bar {
4444
; CHECK-NEXT: ret void
4545
; CHECK: bb3:
4646
; CHECK-NEXT: [[TMP2:%.*]] = phi <2 x i64> [ [[TMP4:%.*]], [[BB6:%.*]] ], [ poison, [[BB1:%.*]] ]
47+
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i64> [[TMP2]], i32 0
48+
; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i64> [[TMP2]], i32 1
4749
; CHECK-NEXT: [[TMP3:%.*]] = invoke i64 poison(ptr addrspace(1) nonnull poison, i64 0, i64 0, i64 poison) [ "deopt"() ]
48-
; CHECK-NEXT: to label [[BB4:%.*]] unwind label [[BB10:%.*]]
50+
; CHECK-NEXT: to label [[BB4:%.*]] unwind label [[BB10:%.*]]
4951
; CHECK: bb4:
5052
; CHECK-NEXT: br i1 poison, label [[BB11:%.*]], label [[BB5:%.*]]
5153
; CHECK: bb5:
@@ -55,26 +57,31 @@ define void @foo() personality ptr @bar {
5557
; CHECK-NEXT: br label [[BB3]]
5658
; CHECK: bb7:
5759
; CHECK-NEXT: [[LOCAL_5_84111:%.*]] = phi i64 [ poison, [[BB8]] ], [ poison, [[BB5]] ]
58-
; CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x i64> poison, i64 [[LOCAL_5_84111]], i32 0
5960
; CHECK-NEXT: [[TMP6:%.*]] = invoke i64 poison(ptr addrspace(1) nonnull poison, i64 poison, i64 poison, i64 poison) [ "deopt"() ]
60-
; CHECK-NEXT: to label [[BB8]] unwind label [[BB12:%.*]]
61+
; CHECK-NEXT: to label [[BB8]] unwind label [[BB12:%.*]]
6162
; CHECK: bb8:
6263
; CHECK-NEXT: br i1 poison, label [[BB7]], label [[BB6]]
6364
; CHECK: bb9:
6465
; CHECK-NEXT: [[INDVARS_IV528799:%.*]] = phi i64 [ poison, [[BB10]] ], [ poison, [[BB12]] ]
6566
; CHECK-NEXT: [[TMP7]] = phi <2 x i64> [ [[TMP8:%.*]], [[BB10]] ], [ [[TMP9:%.*]], [[BB12]] ]
6667
; CHECK-NEXT: br label [[BB2]]
6768
; CHECK: bb10:
68-
; CHECK-NEXT: [[TMP8]] = phi <2 x i64> [ [[TMP2]], [[BB3]] ]
69+
; CHECK-NEXT: [[LOCAL_10_38123_LCSSA:%.*]] = phi i64 [ [[TMP10]], [[BB3]] ]
70+
; CHECK-NEXT: [[LOCAL_5_33118_LCSSA:%.*]] = phi i64 [ [[TMP5]], [[BB3]] ]
6971
; CHECK-NEXT: [[LANDING_PAD68:%.*]] = landingpad { ptr, i64 }
70-
; CHECK-NEXT: cleanup
72+
; CHECK-NEXT: cleanup
73+
; CHECK-NEXT: [[TMP12:%.*]] = insertelement <2 x i64> poison, i64 [[LOCAL_10_38123_LCSSA]], i32 0
74+
; CHECK-NEXT: [[TMP8]] = insertelement <2 x i64> [[TMP12]], i64 [[LOCAL_5_33118_LCSSA]], i32 1
7175
; CHECK-NEXT: br label [[BB9]]
7276
; CHECK: bb11:
7377
; CHECK-NEXT: ret void
7478
; CHECK: bb12:
75-
; CHECK-NEXT: [[TMP9]] = phi <2 x i64> [ [[TMP5]], [[BB7]] ]
79+
; CHECK-NEXT: [[LOCAL_10_89113_LCSSA:%.*]] = phi i64 [ poison, [[BB7]] ]
80+
; CHECK-NEXT: [[LOCAL_5_84111_LCSSA:%.*]] = phi i64 [ [[LOCAL_5_84111]], [[BB7]] ]
7681
; CHECK-NEXT: [[LANDING_PAD149:%.*]] = landingpad { ptr, i64 }
77-
; CHECK-NEXT: cleanup
82+
; CHECK-NEXT: cleanup
83+
; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i64> poison, i64 [[LOCAL_10_89113_LCSSA]], i32 0
84+
; CHECK-NEXT: [[TMP9]] = insertelement <2 x i64> [[TMP11]], i64 [[LOCAL_5_84111_LCSSA]], i32 1
7885
; CHECK-NEXT: br label [[BB9]]
7986
;
8087
bb1:

‎llvm/test/Transforms/SLPVectorizer/X86/crash_bullet.ll

+7-5
Original file line numberDiff line numberDiff line change
@@ -18,13 +18,15 @@ define void @_ZN23btGeneric6DofConstraint8getInfo1EPN17btTypedConstraint17btCons
1818
; CHECK: land.lhs.true.i.1:
1919
; CHECK-NEXT: br i1 undef, label [[FOR_INC_1:%.*]], label [[IF_THEN7_1]]
2020
; CHECK: if.then7.1:
21-
; CHECK-NEXT: store i32 1, ptr [[INFO]], align 4
22-
; CHECK-NEXT: store i32 5, ptr [[NUB5]], align 4
21+
; CHECK-NEXT: store <2 x i32> <i32 1, i32 5>, ptr [[INFO]], align 4
2322
; CHECK-NEXT: br label [[FOR_INC_1]]
2423
; CHECK: for.inc.1:
25-
; CHECK-NEXT: [[TMP0:%.*]] = phi <2 x i32> [ <i32 1, i32 5>, [[IF_THEN7_1]] ], [ <i32 0, i32 6>, [[LAND_LHS_TRUE_I_1]] ]
26-
; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i32> [[TMP0]], <i32 1, i32 -1>
27-
; CHECK-NEXT: store <2 x i32> [[TMP1]], ptr [[INFO]], align 4
24+
; CHECK-NEXT: [[TMP0:%.*]] = phi i32 [ 5, [[IF_THEN7_1]] ], [ 6, [[LAND_LHS_TRUE_I_1]] ]
25+
; CHECK-NEXT: [[TMP1:%.*]] = phi i32 [ 1, [[IF_THEN7_1]] ], [ 0, [[LAND_LHS_TRUE_I_1]] ]
26+
; CHECK-NEXT: [[INC_2:%.*]] = add nsw i32 [[TMP1]], 1
27+
; CHECK-NEXT: store i32 [[INC_2]], ptr [[INFO]], align 4
28+
; CHECK-NEXT: [[DEC_2:%.*]] = add nsw i32 [[TMP0]], -1
29+
; CHECK-NEXT: store i32 [[DEC_2]], ptr [[NUB5]], align 4
2830
; CHECK-NEXT: unreachable
2931
;
3032
entry:

‎llvm/test/Transforms/SLPVectorizer/X86/extractelement-phi-in-landingpad.ll

+2-2
Original file line numberDiff line numberDiff line change
@@ -10,10 +10,10 @@ define void @test() personality ptr null {
1010
; CHECK-NEXT: invoke void null()
1111
; CHECK-NEXT: to label %[[BB65]] unwind label %[[BB4]]
1212
; CHECK: [[BB4]]:
13-
; CHECK-NEXT: [[TMP0:%.*]] = phi <2 x i32> [ zeroinitializer, %[[BB]] ], [ poison, %[[BB2]] ]
13+
; CHECK-NEXT: [[TMP1:%.*]] = phi i32 [ 0, %[[BB]] ], [ 0, %[[BB2]] ]
14+
; CHECK-NEXT: [[PHI6:%.*]] = phi i32 [ 0, %[[BB]] ], [ 0, %[[BB2]] ]
1415
; CHECK-NEXT: [[LANDINGPAD:%.*]] = landingpad { ptr, i32 }
1516
; CHECK-NEXT: cleanup
16-
; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i32> [[TMP0]], i32 1
1717
; CHECK-NEXT: call void null(i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]])
1818
; CHECK-NEXT: ret void
1919
; CHECK: [[BB65]]:

‎llvm/test/Transforms/SLPVectorizer/X86/funclet.ll

+14-6
Original file line numberDiff line numberDiff line change
@@ -7,16 +7,24 @@ define void @test1(ptr %a, ptr %b, ptr %c) #0 personality ptr @__CxxFrameHandler
77
; CHECK-LABEL: @test1(
88
; CHECK-NEXT: entry:
99
; CHECK-NEXT: invoke void @_CxxThrowException(ptr null, ptr null)
10-
; CHECK-NEXT: to label [[UNREACHABLE:%.*]] unwind label [[CATCH_DISPATCH:%.*]]
10+
; CHECK-NEXT: to label [[UNREACHABLE:%.*]] unwind label [[CATCH_DISPATCH:%.*]]
1111
; CHECK: catch.dispatch:
1212
; CHECK-NEXT: [[TMP0:%.*]] = catchswitch within none [label %catch] unwind to caller
1313
; CHECK: catch:
1414
; CHECK-NEXT: [[TMP1:%.*]] = catchpad within [[TMP0]] [ptr null, i32 64, ptr null]
15-
; CHECK-NEXT: [[TMP3:%.*]] = load <2 x double>, ptr [[A:%.*]], align 8
16-
; CHECK-NEXT: [[TMP5:%.*]] = load <2 x double>, ptr [[B:%.*]], align 8
17-
; CHECK-NEXT: [[TMP6:%.*]] = fmul <2 x double> [[TMP3]], [[TMP5]]
18-
; CHECK-NEXT: [[TMP7:%.*]] = call <2 x double> @llvm.floor.v2f64(<2 x double> [[TMP6]]) [ "funclet"(token [[TMP1]]) ]
19-
; CHECK-NEXT: store <2 x double> [[TMP7]], ptr [[C:%.*]], align 8
15+
; CHECK-NEXT: [[I0:%.*]] = load double, ptr [[A:%.*]], align 8
16+
; CHECK-NEXT: [[I1:%.*]] = load double, ptr [[B:%.*]], align 8
17+
; CHECK-NEXT: [[MUL:%.*]] = fmul double [[I0]], [[I1]]
18+
; CHECK-NEXT: [[CALL:%.*]] = tail call double @floor(double [[MUL]]) #[[ATTR1:[0-9]+]] [ "funclet"(token [[TMP1]]) ]
19+
; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, ptr [[A]], i64 1
20+
; CHECK-NEXT: [[I3:%.*]] = load double, ptr [[ARRAYIDX3]], align 8
21+
; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds double, ptr [[B]], i64 1
22+
; CHECK-NEXT: [[I4:%.*]] = load double, ptr [[ARRAYIDX4]], align 8
23+
; CHECK-NEXT: [[MUL5:%.*]] = fmul double [[I3]], [[I4]]
24+
; CHECK-NEXT: [[CALL5:%.*]] = tail call double @floor(double [[MUL5]]) #[[ATTR1]] [ "funclet"(token [[TMP1]]) ]
25+
; CHECK-NEXT: store double [[CALL]], ptr [[C:%.*]], align 8
26+
; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds double, ptr [[C]], i64 1
27+
; CHECK-NEXT: store double [[CALL5]], ptr [[ARRAYIDX5]], align 8
2028
; CHECK-NEXT: catchret from [[TMP1]] to label [[TRY_CONT:%.*]]
2129
; CHECK: try.cont:
2230
; CHECK-NEXT: ret void

‎llvm/test/Transforms/SLPVectorizer/X86/landing_pad.ll

+11-4
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,8 @@ define void @foo() personality ptr @bar {
1414
; CHECK-NEXT: ret void
1515
; CHECK: bb3:
1616
; CHECK-NEXT: [[TMP1:%.*]] = phi <2 x i32> [ [[TMP3:%.*]], [[BB6:%.*]] ], [ poison, [[BB1:%.*]] ]
17+
; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x i32> [[TMP1]], i32 0
18+
; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i32> [[TMP1]], i32 1
1719
; CHECK-NEXT: [[TMP2:%.*]] = invoke i32 poison(ptr addrspace(1) nonnull poison, i32 0, i32 0, i32 poison) [ "deopt"() ]
1820
; CHECK-NEXT: to label [[BB4:%.*]] unwind label [[BB10:%.*]]
1921
; CHECK: bb4:
@@ -25,27 +27,32 @@ define void @foo() personality ptr @bar {
2527
; CHECK-NEXT: br label [[BB3]]
2628
; CHECK: bb7:
2729
; CHECK-NEXT: [[LOCAL_5_84111:%.*]] = phi i32 [ poison, [[BB8]] ], [ poison, [[BB5]] ]
28-
; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> poison, i32 [[LOCAL_5_84111]], i32 0
2930
; CHECK-NEXT: [[TMP5:%.*]] = invoke i32 poison(ptr addrspace(1) nonnull poison, i32 poison, i32 poison, i32 poison) [ "deopt"() ]
3031
; CHECK-NEXT: to label [[BB8]] unwind label [[BB12:%.*]]
3132
; CHECK: bb8:
3233
; CHECK-NEXT: br i1 poison, label [[BB7]], label [[BB6]]
3334
; CHECK: bb9:
3435
; CHECK-NEXT: [[INDVARS_IV528799:%.*]] = phi i64 [ poison, [[BB10]] ], [ poison, [[BB12]] ]
3536
; CHECK-NEXT: [[TMP6:%.*]] = phi <2 x i32> [ [[TMP8:%.*]], [[BB10]] ], [ [[TMP9:%.*]], [[BB12]] ]
36-
; CHECK-NEXT: [[TMP7]] = shufflevector <2 x i32> [[TMP6]], <2 x i32> poison, <4 x i32> <i32 poison, i32 poison, i32 1, i32 0>
37+
; CHECK-NEXT: [[TMP7]] = shufflevector <2 x i32> [[TMP6]], <2 x i32> poison, <4 x i32> <i32 poison, i32 poison, i32 0, i32 1>
3738
; CHECK-NEXT: br label [[BB2]]
3839
; CHECK: bb10:
39-
; CHECK-NEXT: [[TMP8]] = phi <2 x i32> [ [[TMP1]], [[BB3]] ]
40+
; CHECK-NEXT: [[LOCAL_10_38123_LCSSA:%.*]] = phi i32 [ [[TMP10]], [[BB3]] ]
41+
; CHECK-NEXT: [[LOCAL_5_33118_LCSSA:%.*]] = phi i32 [ [[TMP4]], [[BB3]] ]
4042
; CHECK-NEXT: [[LANDING_PAD68:%.*]] = landingpad { ptr, i32 }
4143
; CHECK-NEXT: cleanup
44+
; CHECK-NEXT: [[TMP12:%.*]] = insertelement <2 x i32> poison, i32 [[LOCAL_10_38123_LCSSA]], i32 0
45+
; CHECK-NEXT: [[TMP8]] = insertelement <2 x i32> [[TMP12]], i32 [[LOCAL_5_33118_LCSSA]], i32 1
4246
; CHECK-NEXT: br label [[BB9]]
4347
; CHECK: bb11:
4448
; CHECK-NEXT: ret void
4549
; CHECK: bb12:
46-
; CHECK-NEXT: [[TMP9]] = phi <2 x i32> [ [[TMP4]], [[BB7]] ]
50+
; CHECK-NEXT: [[LOCAL_10_89113_LCSSA:%.*]] = phi i32 [ poison, [[BB7]] ]
51+
; CHECK-NEXT: [[LOCAL_5_84111_LCSSA:%.*]] = phi i32 [ [[LOCAL_5_84111]], [[BB7]] ]
4752
; CHECK-NEXT: [[LANDING_PAD149:%.*]] = landingpad { ptr, i32 }
4853
; CHECK-NEXT: cleanup
54+
; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i32> poison, i32 [[LOCAL_10_89113_LCSSA]], i32 0
55+
; CHECK-NEXT: [[TMP9]] = insertelement <2 x i32> [[TMP11]], i32 [[LOCAL_5_84111_LCSSA]], i32 1
4956
; CHECK-NEXT: br label [[BB9]]
5057
;
5158
bb1:

‎llvm/test/Transforms/SLPVectorizer/X86/phi_landingpad.ll

+7-4
Original file line numberDiff line numberDiff line change
@@ -7,14 +7,17 @@ define void @test_phi_in_landingpad() personality ptr
77
; CHECK-LABEL: @test_phi_in_landingpad(
88
; CHECK-NEXT: entry:
99
; CHECK-NEXT: invoke void @foo()
10-
; CHECK-NEXT: to label [[INNER:%.*]] unwind label [[LPAD:%.*]]
10+
; CHECK-NEXT: to label [[INNER:%.*]] unwind label [[LPAD:%.*]]
1111
; CHECK: inner:
1212
; CHECK-NEXT: invoke void @foo()
13-
; CHECK-NEXT: to label [[DONE:%.*]] unwind label [[LPAD]]
13+
; CHECK-NEXT: to label [[DONE:%.*]] unwind label [[LPAD]]
1414
; CHECK: lpad:
15-
; CHECK-NEXT: [[TMP0:%.*]] = phi <2 x double> [ undef, [[ENTRY:%.*]] ], [ undef, [[INNER]] ]
15+
; CHECK-NEXT: [[X1:%.*]] = phi double [ undef, [[ENTRY:%.*]] ], [ undef, [[INNER]] ]
16+
; CHECK-NEXT: [[Y1:%.*]] = phi double [ undef, [[ENTRY]] ], [ undef, [[INNER]] ]
1617
; CHECK-NEXT: [[TMP1:%.*]] = landingpad { ptr, i32 }
17-
; CHECK-NEXT: catch ptr null
18+
; CHECK-NEXT: catch ptr null
19+
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x double> poison, double [[X1]], i32 0
20+
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> [[TMP3]], double [[Y1]], i32 1
1821
; CHECK-NEXT: br label [[DONE]]
1922
; CHECK: done:
2023
; CHECK-NEXT: [[TMP2:%.*]] = phi <2 x double> [ undef, [[INNER]] ], [ [[TMP0]], [[LPAD]] ]

‎llvm/test/Transforms/SLPVectorizer/X86/reorder_repeated_ops.ll

+40-14
Original file line numberDiff line numberDiff line change
@@ -11,23 +11,49 @@ define void @hoge() {
1111
; CHECK-NEXT: ret void
1212
; CHECK: bb2:
1313
; CHECK-NEXT: [[T:%.*]] = select i1 undef, i16 undef, i16 15
14-
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i16> <i16 poison, i16 undef>, i16 [[T]], i32 0
15-
; CHECK-NEXT: [[TMP1:%.*]] = sext <2 x i16> [[TMP0]] to <2 x i32>
16-
; CHECK-NEXT: [[TMP2:%.*]] = sub nsw <2 x i32> <i32 undef, i32 63>, [[TMP1]]
17-
; CHECK-NEXT: [[TMP3:%.*]] = sub <2 x i32> [[TMP2]], undef
18-
; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <2 x i32> [[TMP3]], <2 x i32> poison, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
19-
; CHECK-NEXT: [[TMP5:%.*]] = add <4 x i32> [[TMP4]], <i32 undef, i32 15, i32 31, i32 47>
20-
; CHECK-NEXT: [[T18:%.*]] = call i32 @llvm.vector.reduce.smax.v4i32(<4 x i32> [[TMP5]])
14+
; CHECK-NEXT: [[T3:%.*]] = sext i16 undef to i32
15+
; CHECK-NEXT: [[T4:%.*]] = sext i16 [[T]] to i32
16+
; CHECK-NEXT: [[T5:%.*]] = sub nsw i32 undef, [[T4]]
17+
; CHECK-NEXT: [[T6:%.*]] = sub i32 [[T5]], undef
18+
; CHECK-NEXT: [[T7:%.*]] = sub nsw i32 63, [[T3]]
19+
; CHECK-NEXT: [[T8:%.*]] = sub i32 [[T7]], undef
20+
; CHECK-NEXT: [[T9:%.*]] = add i32 [[T8]], undef
21+
; CHECK-NEXT: [[T10:%.*]] = add nsw i32 [[T6]], 15
22+
; CHECK-NEXT: [[T11:%.*]] = icmp sgt i32 [[T9]], [[T10]]
23+
; CHECK-NEXT: [[T12:%.*]] = select i1 [[T11]], i32 [[T9]], i32 [[T10]]
24+
; CHECK-NEXT: [[T13:%.*]] = add nsw i32 [[T6]], 31
25+
; CHECK-NEXT: [[T14:%.*]] = icmp sgt i32 [[T12]], [[T13]]
26+
; CHECK-NEXT: [[T15:%.*]] = select i1 [[T14]], i32 [[T12]], i32 [[T13]]
27+
; CHECK-NEXT: [[T16:%.*]] = add nsw i32 [[T6]], 47
28+
; CHECK-NEXT: [[T17:%.*]] = icmp sgt i32 [[T15]], [[T16]]
29+
; CHECK-NEXT: [[T18:%.*]] = select i1 [[T17]], i32 [[T15]], i32 [[T16]]
2130
; CHECK-NEXT: [[T19:%.*]] = select i1 undef, i32 [[T18]], i32 undef
2231
; CHECK-NEXT: [[T20:%.*]] = icmp sgt i32 [[T19]], 63
23-
; CHECK-NEXT: [[TMP7:%.*]] = sub nsw <2 x i32> undef, [[TMP1]]
24-
; CHECK-NEXT: [[TMP8:%.*]] = sub <2 x i32> [[TMP7]], undef
25-
; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <2 x i32> [[TMP8]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
26-
; CHECK-NEXT: [[TMP10:%.*]] = add nsw <4 x i32> [[TMP9]], <i32 -49, i32 -33, i32 -33, i32 -17>
27-
; CHECK-NEXT: [[T25:%.*]] = call i32 @llvm.vector.reduce.smin.v4i32(<4 x i32> [[TMP10]])
28-
; CHECK-NEXT: [[OP_RDX:%.*]] = icmp slt i32 undef, [[T25]]
32+
; CHECK-NEXT: [[T21:%.*]] = sub nsw i32 undef, [[T3]]
33+
; CHECK-NEXT: [[T22:%.*]] = sub i32 [[T21]], undef
34+
; CHECK-NEXT: [[T23:%.*]] = sub nsw i32 undef, [[T4]]
35+
; CHECK-NEXT: [[T24:%.*]] = sub i32 [[T23]], undef
36+
; CHECK-NEXT: [[T25:%.*]] = add nsw i32 [[T24]], -49
37+
; CHECK-NEXT: [[OP_RDX:%.*]] = icmp sgt i32 [[T25]], undef
2938
; CHECK-NEXT: [[OP_RDX1:%.*]] = select i1 [[OP_RDX]], i32 undef, i32 [[T25]]
30-
; CHECK-NEXT: [[T45:%.*]] = icmp sgt i32 undef, [[OP_RDX1]]
39+
; CHECK-NEXT: [[T28:%.*]] = icmp sgt i32 [[OP_RDX1]], undef
40+
; CHECK-NEXT: [[T30:%.*]] = select i1 [[T28]], i32 undef, i32 [[OP_RDX1]]
41+
; CHECK-NEXT: [[T32:%.*]] = add nsw i32 [[T22]], -33
42+
; CHECK-NEXT: [[T31:%.*]] = icmp sgt i32 [[T32]], undef
43+
; CHECK-NEXT: [[T35:%.*]] = select i1 [[T31]], i32 undef, i32 [[T32]]
44+
; CHECK-NEXT: [[OP_RDX2:%.*]] = icmp sgt i32 [[T35]], [[T30]]
45+
; CHECK-NEXT: [[OP_RDX3:%.*]] = select i1 [[OP_RDX2]], i32 [[T30]], i32 [[T35]]
46+
; CHECK-NEXT: [[T39:%.*]] = add nsw i32 [[T24]], -33
47+
; CHECK-NEXT: [[T36:%.*]] = icmp sgt i32 [[T39]], undef
48+
; CHECK-NEXT: [[T37:%.*]] = select i1 [[T36]], i32 undef, i32 [[T39]]
49+
; CHECK-NEXT: [[T38:%.*]] = icmp sgt i32 [[T37]], [[OP_RDX3]]
50+
; CHECK-NEXT: [[OP_RDX5:%.*]] = select i1 [[T38]], i32 [[OP_RDX3]], i32 [[T37]]
51+
; CHECK-NEXT: [[T42:%.*]] = add nsw i32 [[T22]], -17
52+
; CHECK-NEXT: [[T41:%.*]] = icmp sgt i32 [[T42]], undef
53+
; CHECK-NEXT: [[T40:%.*]] = select i1 [[T41]], i32 undef, i32 [[T42]]
54+
; CHECK-NEXT: [[OP_RDX6:%.*]] = icmp sgt i32 [[T40]], [[OP_RDX5]]
55+
; CHECK-NEXT: [[OP_RDX7:%.*]] = select i1 [[OP_RDX6]], i32 [[OP_RDX5]], i32 [[T40]]
56+
; CHECK-NEXT: [[T45:%.*]] = icmp sgt i32 undef, [[OP_RDX7]]
3157
; CHECK-NEXT: unreachable
3258
;
3359
bb:

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