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Merge remote-tracking branch 'upstream/release/17.x' into rustc/17.0-2023-07-29
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clang/docs/ReleaseNotes.rst

Lines changed: 39 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -186,6 +186,9 @@ C Language Changes
186186
_Generic(i, int : 0, const int : 1); // Warns about unreachable code, the
187187
// result is 0, not 1.
188188
_Generic(typeof(i), int : 0, const int : 1); // Result is 1, not 0.
189+
- ``structs``, ``unions``, and ``arrays`` that are const may now be used as
190+
constant expressions. This change is more consistent with the behavior of
191+
GCC.
189192

190193
C2x Feature Support
191194
^^^^^^^^^^^^^^^^^^^
@@ -287,6 +290,10 @@ New Compiler Flags
287290
individual relocations in the program will generally increase.
288291
- ``-f[no-]assume-unique-vtables`` controls whether Clang assumes that each
289292
class has a unique vtable address, when that is required by the ABI.
293+
- ``-print-multi-flags-experimental`` prints the flags used for multilib
294+
selection. See `the multilib docs <https://clang.llvm.org/docs/Multilib.html>`_
295+
for more details.
296+
290297

291298
Deprecated Compiler Flags
292299
-------------------------
@@ -470,6 +477,10 @@ Improvements to Clang's diagnostics
470477

471478
Bug Fixes in This Version
472479
-------------------------
480+
- Fixed an issue where a class template specialization whose declaration is
481+
instantiated in one module and whose definition is instantiated in another
482+
module may end up with members associated with the wrong declaration of the
483+
class, which can result in miscompiles in some cases.
473484

474485
- Added a new diagnostic warning group
475486
``-Wdeprecated-redundant-constexpr-static-def``, under the existing
@@ -880,6 +891,10 @@ Arm and AArch64 Support
880891
``-mfloat-abi=hard`` or a triple ending in ``hf``) would silently
881892
use the soft-float ABI instead.
882893

894+
- Clang now emits ``-Wunsupported-abi`` if the hard-float ABI is specified
895+
and the selected processor lacks floating point registers.
896+
(`#55755 <https://github.com/llvm/llvm-project/issues/55755>`_)
897+
883898
- Clang builtin ``__arithmetic_fence`` and the command line option ``-fprotect-parens``
884899
are now enabled for AArch64.
885900

@@ -895,6 +910,9 @@ Arm and AArch64 Support
895910
- Fix a crash when ``preserve_all`` calling convention is used on AArch64.
896911
`Issue 58145 <https://github.com/llvm/llvm-project/issues/58145>`_
897912

913+
- Clang now warns if invalid target triples ``--target=aarch64-*-eabi`` or
914+
``--target=arm-*-elf`` are specified.
915+
898916
Windows Support
899917
^^^^^^^^^^^^^^^
900918

@@ -927,6 +945,21 @@ RISC-V Support
927945
- The rules for ordering of extensions in ``-march`` strings were relaxed. A
928946
canonical ordering is no longer enforced on ``z*``, ``s*``, and ``x*``
929947
prefixed extensions.
948+
- An ABI mismatch between GCC and Clang related to the handling of empty
949+
structs in C++ parameter passing under the hard floating point calling
950+
conventions was fixed.
951+
- Support the RVV intrinsics v0.12. Please checkout `the RVV C intrinsics
952+
specification
953+
<https://github.com/riscv-non-isa/rvv-intrinsic-doc/releases/tag/v0.12.0>`_.
954+
It is expected there won't be any incompatibility from this v0.12 to the
955+
specifications planned for v1.0.
956+
957+
* Added vector intrinsics that models control to the rounding mode
958+
(``frm`` and ``vxrm``) for the floating-point instruction intrinsics and the
959+
fixed-point instruction intrinsics.
960+
* Added intrinsics for reinterpret cast between vector boolean and vector
961+
integer ``m1`` value
962+
* Removed the ``vread_csr`` and ``vwrite_csr`` intrinsics
930963

931964
CUDA/HIP Language Changes
932965
^^^^^^^^^^^^^^^^^^^^^^^^^
@@ -1116,6 +1149,12 @@ The following methods have been added:
11161149
- ``clang_Location_isInSystemHeader`` exposed via the ``is_in_system_header``
11171150
property of the `Location` class.
11181151

1152+
Configurable Multilib
1153+
---------------------
1154+
The BareMetal toolchain for AArch64 & ARM now supports multilib, configurable
1155+
via ``multilib.yaml``. See `the multilib docs <https://clang.llvm.org/docs/Multilib.html>`_
1156+
for more details.
1157+
11191158
Additional Information
11201159
======================
11211160

clang/lib/ARCMigrate/CMakeLists.txt

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -44,4 +44,5 @@ add_clang_library(clangARCMigrate
4444

4545
DEPENDS
4646
omp_gen
47+
ClangDriverOptions
4748
)

clang/lib/AST/ExprConstant.cpp

Lines changed: 0 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -15218,14 +15218,6 @@ static bool FastEvaluateAsRValue(const Expr *Exp, Expr::EvalResult &Result,
1521815218
return true;
1521915219
}
1522015220

15221-
// FIXME: Evaluating values of large array and record types can cause
15222-
// performance problems. Only do so in C++11 for now.
15223-
if (Exp->isPRValue() &&
15224-
(Exp->getType()->isArrayType() || Exp->getType()->isRecordType()) &&
15225-
!Ctx.getLangOpts().CPlusPlus11) {
15226-
IsConst = false;
15227-
return true;
15228-
}
1522915221
return false;
1523015222
}
1523115223

@@ -15467,12 +15459,6 @@ bool Expr::EvaluateAsInitializer(APValue &Value, const ASTContext &Ctx,
1546715459
return Name;
1546815460
});
1546915461

15470-
// FIXME: Evaluating initializers for large array and record types can cause
15471-
// performance problems. Only do so in C++11 for now.
15472-
if (isPRValue() && (getType()->isArrayType() || getType()->isRecordType()) &&
15473-
!Ctx.getLangOpts().CPlusPlus11)
15474-
return false;
15475-
1547615462
Expr::EvalStatus EStatus;
1547715463
EStatus.Diag = &Notes;
1547815464

clang/lib/CodeGen/ABIInfoImpl.cpp

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -246,7 +246,7 @@ Address CodeGen::emitMergePHI(CodeGenFunction &CGF, Address Addr1,
246246
}
247247

248248
bool CodeGen::isEmptyField(ASTContext &Context, const FieldDecl *FD,
249-
bool AllowArrays) {
249+
bool AllowArrays, bool AsIfNoUniqueAddr) {
250250
if (FD->isUnnamedBitfield())
251251
return true;
252252

@@ -280,13 +280,14 @@ bool CodeGen::isEmptyField(ASTContext &Context, const FieldDecl *FD,
280280
// not arrays of records, so we must also check whether we stripped off an
281281
// array type above.
282282
if (isa<CXXRecordDecl>(RT->getDecl()) &&
283-
(WasArray || !FD->hasAttr<NoUniqueAddressAttr>()))
283+
(WasArray || (!AsIfNoUniqueAddr && !FD->hasAttr<NoUniqueAddressAttr>())))
284284
return false;
285285

286-
return isEmptyRecord(Context, FT, AllowArrays);
286+
return isEmptyRecord(Context, FT, AllowArrays, AsIfNoUniqueAddr);
287287
}
288288

289-
bool CodeGen::isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) {
289+
bool CodeGen::isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays,
290+
bool AsIfNoUniqueAddr) {
290291
const RecordType *RT = T->getAs<RecordType>();
291292
if (!RT)
292293
return false;
@@ -297,11 +298,11 @@ bool CodeGen::isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) {
297298
// If this is a C++ record, check the bases first.
298299
if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD))
299300
for (const auto &I : CXXRD->bases())
300-
if (!isEmptyRecord(Context, I.getType(), true))
301+
if (!isEmptyRecord(Context, I.getType(), true, AsIfNoUniqueAddr))
301302
return false;
302303

303304
for (const auto *I : RD->fields())
304-
if (!isEmptyField(Context, I, AllowArrays))
305+
if (!isEmptyField(Context, I, AllowArrays, AsIfNoUniqueAddr))
305306
return false;
306307
return true;
307308
}

clang/lib/CodeGen/ABIInfoImpl.h

Lines changed: 10 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -122,13 +122,19 @@ Address emitMergePHI(CodeGenFunction &CGF, Address Addr1,
122122
llvm::BasicBlock *Block2, const llvm::Twine &Name = "");
123123

124124
/// isEmptyField - Return true iff a the field is "empty", that is it
125-
/// is an unnamed bit-field or an (array of) empty record(s).
126-
bool isEmptyField(ASTContext &Context, const FieldDecl *FD, bool AllowArrays);
125+
/// is an unnamed bit-field or an (array of) empty record(s). If
126+
/// AsIfNoUniqueAddr is true, then C++ record fields are considered empty if
127+
/// the [[no_unique_address]] attribute would have made them empty.
128+
bool isEmptyField(ASTContext &Context, const FieldDecl *FD, bool AllowArrays,
129+
bool AsIfNoUniqueAddr = false);
127130

128131
/// isEmptyRecord - Return true iff a structure contains only empty
129132
/// fields. Note that a structure with a flexible array member is not
130-
/// considered empty.
131-
bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays);
133+
/// considered empty. If AsIfNoUniqueAddr is true, then C++ record fields are
134+
/// considered empty if the [[no_unique_address]] attribute would have made
135+
/// them empty.
136+
bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays,
137+
bool AsIfNoUniqueAddr = false);
132138

133139
/// isSingleElementStruct - Determine if a structure is a "single
134140
/// element struct", i.e. it has exactly one non-empty field or

clang/lib/CodeGen/Targets/RISCV.cpp

Lines changed: 18 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,6 @@
88

99
#include "ABIInfoImpl.h"
1010
#include "TargetInfo.h"
11-
#include "llvm/TargetParser/RISCVTargetParser.h"
1211

1312
using namespace clang;
1413
using namespace clang::CodeGen;
@@ -152,6 +151,13 @@ bool RISCVABIInfo::detectFPCCEligibleStructHelper(QualType Ty, CharUnits CurOff,
152151
if (const ConstantArrayType *ATy = getContext().getAsConstantArrayType(Ty)) {
153152
uint64_t ArraySize = ATy->getSize().getZExtValue();
154153
QualType EltTy = ATy->getElementType();
154+
// Non-zero-length arrays of empty records make the struct ineligible for
155+
// the FP calling convention in C++.
156+
if (const auto *RTy = EltTy->getAs<RecordType>()) {
157+
if (ArraySize != 0 && isa<CXXRecordDecl>(RTy->getDecl()) &&
158+
isEmptyRecord(getContext(), EltTy, true, true))
159+
return false;
160+
}
155161
CharUnits EltSize = getContext().getTypeSizeInChars(EltTy);
156162
for (uint64_t i = 0; i < ArraySize; ++i) {
157163
bool Ret = detectFPCCEligibleStructHelper(EltTy, CurOff, Field1Ty,
@@ -168,7 +174,7 @@ bool RISCVABIInfo::detectFPCCEligibleStructHelper(QualType Ty, CharUnits CurOff,
168174
// copy constructor are not eligible for the FP calling convention.
169175
if (getRecordArgABI(Ty, CGT.getCXXABI()))
170176
return false;
171-
if (isEmptyRecord(getContext(), Ty, true))
177+
if (isEmptyRecord(getContext(), Ty, true, true))
172178
return true;
173179
const RecordDecl *RD = RTy->getDecl();
174180
// Unions aren't eligible unless they're empty (which is caught above).
@@ -238,6 +244,8 @@ bool RISCVABIInfo::detectFPCCEligibleStruct(QualType Ty, llvm::Type *&Field1Ty,
238244
NeededArgFPRs = 0;
239245
bool IsCandidate = detectFPCCEligibleStructHelper(
240246
Ty, CharUnits::Zero(), Field1Ty, Field1Off, Field2Ty, Field2Off);
247+
if (!Field1Ty)
248+
return false;
241249
// Not really a candidate if we have a single int but no float.
242250
if (Field1Ty && !Field2Ty && !Field1Ty->isFloatingPointTy())
243251
return false;
@@ -315,11 +323,15 @@ ABIArgInfo RISCVABIInfo::coerceVLSVector(QualType Ty) const {
315323

316324
assert(VT->getElementType()->isBuiltinType() && "expected builtin type!");
317325

318-
const auto *BT = VT->getElementType()->castAs<BuiltinType>();
319-
unsigned EltSize = getContext().getTypeSize(BT);
326+
auto VScale =
327+
getContext().getTargetInfo().getVScaleRange(getContext().getLangOpts());
328+
// The MinNumElts is simplified from equation:
329+
// NumElts / VScale =
330+
// (EltSize * NumElts / (VScale * RVVBitsPerBlock))
331+
// * (RVVBitsPerBlock / EltSize)
320332
llvm::ScalableVectorType *ResType =
321-
llvm::ScalableVectorType::get(CGT.ConvertType(VT->getElementType()),
322-
llvm::RISCV::RVVBitsPerBlock / EltSize);
333+
llvm::ScalableVectorType::get(CGT.ConvertType(VT->getElementType()),
334+
VT->getNumElements() / VScale->first);
323335
return ABIArgInfo::getDirect(ResType);
324336
}
325337

clang/lib/Driver/ToolChains/Clang.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2068,6 +2068,12 @@ void Clang::AddPPCTargetArgs(const ArgList &Args,
20682068
} else if (V == "vec-extabi") {
20692069
VecExtabi = true;
20702070
A->claim();
2071+
} else if (V == "elfv1") {
2072+
ABIName = "elfv1";
2073+
A->claim();
2074+
} else if (V == "elfv2") {
2075+
ABIName = "elfv2";
2076+
A->claim();
20712077
} else if (V != "altivec")
20722078
// The ppc64 linux abis are all "altivec" abis by default. Accept and ignore
20732079
// the option if given as we don't have backend support for any targets

clang/lib/Serialization/ASTReaderDecl.cpp

Lines changed: 42 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -181,6 +181,13 @@ namespace clang {
181181
static void setAnonymousDeclForMerging(ASTReader &Reader, DeclContext *DC,
182182
unsigned Index, NamedDecl *D);
183183

184+
/// Commit to a primary definition of the class RD, which is known to be
185+
/// a definition of the class. We might not have read the definition data
186+
/// for it yet. If we haven't then allocate placeholder definition data
187+
/// now too.
188+
static CXXRecordDecl *getOrFakePrimaryClassDefinition(ASTReader &Reader,
189+
CXXRecordDecl *RD);
190+
184191
/// Results from loading a RedeclarableDecl.
185192
class RedeclarableResult {
186193
Decl *MergeWith;
@@ -598,7 +605,13 @@ void ASTDeclReader::VisitDecl(Decl *D) {
598605
auto *LexicalDC = readDeclAs<DeclContext>();
599606
if (!LexicalDC)
600607
LexicalDC = SemaDC;
601-
DeclContext *MergedSemaDC = Reader.MergedDeclContexts.lookup(SemaDC);
608+
// If the context is a class, we might not have actually merged it yet, in
609+
// the case where the definition comes from an update record.
610+
DeclContext *MergedSemaDC;
611+
if (auto *RD = dyn_cast<CXXRecordDecl>(SemaDC))
612+
MergedSemaDC = getOrFakePrimaryClassDefinition(Reader, RD);
613+
else
614+
MergedSemaDC = Reader.MergedDeclContexts.lookup(SemaDC);
602615
// Avoid calling setLexicalDeclContext() directly because it uses
603616
// Decl::getASTContext() internally which is unsafe during derialization.
604617
D->setDeclContextsImpl(MergedSemaDC ? MergedSemaDC : SemaDC, LexicalDC,
@@ -3198,36 +3211,41 @@ uint64_t ASTReader::getGlobalBitOffset(ModuleFile &M, uint64_t LocalOffset) {
31983211
return LocalOffset + M.GlobalBitOffset;
31993212
}
32003213

3214+
CXXRecordDecl *
3215+
ASTDeclReader::getOrFakePrimaryClassDefinition(ASTReader &Reader,
3216+
CXXRecordDecl *RD) {
3217+
// Try to dig out the definition.
3218+
auto *DD = RD->DefinitionData;
3219+
if (!DD)
3220+
DD = RD->getCanonicalDecl()->DefinitionData;
3221+
3222+
// If there's no definition yet, then DC's definition is added by an update
3223+
// record, but we've not yet loaded that update record. In this case, we
3224+
// commit to DC being the canonical definition now, and will fix this when
3225+
// we load the update record.
3226+
if (!DD) {
3227+
DD = new (Reader.getContext()) struct CXXRecordDecl::DefinitionData(RD);
3228+
RD->setCompleteDefinition(true);
3229+
RD->DefinitionData = DD;
3230+
RD->getCanonicalDecl()->DefinitionData = DD;
3231+
3232+
// Track that we did this horrible thing so that we can fix it later.
3233+
Reader.PendingFakeDefinitionData.insert(
3234+
std::make_pair(DD, ASTReader::PendingFakeDefinitionKind::Fake));
3235+
}
3236+
3237+
return DD->Definition;
3238+
}
3239+
32013240
/// Find the context in which we should search for previous declarations when
32023241
/// looking for declarations to merge.
32033242
DeclContext *ASTDeclReader::getPrimaryContextForMerging(ASTReader &Reader,
32043243
DeclContext *DC) {
32053244
if (auto *ND = dyn_cast<NamespaceDecl>(DC))
32063245
return ND->getOriginalNamespace();
32073246

3208-
if (auto *RD = dyn_cast<CXXRecordDecl>(DC)) {
3209-
// Try to dig out the definition.
3210-
auto *DD = RD->DefinitionData;
3211-
if (!DD)
3212-
DD = RD->getCanonicalDecl()->DefinitionData;
3213-
3214-
// If there's no definition yet, then DC's definition is added by an update
3215-
// record, but we've not yet loaded that update record. In this case, we
3216-
// commit to DC being the canonical definition now, and will fix this when
3217-
// we load the update record.
3218-
if (!DD) {
3219-
DD = new (Reader.getContext()) struct CXXRecordDecl::DefinitionData(RD);
3220-
RD->setCompleteDefinition(true);
3221-
RD->DefinitionData = DD;
3222-
RD->getCanonicalDecl()->DefinitionData = DD;
3223-
3224-
// Track that we did this horrible thing so that we can fix it later.
3225-
Reader.PendingFakeDefinitionData.insert(
3226-
std::make_pair(DD, ASTReader::PendingFakeDefinitionKind::Fake));
3227-
}
3228-
3229-
return DD->Definition;
3230-
}
3247+
if (auto *RD = dyn_cast<CXXRecordDecl>(DC))
3248+
return getOrFakePrimaryClassDefinition(Reader, RD);
32313249

32323250
if (auto *RD = dyn_cast<RecordDecl>(DC))
32333251
return RD->getDefinition();

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