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[MC][ARM] Resolve some pcrel fixups at assembly time (PR44929)
MC currently does not emit these relocation types, and lld does not handle them. Add FKF_Constant as a work-around of some ARM code after D72197. Eventually we probably should implement these relocation types. By Fangrui Song! Differential revision: https://reviews.llvm.org/D72892
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6 files changed

+41
-17
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6 files changed

+41
-17
lines changed

llvm/include/llvm/MC/MCFixupKindInfo.h

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,12 @@ struct MCFixupKindInfo {
2222
FKF_IsAlignedDownTo32Bits = (1 << 1),
2323

2424
/// Should this fixup be evaluated in a target dependent manner?
25-
FKF_IsTarget = (1 << 2)
25+
FKF_IsTarget = (1 << 2),
26+
27+
/// This fixup kind should be resolved if defined.
28+
/// FIXME This is a workaround because we don't support certain ARM
29+
/// relocation types. This flag should eventually be removed.
30+
FKF_Constant = 1 << 3,
2631
};
2732

2833
/// A target specific name for the fixup kind. The names will be unique for

llvm/lib/MC/MCAssembler.cpp

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -224,6 +224,7 @@ bool MCAssembler::evaluateFixup(const MCAsmLayout &Layout,
224224
return getBackend().evaluateTargetFixup(*this, Layout, Fixup, DF, Target,
225225
Value, WasForced);
226226

227+
unsigned FixupFlags = getBackendPtr()->getFixupKindInfo(Fixup.getKind()).Flags;
227228
bool IsPCRel = getBackendPtr()->getFixupKindInfo(Fixup.getKind()).Flags &
228229
MCFixupKindInfo::FKF_IsPCRel;
229230

@@ -239,8 +240,9 @@ bool MCAssembler::evaluateFixup(const MCAsmLayout &Layout,
239240
if (A->getKind() != MCSymbolRefExpr::VK_None || SA.isUndefined()) {
240241
IsResolved = false;
241242
} else if (auto *Writer = getWriterPtr()) {
242-
IsResolved = Writer->isSymbolRefDifferenceFullyResolvedImpl(
243-
*this, SA, *DF, false, true);
243+
IsResolved = (FixupFlags & MCFixupKindInfo::FKF_Constant) ||
244+
Writer->isSymbolRefDifferenceFullyResolvedImpl(
245+
*this, SA, *DF, false, true);
244246
}
245247
}
246248
} else {

llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp

Lines changed: 10 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -55,31 +55,29 @@ Optional<MCFixupKind> ARMAsmBackend::getFixupKind(StringRef Name) const {
5555
}
5656

5757
const MCFixupKindInfo &ARMAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
58+
unsigned IsPCRelConstant =
59+
MCFixupKindInfo::FKF_IsPCRel | MCFixupKindInfo::FKF_Constant;
5860
const static MCFixupKindInfo InfosLE[ARM::NumTargetFixupKinds] = {
5961
// This table *must* be in the order that the fixup_* kinds are defined in
6062
// ARMFixupKinds.h.
6163
//
6264
// Name Offset (bits) Size (bits) Flags
63-
{"fixup_arm_ldst_pcrel_12", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
65+
{"fixup_arm_ldst_pcrel_12", 0, 32, IsPCRelConstant},
6466
{"fixup_t2_ldst_pcrel_12", 0, 32,
65-
MCFixupKindInfo::FKF_IsPCRel |
66-
MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
67-
{"fixup_arm_pcrel_10_unscaled", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
68-
{"fixup_arm_pcrel_10", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
67+
IsPCRelConstant | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
68+
{"fixup_arm_pcrel_10_unscaled", 0, 32, IsPCRelConstant},
69+
{"fixup_arm_pcrel_10", 0, 32, IsPCRelConstant},
6970
{"fixup_t2_pcrel_10", 0, 32,
7071
MCFixupKindInfo::FKF_IsPCRel |
7172
MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
7273
{"fixup_arm_pcrel_9", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
7374
{"fixup_t2_pcrel_9", 0, 32,
74-
MCFixupKindInfo::FKF_IsPCRel |
75-
MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
75+
IsPCRelConstant | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
7676
{"fixup_thumb_adr_pcrel_10", 0, 8,
77-
MCFixupKindInfo::FKF_IsPCRel |
78-
MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
79-
{"fixup_arm_adr_pcrel_12", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
77+
IsPCRelConstant | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
78+
{"fixup_arm_adr_pcrel_12", 0, 32, IsPCRelConstant},
8079
{"fixup_t2_adr_pcrel_12", 0, 32,
81-
MCFixupKindInfo::FKF_IsPCRel |
82-
MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
80+
IsPCRelConstant | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
8381
{"fixup_arm_condbranch", 0, 24, MCFixupKindInfo::FKF_IsPCRel},
8482
{"fixup_arm_uncondbranch", 0, 24, MCFixupKindInfo::FKF_IsPCRel},
8583
{"fixup_t2_condbranch", 0, 32, MCFixupKindInfo::FKF_IsPCRel},

llvm/test/MC/ARM/Windows/invalid-relocation.s

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,6 @@
77
.endef
88
.global invalid_relocation
99
.thumb_func
10-
invalid_relocation:
1110
adr r0, invalid_relocation+1
1211

1312
# CHECK: LLVM ERROR: unsupported relocation type: fixup_t2_adr_pcrel_12

llvm/test/MC/ARM/pcrel-global.s

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,21 @@
1+
@ RUN: llvm-mc -filetype=obj -triple=armv7 %s -o %t
2+
@ RUN: llvm-readelf -r %t | FileCheck %s
3+
4+
@ CHECK: There are no relocations in this file.
5+
.syntax unified
6+
7+
.globl foo
8+
foo:
9+
ldrd r0, r1, foo @ arm_pcrel_10_unscaled
10+
vldr d0, foo @ arm_pcrel_10
11+
adr r2, foo @ arm_adr_pcrel_12
12+
ldr r0, foo @ arm_ldst_pcrel_12
13+
14+
.thumb
15+
.thumb_func
16+
17+
.globl bar
18+
bar:
19+
adr r0, bar @ thumb_adr_pcrel_10
20+
adr.w r0, bar @ t2_adr_pcrel_12
21+
ldr.w pc, bar @ t2_ldst_pcrel_12

llvm/test/MC/MachO/ARM/bad-darwin-ARM-reloc.s

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,6 @@
66
.section myseg, mysect
77
L___fcommon:
88
.word 0
9-
@ CHECK-ERROR: unsupported relocation on symbol
109

1110
c:
1211
.word a - b

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