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[DAG] getNode() - fold (zext (trunc (assertzext x))) -> (assertzext x)
If the pre-truncated value was the same width as the extension, and the assertzext guarantees that the extended bits are already zero, then skip the zext/trunc 'zero_extend_inreg' pattern. Addresses several regressions noticed in D155472
1 parent 60b9836 commit 076bee1

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3 files changed

+39
-27
lines changed

3 files changed

+39
-27
lines changed

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5691,6 +5691,22 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
56915691
if (OpOpcode == ISD::UNDEF)
56925692
// zext(undef) = 0, because the top bits will be zero.
56935693
return getConstant(0, DL, VT);
5694+
5695+
// Skip unnecessary zext_inreg pattern:
5696+
// (zext (trunc (assertzext x))) -> (assertzext x)
5697+
// TODO: Generalize to MaskedValueIsZero check?
5698+
if (OpOpcode == ISD::TRUNCATE) {
5699+
SDValue OpOp = N1.getOperand(0);
5700+
if (OpOp.getValueType() == VT) {
5701+
if (OpOp.getOpcode() == ISD::AssertZext && N1->hasOneUse()) {
5702+
EVT ExtVT = cast<VTSDNode>(OpOp.getOperand(1))->getVT();
5703+
if (N1.getScalarValueSizeInBits() >= ExtVT.getSizeInBits()) {
5704+
transferDbgValues(N1, OpOp);
5705+
return OpOp;
5706+
}
5707+
}
5708+
}
5709+
}
56945710
break;
56955711
case ISD::ANY_EXTEND:
56965712
assert(VT.isInteger() && N1.getValueType().isInteger() &&

llvm/test/CodeGen/RISCV/rvv/fold-vp-fadd-and-vp-fmul.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -62,9 +62,9 @@ define <vscale x 1 x double> @fma_reassociate(<vscale x 1 x double> %a, <vscale
6262
; CHECK-LABEL: fma_reassociate:
6363
; CHECK: # %bb.0:
6464
; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma
65-
; CHECK-NEXT: vfmadd.vv v11, v10, v12, v0.t
66-
; CHECK-NEXT: vfmadd.vv v9, v8, v11, v0.t
67-
; CHECK-NEXT: vmv.v.v v8, v9
65+
; CHECK-NEXT: vfmadd.vv v9, v8, v12, v0.t
66+
; CHECK-NEXT: vfmadd.vv v11, v10, v9, v0.t
67+
; CHECK-NEXT: vmv.v.v v8, v11
6868
; CHECK-NEXT: ret
6969
%1 = call fast <vscale x 1 x double> @llvm.vp.fmul.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> %b, <vscale x 1 x i1> %m, i32 %vl)
7070
%2 = call fast <vscale x 1 x double> @llvm.vp.fmul.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x double> %d, <vscale x 1 x i1> %m, i32 %vl)

llvm/test/CodeGen/X86/extract-bits.ll

Lines changed: 20 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -210,9 +210,8 @@ define i32 @bextr32_a1_indexzext(i32 %val, i8 zeroext %numskipbits, i8 zeroext %
210210
; X64-BMI1-LABEL: bextr32_a1_indexzext:
211211
; X64-BMI1: # %bb.0:
212212
; X64-BMI1-NEXT: shll $8, %edx
213-
; X64-BMI1-NEXT: movzbl %sil, %eax
214-
; X64-BMI1-NEXT: orl %edx, %eax
215-
; X64-BMI1-NEXT: bextrl %eax, %edi, %eax
213+
; X64-BMI1-NEXT: orl %esi, %edx
214+
; X64-BMI1-NEXT: bextrl %edx, %edi, %eax
216215
; X64-BMI1-NEXT: retq
217216
;
218217
; X64-BMI2-LABEL: bextr32_a1_indexzext:
@@ -351,9 +350,8 @@ define i32 @bextr32_a3_load_indexzext(ptr %w, i8 zeroext %numskipbits, i8 zeroex
351350
; X64-BMI1-LABEL: bextr32_a3_load_indexzext:
352351
; X64-BMI1: # %bb.0:
353352
; X64-BMI1-NEXT: shll $8, %edx
354-
; X64-BMI1-NEXT: movzbl %sil, %eax
355-
; X64-BMI1-NEXT: orl %edx, %eax
356-
; X64-BMI1-NEXT: bextrl %eax, (%rdi), %eax
353+
; X64-BMI1-NEXT: orl %esi, %edx
354+
; X64-BMI1-NEXT: bextrl %edx, (%rdi), %eax
357355
; X64-BMI1-NEXT: retq
358356
;
359357
; X64-BMI2-LABEL: bextr32_a3_load_indexzext:
@@ -953,10 +951,10 @@ define i64 @bextr64_a1_indexzext(i64 %val, i8 zeroext %numskipbits, i8 zeroext %
953951
;
954952
; X64-BMI1-LABEL: bextr64_a1_indexzext:
955953
; X64-BMI1: # %bb.0:
954+
; X64-BMI1-NEXT: # kill: def $edx killed $edx def $rdx
956955
; X64-BMI1-NEXT: shll $8, %edx
957-
; X64-BMI1-NEXT: movzbl %sil, %eax
958-
; X64-BMI1-NEXT: orl %edx, %eax
959-
; X64-BMI1-NEXT: bextrq %rax, %rdi, %rax
956+
; X64-BMI1-NEXT: orl %esi, %edx
957+
; X64-BMI1-NEXT: bextrq %rdx, %rdi, %rax
960958
; X64-BMI1-NEXT: retq
961959
;
962960
; X64-BMI2-LABEL: bextr64_a1_indexzext:
@@ -1250,10 +1248,10 @@ define i64 @bextr64_a3_load_indexzext(ptr %w, i8 zeroext %numskipbits, i8 zeroex
12501248
;
12511249
; X64-BMI1-LABEL: bextr64_a3_load_indexzext:
12521250
; X64-BMI1: # %bb.0:
1251+
; X64-BMI1-NEXT: # kill: def $edx killed $edx def $rdx
12531252
; X64-BMI1-NEXT: shll $8, %edx
1254-
; X64-BMI1-NEXT: movzbl %sil, %eax
1255-
; X64-BMI1-NEXT: orl %edx, %eax
1256-
; X64-BMI1-NEXT: bextrq %rax, (%rdi), %rax
1253+
; X64-BMI1-NEXT: orl %esi, %edx
1254+
; X64-BMI1-NEXT: bextrq %rdx, (%rdi), %rax
12571255
; X64-BMI1-NEXT: retq
12581256
;
12591257
; X64-BMI2-LABEL: bextr64_a3_load_indexzext:
@@ -2327,9 +2325,8 @@ define i32 @bextr32_b1_indexzext(i32 %val, i8 zeroext %numskipbits, i8 zeroext %
23272325
; X64-BMI1-LABEL: bextr32_b1_indexzext:
23282326
; X64-BMI1: # %bb.0:
23292327
; X64-BMI1-NEXT: shll $8, %edx
2330-
; X64-BMI1-NEXT: movzbl %sil, %eax
2331-
; X64-BMI1-NEXT: orl %edx, %eax
2332-
; X64-BMI1-NEXT: bextrl %eax, %edi, %eax
2328+
; X64-BMI1-NEXT: orl %esi, %edx
2329+
; X64-BMI1-NEXT: bextrl %edx, %edi, %eax
23332330
; X64-BMI1-NEXT: retq
23342331
;
23352332
; X64-BMI2-LABEL: bextr32_b1_indexzext:
@@ -2468,9 +2465,8 @@ define i32 @bextr32_b3_load_indexzext(ptr %w, i8 zeroext %numskipbits, i8 zeroex
24682465
; X64-BMI1-LABEL: bextr32_b3_load_indexzext:
24692466
; X64-BMI1: # %bb.0:
24702467
; X64-BMI1-NEXT: shll $8, %edx
2471-
; X64-BMI1-NEXT: movzbl %sil, %eax
2472-
; X64-BMI1-NEXT: orl %edx, %eax
2473-
; X64-BMI1-NEXT: bextrl %eax, (%rdi), %eax
2468+
; X64-BMI1-NEXT: orl %esi, %edx
2469+
; X64-BMI1-NEXT: bextrl %edx, (%rdi), %eax
24742470
; X64-BMI1-NEXT: retq
24752471
;
24762472
; X64-BMI2-LABEL: bextr32_b3_load_indexzext:
@@ -2916,10 +2912,10 @@ define i64 @bextr64_b1_indexzext(i64 %val, i8 zeroext %numskipbits, i8 zeroext %
29162912
;
29172913
; X64-BMI1-LABEL: bextr64_b1_indexzext:
29182914
; X64-BMI1: # %bb.0:
2915+
; X64-BMI1-NEXT: # kill: def $edx killed $edx def $rdx
29192916
; X64-BMI1-NEXT: shll $8, %edx
2920-
; X64-BMI1-NEXT: movzbl %sil, %eax
2921-
; X64-BMI1-NEXT: orl %edx, %eax
2922-
; X64-BMI1-NEXT: bextrq %rax, %rdi, %rax
2917+
; X64-BMI1-NEXT: orl %esi, %edx
2918+
; X64-BMI1-NEXT: bextrq %rdx, %rdi, %rax
29232919
; X64-BMI1-NEXT: retq
29242920
;
29252921
; X64-BMI2-LABEL: bextr64_b1_indexzext:
@@ -3205,10 +3201,10 @@ define i64 @bextr64_b3_load_indexzext(ptr %w, i8 zeroext %numskipbits, i8 zeroex
32053201
;
32063202
; X64-BMI1-LABEL: bextr64_b3_load_indexzext:
32073203
; X64-BMI1: # %bb.0:
3204+
; X64-BMI1-NEXT: # kill: def $edx killed $edx def $rdx
32083205
; X64-BMI1-NEXT: shll $8, %edx
3209-
; X64-BMI1-NEXT: movzbl %sil, %eax
3210-
; X64-BMI1-NEXT: orl %edx, %eax
3211-
; X64-BMI1-NEXT: bextrq %rax, (%rdi), %rax
3206+
; X64-BMI1-NEXT: orl %esi, %edx
3207+
; X64-BMI1-NEXT: bextrq %rdx, (%rdi), %rax
32123208
; X64-BMI1-NEXT: retq
32133209
;
32143210
; X64-BMI2-LABEL: bextr64_b3_load_indexzext:

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