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1 parent 2ee15dd commit 530baa4Copy full SHA for 530baa4
src/riscv.rs
@@ -14,6 +14,9 @@ intrinsics! {
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//
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// for reference, see also implementation from gcc
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// https://raw.githubusercontent.com/gcc-mirror/gcc/master/libgcc/config/epiphany/mulsi3.c
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+ //
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+ // and from LLVM (in relatively readable RISC-V assembly):
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+ // https://github.com/llvm/llvm-project/blob/main/compiler-rt/lib/builtins/riscv/int_mul_impl.inc
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pub extern "C" fn __mulsi3(a: u32, b: u32) -> u32 {
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let (mut a, mut b) = (a, b);
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let mut r = 0;
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