@@ -136,9 +136,15 @@ fn u64_by_u64_div_rem(duo: u64, div: u64) -> (u64, u64) {
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// Whether `trifecta` or `delegate` is faster for 128 bit division depends on the speed at which a
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// microarchitecture can multiply and divide. We decide to be optimistic and assume `trifecta` is
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- // faster if the target pointer width is at least 64.
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+ // faster if the target pointer width is at least 64. Note that this
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+ // implementation is additionally included on WebAssembly despite the typical
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+ // pointer width there being 32 because it's typically run on a 64-bit machine
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+ // that has access to faster 64-bit operations.
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#[ cfg( all(
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- not( any( target_pointer_width = "16" , target_pointer_width = "32" ) ) ,
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+ any(
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+ target_family = "wasm" ,
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+ not( any( target_pointer_width = "16" , target_pointer_width = "32" ) ) ,
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+ ) ,
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not( all( not( feature = "no-asm" ) , target_arch = "x86_64" ) ) ,
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not( any( target_arch = "sparc" , target_arch = "sparc64" ) )
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) ) ]
@@ -152,10 +158,14 @@ impl_trifecta!(
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u128
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) ;
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- // If the pointer width less than 64, then the target architecture almost certainly does not have
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- // the fast 64 to 128 bit widening multiplication needed for `trifecta` to be faster.
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+ // If the pointer width less than 64 and this isn't wasm, then the target
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+ // architecture almost certainly does not have the fast 64 to 128 bit widening
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+ // multiplication needed for `trifecta` to be faster.
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#[ cfg( all(
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- any( target_pointer_width = "16" , target_pointer_width = "32" ) ,
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+ not( any(
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+ target_family = "wasm" ,
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+ not( any( target_pointer_width = "16" , target_pointer_width = "32" ) ) ,
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+ ) ) ,
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not( all( not( feature = "no-asm" ) , target_arch = "x86_64" ) ) ,
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not( any( target_arch = "sparc" , target_arch = "sparc64" ) )
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) ) ]
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