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improve atomics test coverage
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+34
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tests/pass/atomic.rs

Lines changed: 34 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@ use std::sync::atomic::{compiler_fence, fence, AtomicBool, AtomicIsize, AtomicU6
22

33
fn main() {
44
atomic_bool();
5-
atomic_isize();
5+
atomic_all_ops();
66
atomic_u64();
77
atomic_fences();
88
weak_sometimes_fails();
@@ -25,6 +25,7 @@ fn atomic_bool() {
2525
assert_eq!(*ATOMIC.get_mut(), false);
2626
}
2727
}
28+
2829
// There isn't a trait to use to make this generic, so just use a macro
2930
macro_rules! compare_exchange_weak_loop {
3031
($atom:expr, $from:expr, $to:expr, $succ_order:expr, $fail_order:expr) => {
@@ -39,10 +40,40 @@ macro_rules! compare_exchange_weak_loop {
3940
}
4041
};
4142
}
42-
fn atomic_isize() {
43+
44+
/// Make sure we can handle all the intrinsics
45+
fn atomic_all_ops() {
4346
static ATOMIC: AtomicIsize = AtomicIsize::new(0);
47+
static ATOMIC_UNSIGNED: AtomicU64 = AtomicU64::new(0);
48+
49+
50+
// loads
51+
for o in [Relaxed, Acquire, SeqCst] {
52+
ATOMIC.load(o);
53+
}
4454

45-
// Make sure trans can emit all the intrinsics correctly
55+
// stores
56+
for o in [Relaxed, Release, SeqCst] {
57+
ATOMIC.store(1, o);
58+
}
59+
60+
// most RMWs
61+
for o in [Relaxed, Release, Acquire, AcqRel, SeqCst] {
62+
ATOMIC.swap(0, o);
63+
ATOMIC.fetch_or(0, o);
64+
ATOMIC.fetch_xor(0, o);
65+
ATOMIC.fetch_and(0, o);
66+
ATOMIC.fetch_nand(0, o);
67+
ATOMIC.fetch_add(0, o);
68+
ATOMIC.fetch_sub(0, o);
69+
ATOMIC.fetch_min(0, o);
70+
ATOMIC.fetch_max(0, o);
71+
ATOMIC_UNSIGNED.fetch_min(0, o);
72+
ATOMIC_UNSIGNED.fetch_max(0, o);
73+
}
74+
75+
// RMWs with deparate failure ordering
76+
ATOMIC.store(0, SeqCst);
4677
assert_eq!(ATOMIC.compare_exchange(0, 1, Relaxed, Relaxed), Ok(0));
4778
assert_eq!(ATOMIC.compare_exchange(0, 2, Acquire, Relaxed), Err(1));
4879
assert_eq!(ATOMIC.compare_exchange(0, 1, Release, Relaxed), Err(1));
@@ -59,7 +90,6 @@ fn atomic_isize() {
5990
assert_eq!(ATOMIC.compare_exchange_weak(0, 1, Release, Relaxed), Err(1));
6091
compare_exchange_weak_loop!(ATOMIC, 1, 0, AcqRel, Relaxed);
6192
assert_eq!(ATOMIC.load(Relaxed), 0);
62-
ATOMIC.compare_exchange_weak(0, 1, AcqRel, Relaxed).ok();
6393
ATOMIC.compare_exchange_weak(0, 1, SeqCst, Relaxed).ok();
6494
ATOMIC.compare_exchange_weak(0, 1, Acquire, Acquire).ok();
6595
ATOMIC.compare_exchange_weak(0, 1, AcqRel, Acquire).ok();

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