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Merge pull request rust-lang#4090 from RalfJung/sc-test
add more tests for SC access/fence consistency
2 parents 268a5f4 + f9e9856 commit 7b29daf

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Diff for: src/tools/miri/tests/pass/0weak_memory_consistency.rs

+1-204
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,7 @@ fn static_atomic_bool(val: bool) -> &'static AtomicBool {
4040
Box::leak(Box::new(AtomicBool::new(val)))
4141
}
4242

43-
// Spins until it acquires a pre-determined value.
43+
/// Spins until it acquires a pre-determined value.
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fn loads_value(loc: &AtomicI32, ord: Ordering, val: i32) -> i32 {
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while loc.load(ord) != val {
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std::hint::spin_loop();
@@ -186,31 +186,6 @@ fn test_mixed_access() {
186186
assert_eq!(r2, 2);
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}
188188

189-
// The following two tests are taken from Repairing Sequential Consistency in C/C++11
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// by Lahav et al.
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// https://plv.mpi-sws.org/scfix/paper.pdf
192-
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// Test case SB
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fn test_sc_store_buffering() {
195-
let x = static_atomic(0);
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let y = static_atomic(0);
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let j1 = spawn(move || {
199-
x.store(1, SeqCst);
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y.load(SeqCst)
201-
});
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let j2 = spawn(move || {
204-
y.store(1, SeqCst);
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x.load(SeqCst)
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});
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let a = j1.join().unwrap();
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let b = j2.join().unwrap();
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assert_ne!((a, b), (0, 0));
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}
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214189
fn test_single_thread() {
215190
let x = AtomicI32::new(42);
216191

@@ -257,178 +232,6 @@ fn test_sync_through_rmw_and_fences() {
257232
assert_ne!((a, b), (0, 0));
258233
}
259234

260-
// Test case by @SabrinaJewson
261-
// https://github.com/rust-lang/miri/issues/2301#issuecomment-1221502757
262-
// Demonstrating C++20 SC access changes
263-
fn test_iriw_sc_rlx() {
264-
let x = static_atomic_bool(false);
265-
let y = static_atomic_bool(false);
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let a = spawn(move || x.store(true, Relaxed));
268-
let b = spawn(move || y.store(true, Relaxed));
269-
let c = spawn(move || {
270-
while !x.load(SeqCst) {}
271-
y.load(SeqCst)
272-
});
273-
let d = spawn(move || {
274-
while !y.load(SeqCst) {}
275-
x.load(SeqCst)
276-
});
277-
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a.join().unwrap();
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b.join().unwrap();
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let c = c.join().unwrap();
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let d = d.join().unwrap();
282-
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assert!(c || d);
284-
}
285-
286-
// Similar to `test_iriw_sc_rlx` but with fences instead of SC accesses.
287-
fn test_cpp20_sc_fence_fix() {
288-
let x = static_atomic_bool(false);
289-
let y = static_atomic_bool(false);
290-
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let thread1 = spawn(|| {
292-
let a = x.load(Relaxed);
293-
fence(SeqCst);
294-
let b = y.load(Relaxed);
295-
(a, b)
296-
});
297-
298-
let thread2 = spawn(|| {
299-
x.store(true, Relaxed);
300-
});
301-
let thread3 = spawn(|| {
302-
y.store(true, Relaxed);
303-
});
304-
305-
let thread4 = spawn(|| {
306-
let c = y.load(Relaxed);
307-
fence(SeqCst);
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let d = x.load(Relaxed);
309-
(c, d)
310-
});
311-
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let (a, b) = thread1.join().unwrap();
313-
thread2.join().unwrap();
314-
thread3.join().unwrap();
315-
let (c, d) = thread4.join().unwrap();
316-
let bad = a == true && b == false && c == true && d == false;
317-
assert!(!bad);
318-
}
319-
320-
// https://plv.mpi-sws.org/scfix/paper.pdf
321-
// 2.2 Second Problem: SC Fences are Too Weak
322-
fn test_cpp20_rwc_syncs() {
323-
/*
324-
int main() {
325-
atomic_int x = 0;
326-
atomic_int y = 0;
327-
{{{ x.store(1,mo_relaxed);
328-
||| { r1=x.load(mo_relaxed).readsvalue(1);
329-
fence(mo_seq_cst);
330-
r2=y.load(mo_relaxed); }
331-
||| { y.store(1,mo_relaxed);
332-
fence(mo_seq_cst);
333-
r3=x.load(mo_relaxed); }
334-
}}}
335-
return 0;
336-
}
337-
*/
338-
let x = static_atomic(0);
339-
let y = static_atomic(0);
340-
341-
let j1 = spawn(move || {
342-
x.store(1, Relaxed);
343-
});
344-
345-
let j2 = spawn(move || {
346-
loads_value(&x, Relaxed, 1);
347-
fence(SeqCst);
348-
y.load(Relaxed)
349-
});
350-
351-
let j3 = spawn(move || {
352-
y.store(1, Relaxed);
353-
fence(SeqCst);
354-
x.load(Relaxed)
355-
});
356-
357-
j1.join().unwrap();
358-
let b = j2.join().unwrap();
359-
let c = j3.join().unwrap();
360-
361-
assert!((b, c) != (0, 0));
362-
}
363-
364-
/// This checks that the *last* thing the SC fence does is act like a release fence.
365-
/// See <https://github.com/rust-lang/miri/pull/4057#issuecomment-2522296601>.
366-
fn test_sc_fence_release() {
367-
let x = static_atomic(0);
368-
let y = static_atomic(0);
369-
let z = static_atomic(0);
370-
let k = static_atomic(0);
371-
372-
let j1 = spawn(move || {
373-
x.store(1, Relaxed);
374-
fence(SeqCst);
375-
k.store(1, Relaxed);
376-
});
377-
let j2 = spawn(move || {
378-
y.store(1, Relaxed);
379-
fence(SeqCst);
380-
z.store(1, Relaxed);
381-
});
382-
383-
let j3 = spawn(move || {
384-
let kval = k.load(Acquire);
385-
let yval = y.load(Relaxed);
386-
(kval, yval)
387-
});
388-
let j4 = spawn(move || {
389-
let zval = z.load(Acquire);
390-
let xval = x.load(Relaxed);
391-
(zval, xval)
392-
});
393-
394-
j1.join().unwrap();
395-
j2.join().unwrap();
396-
let (kval, yval) = j3.join().unwrap();
397-
let (zval, xval) = j4.join().unwrap();
398-
399-
let bad = kval == 1 && yval == 0 && zval == 1 && xval == 0;
400-
assert!(!bad);
401-
}
402-
403-
/// Test that SC fences and accesses sync correctly with each other.
404-
fn test_sc_fence_access() {
405-
/*
406-
Wx1 sc
407-
Ry0 sc
408-
||
409-
Wy1 rlx
410-
SC-fence
411-
Rx0 rlx
412-
*/
413-
let x = static_atomic(0);
414-
let y = static_atomic(0);
415-
416-
let j1 = spawn(move || {
417-
x.store(1, SeqCst);
418-
y.load(SeqCst)
419-
});
420-
let j2 = spawn(move || {
421-
y.store(1, Relaxed);
422-
fence(SeqCst);
423-
x.load(Relaxed)
424-
});
425-
426-
let v1 = j1.join().unwrap();
427-
let v2 = j2.join().unwrap();
428-
let bad = v1 == 0 && v2 == 0;
429-
assert!(!bad);
430-
}
431-
432235
pub fn main() {
433236
for _ in 0..50 {
434237
test_single_thread();
@@ -437,12 +240,6 @@ pub fn main() {
437240
test_message_passing();
438241
test_wrc();
439242
test_corr();
440-
test_sc_store_buffering();
441243
test_sync_through_rmw_and_fences();
442-
test_iriw_sc_rlx();
443-
test_cpp20_sc_fence_fix();
444-
test_cpp20_rwc_syncs();
445-
test_sc_fence_release();
446-
test_sc_fence_access();
447244
}
448245
}

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