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Suggested -fpregs instead of +soft-float.
Has the same effect, but turning off a feature matches the other flags better than turning on a feature (which actually turns off a feature).
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src/doc/rustc/src/platform-support/thumbv7em-none-eabi.md

+11-4
Original file line numberDiff line numberDiff line change
@@ -35,9 +35,9 @@ to use these flags.
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| CPU | FPU | DSP | Target CPU | Target Features |
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| ---------- | --- | --- | ----------- | --------------- |
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| Any | No | Yes | None | None |
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| Cortex-M4 | No | Yes | `cortex-m4` | `+soft-float` |
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| Cortex-M4 | No | Yes | `cortex-m4` | `-fpregs` |
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| Cortex-M4F | SP | Yes | `cortex-m4` | None |
40-
| Cortex-M7 | No | Yes | `cortex-m7` | `+soft-float` |
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| Cortex-M7 | No | Yes | `cortex-m7` | `-fpregs` |
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| Cortex-M7F | SP | Yes | `cortex-m7` | `-fp64` |
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| Cortex-M7F | DP | Yes | `cortex-m7` | None |
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@@ -50,6 +50,13 @@ to use these flags.
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| Cortex-M7F | SP | Yes | `cortex-m7` | `-fp64` |
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| Cortex-M7F | DP | Yes | `cortex-m7` | None |
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<div class="warning">
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Never use the `-fpregs` *target-feature* with these `eabihf` targets
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as it will cause compilation units to have different ABIs, which is unsound.
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</div>
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### Arm Cortex-M4 and Arm Cortex-M4F
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The target CPU is `cortex-m4`.
@@ -59,7 +66,7 @@ The target CPU is `cortex-m4`.
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* enabled by default with this *target*
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* Cortex-M4F has a single precision FPU
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* support is enabled by default with this *target-cpu*
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* disable support using the `+soft-float` feature (`eabi` only)
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* disable support using the `-fpregs` *target-feature* (`eabi` only)
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### Arm Cortex-M7 and Arm Cortex-M7F
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@@ -71,4 +78,4 @@ The target CPU is `cortex-m7`.
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* Cortex-M7F have either a single-precision or double-precision FPU
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* double-precision support is enabled by default with this *target-cpu*
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* opt-out by using the `-f64` *target-feature*
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* disable support entirely using the `+soft-float` feature (`eabi` only)
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* disable support entirely using the `-fpregs` *target-feature* (`eabi` only)

src/doc/rustc/src/platform-support/thumbv8m.main-none-eabi.md

+19-12
Original file line numberDiff line numberDiff line change
@@ -39,22 +39,22 @@ to use these flags.
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| CPU | FPU | DSP | MVE | Target CPU | Target Features |
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| ----------- | --- | --- | --------- | ------------- | --------------------- |
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| Unspecified | No | No | No | None | None |
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| Cortex-M33 | No | No | No | `cortex-m33` | `+soft-float,-dsp` |
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| Cortex-M33 | No | Yes | No | `cortex-m33` | `+soft-float` |
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| Cortex-M33 | No | No | No | `cortex-m33` | `-fpregs,-dsp` |
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| Cortex-M33 | No | Yes | No | `cortex-m33` | `-fpregs` |
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| Cortex-M33 | SP | No | No | `cortex-m33` | `-dsp` |
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| Cortex-M33 | SP | Yes | No | `cortex-m33` | None |
46-
| Cortex-M35P | No | No | No | `cortex-m35p` | `+soft-float,-dsp` |
47-
| Cortex-M35P | No | Yes | No | `cortex-m35p` | `+soft-float` |
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| Cortex-M35P | No | No | No | `cortex-m35p` | `-fpregs,-dsp` |
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| Cortex-M35P | No | Yes | No | `cortex-m35p` | `-fpregs` |
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| Cortex-M35P | SP | No | No | `cortex-m35p` | `-dsp` |
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| Cortex-M35P | SP | Yes | No | `cortex-m35p` | None |
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| Cortex-M55 | No | Yes | No | `cortex-m55` | `+soft-float,-mve` |
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| Cortex-M55 | No | Yes | No | `cortex-m55` | `-fpregs,-mve` |
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| Cortex-M55 | DP | Yes | No | `cortex-m55` | `-mve` |
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| Cortex-M55 | No | Yes | Int | `cortex-m55` | `+soft-float,-mve.fp` |
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| Cortex-M55 | No | Yes | Int | `cortex-m55` | `-fpregs,-mve.fp,+mve`|
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| Cortex-M55 | DP | Yes | Int | `cortex-m55` | `-mve.fp` |
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| Cortex-M55 | DP | Yes | Int+Float | `cortex-m55` | None |
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| Cortex-M85 | No | Yes | No | `cortex-m85` | `+soft-float,-mve` |
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| Cortex-M85 | No | Yes | No | `cortex-m85` | `-fpregs,-mve` |
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| Cortex-M85 | DP | Yes | No | `cortex-m85` | `-mve` |
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| Cortex-M85 | No | Yes | Int | `cortex-m85` | `+soft-float,-mve.fp` |
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| Cortex-M85 | No | Yes | Int | `cortex-m85` | `-fpregs,-mve.fp,+mve`|
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| Cortex-M85 | DP | Yes | Int | `cortex-m85` | `-mve.fp` |
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| Cortex-M85 | DP | Yes | Int+Float | `cortex-m85` | None |
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@@ -74,6 +74,13 @@ to use these flags.
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| Cortex-M85 | DP | Yes | Int | `cortex-m85` | `-mve.fp` |
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| Cortex-M85 | DP | Yes | Int+Float | `cortex-m85` | None |
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<div class="warning">
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Never use the `-fpregs` *target-feature* with these `eabihf` targets
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as it will cause compilation units to have different ABIs, which is unsound.
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</div>
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### Arm Cortex-M33
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The target CPU is `cortex-m33`.
@@ -83,7 +90,7 @@ The target CPU is `cortex-m33`.
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* enabled by default with this *target-cpu*
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* Has an optional single precision FPU
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* support is enabled by default with this *target-cpu*
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* disable support using the `+soft-float` feature (`eabi` only)
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* disable support using the `-fpregs` *target-feature* (`eabi` only)
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### Arm Cortex-M35P
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@@ -94,7 +101,7 @@ The target CPU is `cortex-m35p`.
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* enabled by default with this *target-cpu*
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* Has an optional single precision FPU
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* support is enabled by default with this *target-cpu*
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* disable support using the `+soft-float` feature (`eabi` only)
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* disable support using the `-fpregs` *target-feature* (`eabi` only)
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### Arm Cortex-M55
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@@ -106,7 +113,7 @@ The target CPU is `cortex-m55`.
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* Has an optional double-precision FPU that also supports half-precision FP16
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values
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* support is enabled by default with this *target-cpu*
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* disable support using the `+soft-float` feature (`eabi` only)
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* disable support using the `-fpregs` *target-feature* (`eabi` only)
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* Has optional support for M-Profile Vector Extensions
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* Also known as *Helium Technology*
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* Available with only integer support, or both integer/float support
@@ -125,7 +132,7 @@ The target CPU is `cortex-m85`.
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* Has an optional double-precision FPU that also supports half-precision FP16
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values
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* support is enabled by default with this *target-cpu*
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* disable support using the `+soft-float` feature (`eabi` only)
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* disable support using the `-fpregs` *target-feature* (`eabi` only)
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* Has optional support for M-Profile Vector Extensions
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* Also known as *Helium Technology*
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* Available with only integer support, or both integer/float support

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