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jonas-schievinkjonas-schievink
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Merge asm implementations
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‎asm/inline.rs

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//! Inline assembly implementing the routines exposed in `cortex_m::asm`.
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//!
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//! If the `inline-asm` feature is enabled, these functions will be directly called by the
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//! `cortex-m` wrappers. Otherwise, `cortex-m` links against them via prebuilt archives.
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//!
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//! All of these functions should be blanket-`unsafe`. `cortex-m` provides safe wrappers where
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//! applicable.
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#[inline(always)]
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pub unsafe fn __bkpt() {
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asm!("bkpt");
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}
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#[inline(always)]
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pub unsafe fn __control_r() -> u32 {
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let r;
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asm!("mrs {}, CONTROL", out(reg) r);
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r
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}
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#[inline(always)]
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pub unsafe fn __control_w(w: u32) {
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asm!("msr CONTROL, {}", in(reg) w);
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}
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#[inline(always)]
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pub unsafe fn __cpsid() {
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asm!("cpsid i");
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}
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#[inline(always)]
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pub unsafe fn __cpsie() {
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asm!("cpsie i");
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}
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#[inline(always)]
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pub unsafe fn __delay(cyc: u32) {
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asm!("
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1:
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nop
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subs {}, #1
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bne 1b
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// Branch to 1 instead of delay does not generate R_ARM_THM_JUMP8 relocation, which breaks
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// linking on the thumbv6m-none-eabi target
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", in(reg) cyc);
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}
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// FIXME do we need compiler fences here or should we expect them in the caller?
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#[inline(always)]
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pub unsafe fn __dmb() {
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asm!("dmb 0xF");
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}
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#[inline(always)]
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pub unsafe fn __dsb() {
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asm!("dsb 0xF");
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}
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#[inline(always)]
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pub unsafe fn __isb() {
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asm!("isb 0xF");
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}
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#[inline(always)]
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pub unsafe fn __msp_r() -> u32 {
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let r;
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asm!("mrs {}, MSP", out(reg) r);
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r
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}
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#[inline(always)]
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pub unsafe fn __msp_w(val: u32) {
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asm!("msr MSP, {}", in(reg) val);
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}
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// NOTE: No FFI shim, this requires inline asm.
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#[inline(always)]
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pub unsafe fn __apsr_r() -> u32 {
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let r;
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asm!("mrs {}, APSR", out(reg) r);
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r
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}
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#[inline(always)]
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pub unsafe fn __nop() {
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// NOTE: This is a `pure` asm block, but applying that option allows the compiler to eliminate
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// the nop entirely (or to collapse multiple subsequent ones). Since the user probably wants N
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// nops when they call `nop` N times, let's not add that option.
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asm!("nop");
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}
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// NOTE: No FFI shim, this requires inline asm.
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#[inline(always)]
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pub unsafe fn __pc_r() -> u32 {
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let r;
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asm!("mov {}, R15", out(reg) r);
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r
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}
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// NOTE: No FFI shim, this requires inline asm.
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#[inline(always)]
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pub unsafe fn __pc_w(val: u32) {
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asm!("mov R15, {}", in(reg) val);
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}
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// NOTE: No FFI shim, this requires inline asm.
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#[inline(always)]
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pub unsafe fn __lr_r() -> u32 {
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let r;
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asm!("mov {}, R14", out(reg) r);
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r
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}
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// NOTE: No FFI shim, this requires inline asm.
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#[inline(always)]
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pub unsafe fn __lr_w(val: u32) {
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asm!("mov R14, {}", in(reg) val);
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}
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#[inline(always)]
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pub unsafe fn __primask_r() -> u32 {
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let r;
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asm!("mrs {}, PRIMASK", out(reg) r);
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r
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}
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#[inline(always)]
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pub unsafe fn __psp_r() -> u32 {
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let r;
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asm!("mrs {}, PSP", out(reg) r);
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r
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}
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#[inline(always)]
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pub unsafe fn __psp_w(val: u32) {
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asm!("msr PSP, {}", in(reg) val);
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}
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#[inline(always)]
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pub unsafe fn __sev() {
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asm!("sev");
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}
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#[inline(always)]
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pub unsafe fn __udf() -> ! {
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asm!("udf #0", options(noreturn));
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}
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#[inline(always)]
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pub unsafe fn __wfe() {
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asm!("wfe");
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}
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#[inline(always)]
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pub unsafe fn __wfi() {
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asm!("wfi");
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}
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// v7m *AND* v8m.main, but *NOT* v8m.base
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#[cfg(any(armv7m, armv8m_main))]
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pub use self::v7m::*;
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#[cfg(any(armv7m, armv8m_main))]
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mod v7m {
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#[inline(always)]
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pub unsafe fn __basepri_max(val: u8) {
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asm!("msr BASEPRI_MAX, {}", in(reg) val);
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}
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#[inline(always)]
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pub unsafe fn __basepri_r() -> u8 {
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let r;
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asm!("mrs {}, BASEPRI", out(reg) r);
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r
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}
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#[inline(always)]
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pub unsafe fn __basepri_w(val: u8) {
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asm!("msr BASEPRI, {}", in(reg) val);
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}
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#[inline(always)]
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pub unsafe fn __faultmask_r() -> u32 {
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let r;
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asm!("mrs {}, FAULTMASK", out(reg) r);
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r
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}
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// FIXME: compiler_fences necessary?
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#[inline(always)]
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pub unsafe fn __enable_icache() {
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asm!(
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"
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ldr r0, =0xE000ED14 @ CCR
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mrs r2, PRIMASK @ save critical nesting info
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cpsid i @ mask interrupts
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ldr r1, [r0] @ read CCR
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orr.w r1, r1, #(1 << 17) @ Set bit 17, IC
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str r1, [r0] @ write it back
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dsb @ ensure store completes
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isb @ synchronize pipeline
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msr PRIMASK, r2 @ unnest critical section
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",
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out("r0") _,
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out("r1") _,
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out("r2") _,
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);
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}
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#[inline(always)]
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pub unsafe fn __enable_dcache() {
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asm!(
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"
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ldr r0, =0xE000ED14 @ CCR
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mrs r2, PRIMASK @ save critical nesting info
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cpsid i @ mask interrupts
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ldr r1, [r0] @ read CCR
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orr.w r1, r1, #(1 << 16) @ Set bit 16, DC
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str r1, [r0] @ write it back
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dsb @ ensure store completes
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isb @ synchronize pipeline
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msr PRIMASK, r2 @ unnest critical section
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",
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out("r0") _,
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out("r1") _,
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out("r2") _,
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);
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}
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}
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#[cfg(armv7em)]
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pub use self::v7em::*;
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#[cfg(armv7em)]
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mod v7em {
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#[inline(always)]
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pub unsafe fn __basepri_max_cm7_r0p1(val: u8) {
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asm!(
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"
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mrs r1, PRIMASK
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cpsid i
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tst.w r1, #1
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msr BASEPRI_MAX, {}
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it ne
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bxne lr
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cpsie i
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",
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in(reg) val,
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out("r1") _,
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);
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}
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#[inline(always)]
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pub unsafe fn __basepri_w_cm7_r0p1(val: u8) {
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asm!(
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"
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mrs r1, PRIMASK
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cpsid i
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tst.w r1, #1
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msr BASEPRI, {}
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it ne
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bxne lr
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cpsie i
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",
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in(reg) val,
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out("r1") _,
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);
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}
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}
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#[cfg(armv8m)]
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pub use self::v8m::*;
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/// Baseline and Mainline.
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#[cfg(armv8m)]
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mod v8m {
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#[inline(always)]
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pub unsafe fn __tt(mut target: u32) -> u32 {
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asm!("tt {target}, {target}", target = inout(reg) target);
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target
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}
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#[inline(always)]
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pub unsafe fn __ttt(mut target: u32) -> u32 {
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asm!("ttt {target}, {target}", target = inout(reg) target);
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target
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}
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#[inline(always)]
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pub unsafe fn __tta(mut target: u32) -> u32 {
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asm!("tta {target}, {target}", target = inout(reg) target);
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target
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}
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#[inline(always)]
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pub unsafe fn __ttat(mut target: u32) -> u32 {
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asm!("ttat {target}, {target}", target = inout(reg) target);
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target
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}
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}
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#[cfg(armv8m_main)]
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pub use self::v8m_main::*;
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/// Mainline only.
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#[cfg(armv8m_main)]
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mod v8m_main {
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#[inline(always)]
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pub unsafe fn __msplim_r() -> u32 {
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let r;
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asm!("mrs {}, MSPLIM", out(reg) r);
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r
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}
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#[inline(always)]
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pub unsafe fn __msplim_w(val: u32) {
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asm!("msr MSPLIM, {}", in(reg) val);
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}
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#[inline(always)]
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pub unsafe fn __psplim_r() -> u32 {
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let r;
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asm!("mrs {}, PSPLIM", out(reg) r);
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r
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}
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#[inline(always)]
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pub unsafe fn __psplim_w(val: u32) {
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asm!("msr PSPLIM, {}", in(reg) val);
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}
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}
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#[cfg(has_fpu)]
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pub use self::fpu::*;
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/// All targets with FPU.
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#[cfg(has_fpu)]
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mod fpu {
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#[inline(always)]
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pub unsafe fn __fpscr_r() -> u32 {
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let r;
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asm!("vmrs {}, fpscr", out(reg) r);
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r
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}
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#[inline(always)]
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pub unsafe fn __fpscr_w(val: u32) {
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asm!("vmsr fpscr, {}", in(reg) val);
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}
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}

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