Support failed JIT test case: cmp_001.phpt

Comparison between LONG and DOUBLE is (partially) supported in a similar
way to comparison between two LONG values. See the updates in function
zend_jit_cmp().

Key difference lies in handling NaN.

1. Instruction 'fcmp' is used to substitue 'ucomisd' in x86
implementation. Both of them raise invalid operation exception only when
either source operand is an SNaN.[1][2]

2. Parity flag is used in x86 to check whether either operand is NaN.[3]
I think this is QNaN case. As for AArch64, we use instruction 'bvs'.[4]

It's worthing noting that condition codes have different meanings for
floating-point comparions(e.g. 'fcmp')[4] compared to the
general-purpose comparisons(e.g. 'cmp').[5] For instance, 'b.hs' after
'fcmp' can check not only the cases "greater than, equal to" but also
the case "unordered"(that is NaN). We may simply treat it as a
combination of  'jae' and 'jp' in x86.

3. Instruction 'SETcc' is used in x86 for the case of ">=" or ">".
Note that flag "swap" is set in implementation, and it falls into cases
ZEND_IS_SMALLER or ZEND_IS_SMALLER_OR_EQUAL. We can use 'cset' in
AArch64.

However, it's weird that the NaN check is missing in x86. I suppose it
might be a bug. Take the case ">=" as an example. The two operands can
be  either DOUBLE + LONG or DOUBLE + DOUBLE. See the relevant code where
flag "swap" is set(i.e. function zend_jit_cmp_double_long() and function
zend_jit_cmp_double_double()). For the case "NaN >= 1.0", the expected
result should be FALSE, however, JIT/x86 would produce TRUE due to the
following "setae al". Unfortunately I haven't constructed one test case
to trigger that.

In our implementation, we choose to follow the case of "<" or "<=", and
I believe our implementation is safe anyway..

4. Temporary FP register is also needed and we reserve v16. See the
updates in file zend_jit_arm64.h.

5. Macro SET_ZVAL_TYPE_INFO_FROM_REG is misused in function
zend_jit_zval_copy_deref(). The second argument should be 32-bit long
and we fix it.

Note that simple test cases involving NaN are tested locally. I believe
it would get deeper testing by cmp_003.phpt(we will support it later).

[1]
https://developer.arm.com/documentation/dui0204/f/vector-floating-point-programming/vfp-instructions/fcmp?lang=en
[2] https://www.felixcloutier.com/x86/ucomisd
[3] https://en.wikipedia.org/wiki/Parity_flag
[4]
https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/condition-codes-4-floating-point-comparisons-using-vfp
[5]
https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/condition-codes-1-condition-flags-and-codes

Author: shqking

ext/opcache/jit/zend_jit_arm64.dasc

@@ -79,11 +79,13 @@
 |.define TMP3w,   w13
 |.define TMP4,    x14
 |.define TMP4w,   w14
+|.define FPTMP,   v16
 
 |.define ZREG_TMP1,   ZREG_X11
 |.define ZREG_TMP2,   ZREG_X12
 |.define ZREG_TMP3,   ZREG_X13
 |.define ZREG_TMP4,   ZREG_X14
+|.define ZREG_FPTMP,  ZREG_V16
 
 |.define HYBRID_SPAD, #16     // padding for stack alignment
 
@@ -533,6 +535,42 @@ static void* dasm_labels[zend_lb_MAX];
 |	brk #0	// TODO
 |.endmacro
 
+// Define DOUBLE_CMP and DOUBLE_CMP to replace SSE_AVX_OP and SSE_OP in x86 implementation.
+// Conduct floating point operation 'ins'. Operand1 is from 'reg', and operands2 is from 'addr'.
+// Use DOUBLE_CMP for comparisons and use DOUBLE_OP for arithmetic operations.
+|.macro DOUBLE_CMP, ins, reg, addr, tmp_reg, fp_tmp_reg
+||	if (Z_MODE(addr) == IS_CONST_ZVAL) {
+|		brk #0	// TODO
+|		LOAD_ADDR Rx(tmp_reg), Z_ZV(addr)
+|		ldr Rd(fp_tmp_reg-ZREG_V0), [Rx(tmp_reg)]
+|		ins Rd(reg-ZREG_V0), Rd(fp_tmp_reg-ZREG_V0)
+||	} else if (Z_MODE(addr) == IS_MEM_ZVAL) {
+|		SAFE_MEM_ACC_WITH_UOFFSET ldr, Rd(fp_tmp_reg-ZREG_V0), Rx(Z_REG(addr)), Z_OFFSET(addr), Rx(tmp_reg)
+|		ins Rd(reg-ZREG_V0), Rd(fp_tmp_reg-ZREG_V0)
+||	} else if (Z_MODE(addr) == IS_REG) {
+|		brk #0	// TODO
+|		ins Rd(reg-ZREG_V0), Rd(Z_REG(addr)-ZREG_V0)
+||	} else {
+||		ZEND_UNREACHABLE();
+||	}
+|.endmacro
+
+|.macro DOUBLE_OP, ins, reg, addr, tmp_reg, fp_tmp_reg
+|	brk #0	// TODO
+||	if (Z_MODE(addr) == IS_CONST_ZVAL) {
+|		LOAD_ADDR Rx(tmp_reg), Z_ZV(addr)
+|		ldr Rd(fp_tmp_reg-ZREG_V0), [Rx(tmp_reg)]
+|		ins Rd(reg-ZREG_V0), Rd(reg-ZREG_V0), Rd(fp_tmp_reg-ZREG_V0)
+||	} else if (Z_MODE(addr) == IS_MEM_ZVAL) {
+|		SAFE_MEM_ACC_WITH_UOFFSET ldr, Rd(fp_tmp_reg-ZREG_V0), Rx(Z_REG(addr)), Z_OFFSET(addr), Rx(tmp_reg)
+|		ins Rd(reg-ZREG_V0), Rd(reg-ZREG_V0), Rd(fp_tmp_reg-ZREG_V0)
+||	} else if (Z_MODE(addr) == IS_REG) {
+|		ins Rd(reg-ZREG_V0), Rd(reg-ZREG_V0), Rd(Z_REG(addr)-ZREG_V0)
+||	} else {
+||		ZEND_UNREACHABLE();
+||	}
+|.endmacro
+
 // Define DOUBLE_GET_LONG to replace SSE_GET_LONG in x86 implementation.
 // Convert the LONG value 'lval' into DOUBLE type, and move it into 'reg'
 |.macro DOUBLE_GET_LONG, reg, lval, tmp_reg
@@ -4281,7 +4319,49 @@ static int zend_jit_cmp_long_long(dasm_State    **Dst,
 
 static int zend_jit_cmp_double_common(dasm_State **Dst, const zend_op *opline, zend_jit_addr res_addr, bool swap, zend_uchar smart_branch_opcode, uint32_t target_label, uint32_t target_label2, const void *exit_addr)
 {
-	|	brk #0	// TODO
+	if (smart_branch_opcode) {
+		|	brk #0	// TODO
+	} else {
+		switch (opline->opcode) {
+			case ZEND_IS_EQUAL:
+			case ZEND_IS_IDENTICAL:
+			case ZEND_CASE:
+			case ZEND_CASE_STRICT:
+				|	brk #0	// TODO
+				break;
+			case ZEND_IS_NOT_EQUAL:
+			case ZEND_IS_NOT_IDENTICAL:
+				|	brk #0	// TODO
+				break;
+			case ZEND_IS_SMALLER:
+				|	bvs >1
+				|	mov REG0, #IS_TRUE
+				||	if (swap) {
+				|		bhi >2	// TODO: why the NaN check is missing in x86?
+				||	} else {
+				|		blo >2
+				||	}
+				|1:
+				|	mov REG0, #IS_FALSE
+				|2:
+				break;
+			case ZEND_IS_SMALLER_OR_EQUAL:
+				|	bvs >1
+				|	mov REG0, #IS_TRUE
+				||	if (swap) {
+				|		bhs >2	// TODO: why the NaN check is missing in x86?
+				||	} else {
+				|		bls >2
+				||	}
+				|1:
+				|	mov REG0, #IS_FALSE
+				|2:
+				break;
+			default:
+				ZEND_UNREACHABLE();
+		}
+		|	SET_ZVAL_TYPE_INFO_FROM_REG res_addr, REG0w, TMP1
+	}
 
 	return 1;
 }
@@ -4290,7 +4370,8 @@ static int zend_jit_cmp_long_double(dasm_State **Dst, const zend_op *opline, zen
 {
 	zend_reg tmp_reg = ZREG_FPR0;
 
-	|	brk #0	// TODO
+	|	DOUBLE_GET_ZVAL_LVAL tmp_reg, op1_addr, ZREG_REG0, ZREG_TMP1
+	|	DOUBLE_CMP fcmp, tmp_reg, op2_addr, ZREG_TMP1, ZREG_FPTMP
 
 	return zend_jit_cmp_double_common(Dst, opline, res_addr, 0, smart_branch_opcode, target_label, target_label2, exit_addr);
 }
@@ -4299,7 +4380,8 @@ static int zend_jit_cmp_double_long(dasm_State **Dst, const zend_op *opline, zen
 {
 	zend_reg tmp_reg = ZREG_FPR0;
 
-	|	brk #0	// TODO
+	|	DOUBLE_GET_ZVAL_LVAL tmp_reg, op2_addr, ZREG_REG0, ZREG_TMP1
+	|	DOUBLE_CMP fcmp, tmp_reg, op1_addr, ZREG_TMP1, ZREG_FPTMP
 
 	return zend_jit_cmp_double_common(Dst, opline, res_addr, /* swap */ 1, smart_branch_opcode, target_label, target_label2, exit_addr);
 }
@@ -4358,7 +4440,13 @@ static int zend_jit_cmp(dasm_State    **Dst,
 				|	IF_NOT_ZVAL_TYPE op2_addr, IS_LONG, >3, TMP1w, TMP2
 				|.cold_code
 				|3:
-				|	brk #0	// TODO
+				if (op2_info & (MAY_BE_ANY-(MAY_BE_LONG|MAY_BE_DOUBLE))) {
+					|	IF_NOT_ZVAL_TYPE op2_addr, IS_DOUBLE, >9, TMP1w, TMP2
+				}
+				if (!zend_jit_cmp_long_double(Dst, opline, op1_addr, op2_addr, res_addr, smart_branch_opcode, target_label, target_label2, exit_addr)) {
+					return 0;
+				}
+				|	b >6
 				|.code
 			} else {
 				|	brk #0	// TODO
@@ -4370,7 +4458,34 @@ static int zend_jit_cmp(dasm_State    **Dst,
 		if (op1_info & MAY_BE_DOUBLE) {
 			|.cold_code
 			|4:
-			|	brk #0	// TODO
+			if (op1_info & (MAY_BE_ANY-(MAY_BE_LONG|MAY_BE_DOUBLE))) {
+				|	IF_NOT_ZVAL_TYPE op1_addr, IS_DOUBLE, >9, TMP1w, TMP2
+			}
+			if (op2_info & MAY_BE_DOUBLE) {
+				if (!same_ops && (op2_info & (MAY_BE_ANY-MAY_BE_DOUBLE))) {
+					if (!same_ops) {
+						|	IF_NOT_ZVAL_TYPE op2_addr, IS_DOUBLE, >5, TMP1w, TMP2
+					} else {
+						|	brk #0	// TODO
+						|	IF_NOT_ZVAL_TYPE op2_addr, IS_DOUBLE, >9, TMP1w, TMP2
+					}
+				}
+				|	brk #0	// TODO
+				if (!zend_jit_cmp_double_double(Dst, opline, op1_addr, op2_addr, res_addr, smart_branch_opcode, target_label, target_label2, exit_addr)) {
+					return 0;
+				}
+				|	b >6
+			}
+			if (!same_ops) {
+				|5:
+				if (op2_info & (MAY_BE_ANY-(MAY_BE_LONG|MAY_BE_DOUBLE))) {
+					|	IF_NOT_ZVAL_TYPE op2_addr, IS_LONG, >9, TMP1w, TMP2
+				}
+				if (!zend_jit_cmp_double_long(Dst, opline, op1_addr, op2_addr, res_addr, smart_branch_opcode, target_label, target_label2, exit_addr)) {
+					return 0;
+				}
+				|	b >6
+			}
 			|.code
 		}
 	} else if ((op1_info & MAY_BE_DOUBLE) &&
@@ -6469,7 +6584,7 @@ static int zend_jit_zval_copy_deref(dasm_State **Dst, zend_jit_addr res_addr, ze
 	|	GC_ADDREF REG1, TMP1w
 	|2:
 	|	SET_ZVAL_PTR res_addr, REG1, TMP1
-	|	SET_ZVAL_TYPE_INFO_FROM_REG res_addr, REG2, TMP1
+	|	SET_ZVAL_TYPE_INFO_FROM_REG res_addr, REG2w, TMP1
 
 	return 1;
 }

ext/opcache/jit/zend_jit_arm64.h

@@ -129,6 +129,7 @@ typedef struct _zend_jit_registers_buf {
 #define ZREG_TMP2  ZREG_X12
 #define ZREG_TMP3  ZREG_X13
 #define ZREG_TMP4  ZREG_X14
+#define ZREG_FPTMP ZREG_V16
 
 #define ZREG_COPY      ZREG_REG0
 #define ZREG_FIRST_FPR ZREG_V0
@@ -138,7 +139,7 @@ typedef uint64_t zend_regset;
 # define ZEND_REGSET_FIXED \
 	(ZEND_REGSET(ZREG_RSP) | ZEND_REGSET(ZREG_RLR) | ZEND_REGSET(ZREG_RFP) | \
 	ZEND_REGSET(ZREG_RPR) | ZEND_REGSET(ZREG_FP) | ZEND_REGSET(ZREG_IP) | \
-	ZEND_REGSET_INTERVAL(ZREG_TMP1, ZREG_TMP4))
+	ZEND_REGSET_INTERVAL(ZREG_TMP1, ZREG_TMP4) | ZEND_REGSET(ZREG_FPTMP))
 # define ZEND_REGSET_GP \
 	ZEND_REGSET_DIFFERENCE(ZEND_REGSET_INTERVAL(ZREG_X0, ZREG_X30), ZEND_REGSET_FIXED)
 # define ZEND_REGSET_FP \