Skip to content

Commit 08fc388

Browse files
committed
serial: c33: add flow control to BLE serial
1 parent c8089dd commit 08fc388

File tree

4 files changed

+19
-9
lines changed

4 files changed

+19
-9
lines changed

cores/arduino/Serial.cpp

+12-6
Original file line numberDiff line numberDiff line change
@@ -82,10 +82,11 @@ void UART::WrapperCallback(uart_callback_args_t *p_args) {
8282
}
8383

8484

85-
/* -------------------------------------------------------------------------- */
86-
UART::UART(int _pin_tx, int _pin_rx) :
85+
UART::UART(int _pin_tx, int _pin_rx, int _pin_rts, int _pin_cts):
8786
tx_pin(_pin_tx),
8887
rx_pin(_pin_rx),
88+
rts_pin(_pin_rts),
89+
cts_pin(_pin_cts),
8990
init_ok(false) {
9091
/* -------------------------------------------------------------------------- */
9192
uart_cfg.txi_irq = FSP_INVALID_VECTOR;
@@ -94,9 +95,6 @@ UART::UART(int _pin_tx, int _pin_rx) :
9495
uart_cfg.eri_irq = FSP_INVALID_VECTOR;
9596
}
9697

97-
98-
99-
10098
/* -------------------------------------------------------------------------- */
10199
bool UART::setUpUartIrqs(uart_cfg_t &cfg) {
102100
/* -------------------------------------------------------------------------- */
@@ -181,9 +179,14 @@ bool UART::cfg_pins(int max_index) {
181179
/* actually configuring PIN function */
182180
ioport_peripheral_t ioport_tx = USE_SCI_EVEN_CFG(cfg_tx) ? IOPORT_PERIPHERAL_SCI0_2_4_6_8 : IOPORT_PERIPHERAL_SCI1_3_5_7_9;
183181
ioport_peripheral_t ioport_rx = USE_SCI_EVEN_CFG(cfg_rx) ? IOPORT_PERIPHERAL_SCI0_2_4_6_8 : IOPORT_PERIPHERAL_SCI1_3_5_7_9;
184-
182+
185183
R_IOPORT_PinCfg(&g_ioport_ctrl, g_pin_cfg[tx_pin].pin, (uint32_t) (IOPORT_CFG_PERIPHERAL_PIN | ioport_tx));
186184
R_IOPORT_PinCfg(&g_ioport_ctrl, g_pin_cfg[rx_pin].pin, (uint32_t) (IOPORT_CFG_PERIPHERAL_PIN | ioport_rx));
185+
if (rts_pin != -1 && cts_pin != -1) {
186+
// hopefully people using flow control have read the datasheet so let's avoid the double check
187+
R_IOPORT_PinCfg(&g_ioport_ctrl, g_pin_cfg[rts_pin].pin, (uint32_t) (IOPORT_CFG_PERIPHERAL_PIN | ioport_rx));
188+
R_IOPORT_PinCfg(&g_ioport_ctrl, g_pin_cfg[cts_pin].pin, (uint32_t) (IOPORT_CFG_PERIPHERAL_PIN | ioport_rx));
189+
}
187190

188191
return true;
189192
}
@@ -213,6 +216,9 @@ void UART::begin(unsigned long baudrate, uint16_t config) {
213216
uart_cfg_extend.p_baud_setting = &uart_baud;
214217
uart_cfg_extend.flow_control = SCI_UART_FLOW_CONTROL_RTS;
215218
uart_cfg_extend.flow_control_pin = (bsp_io_port_pin_t) UINT16_MAX;
219+
if (rts_pin != -1 && cts_pin != -1) {
220+
uart_cfg_extend.flow_control = SCI_UART_FLOW_CONTROL_HARDWARE_CTSRTS;
221+
}
216222
uart_cfg_extend.rs485_setting.enable = SCI_UART_RS485_DISABLE;
217223
uart_cfg_extend.rs485_setting.polarity = SCI_UART_RS485_DE_POLARITY_HIGH;
218224
uart_cfg_extend.rs485_setting.de_control_pin = (bsp_io_port_pin_t) UINT16_MAX;

cores/arduino/Serial.h

+4-2
Original file line numberDiff line numberDiff line change
@@ -52,8 +52,8 @@ class UART : public arduino::HardwareSerial {
5252
public:
5353
static UART *g_uarts[MAX_UARTS];
5454
static void WrapperCallback(uart_callback_args_t *p_args);
55-
56-
UART(int _pin_tx, int _pin_rx);
55+
56+
UART(int _pin_tx, int _pin_rx, int pin_rts = -1, int pin_cts = -1);
5757
void begin(unsigned long);
5858
void begin(unsigned long, uint16_t config);
5959
void end();
@@ -70,6 +70,8 @@ class UART : public arduino::HardwareSerial {
7070
private:
7171
int tx_pin;
7272
int rx_pin;
73+
int rts_pin = -1;
74+
int cts_pin = -1;
7375
bool cfg_pins(int max_index);
7476

7577
int channel;

cores/arduino/SerialObj3.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -9,5 +9,5 @@ UART _UART4_(UART4_TX_PIN, UART4_RX_PIN);
99
#endif
1010

1111
#if SERIAL_HOWMANY > 4
12-
UART _UART5_(UART5_TX_PIN, UART5_RX_PIN);
12+
UART _UART5_(UART5_TX_PIN, UART5_RX_PIN, UART5_RTS_PIN, UART5_CTS_PIN);
1313
#endif

variants/PORTENTA_C33/pins_arduino.h

+2
Original file line numberDiff line numberDiff line change
@@ -80,6 +80,8 @@ static const uint8_t A7 = PIN_A7;
8080
#define UART4_RX_PIN 58
8181
#define UART5_TX_PIN 92
8282
#define UART5_RX_PIN 93
83+
#define UART5_RTS_PIN 94
84+
#define UART5_CTS_PIN 95
8385

8486
/****** WIRE CORE DEFINES ******/
8587

0 commit comments

Comments
 (0)