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[LoongArch] Add codegen support for not
Differential Revision: https://reviews.llvm.org/D131384
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‎llvm/lib/Target/LoongArch/LoongArchInstrInfo.td

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Original file line numberDiff line numberDiff line change
@@ -661,6 +661,10 @@ def : PatGprGpr<or, OR>;
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def : PatGprImm<or, ORI, uimm12>;
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def : PatGprGpr<xor, XOR>;
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def : PatGprImm<xor, XORI, uimm12>;
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def : Pat<(not GPR:$rj), (NOR GPR:$rj, R0)>;
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def : Pat<(not (or GPR:$rj, GPR:$rk)), (NOR GPR:$rj, GPR:$rk)>;
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def : Pat<(or GPR:$rj, (not GPR:$rk)), (ORN GPR:$rj, GPR:$rk)>;
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def : Pat<(and GPR:$rj, (not GPR:$rk)), (ANDN GPR:$rj, GPR:$rk)>;
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/// FrameIndex calculations
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let Predicates = [IsLA32] in {

‎llvm/test/CodeGen/LoongArch/calling-conv-lp64d.ll

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -277,11 +277,9 @@ define i64 @caller_small_scalar_ret() nounwind {
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; CHECK-NEXT: addi.d $sp, $sp, -16
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; CHECK-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
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; CHECK-NEXT: bl callee_small_scalar_ret
280-
; CHECK-NEXT: addi.w $a2, $zero, -1
281-
; CHECK-NEXT: xor $a1, $a1, $a2
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; CHECK-NEXT: addi.w $a2, $zero, -2
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; CHECK-NEXT: xor $a0, $a0, $a2
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; CHECK-NEXT: or $a0, $a0, $a1
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; CHECK-NEXT: orn $a0, $a0, $a1
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; CHECK-NEXT: sltui $a0, $a0, 1
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; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
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; CHECK-NEXT: addi.d $sp, $sp, 16

‎llvm/test/CodeGen/LoongArch/not.ll

Lines changed: 243 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,243 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch32 < %s | FileCheck %s --check-prefix=LA32
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; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s --check-prefix=LA64
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define i8 @nor_i8(i8 %a, i8 %b) nounwind {
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; LA32-LABEL: nor_i8:
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; LA32: # %bb.0:
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; LA32-NEXT: nor $a0, $a0, $a1
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; LA32-NEXT: jirl $zero, $ra, 0
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;
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; LA64-LABEL: nor_i8:
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; LA64: # %bb.0:
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; LA64-NEXT: nor $a0, $a0, $a1
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; LA64-NEXT: jirl $zero, $ra, 0
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%or = or i8 %a, %b
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%neg = xor i8 %or, -1
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ret i8 %neg
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}
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define i16 @nor_i16(i16 %a, i16 %b) nounwind {
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; LA32-LABEL: nor_i16:
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; LA32: # %bb.0:
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; LA32-NEXT: nor $a0, $a0, $a1
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; LA32-NEXT: jirl $zero, $ra, 0
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;
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; LA64-LABEL: nor_i16:
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; LA64: # %bb.0:
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; LA64-NEXT: nor $a0, $a0, $a1
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; LA64-NEXT: jirl $zero, $ra, 0
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%or = or i16 %a, %b
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%neg = xor i16 %or, -1
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ret i16 %neg
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}
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define i32 @nor_i32(i32 %a, i32 %b) nounwind {
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; LA32-LABEL: nor_i32:
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; LA32: # %bb.0:
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; LA32-NEXT: nor $a0, $a0, $a1
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; LA32-NEXT: jirl $zero, $ra, 0
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;
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; LA64-LABEL: nor_i32:
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; LA64: # %bb.0:
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; LA64-NEXT: nor $a0, $a0, $a1
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; LA64-NEXT: jirl $zero, $ra, 0
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%or = or i32 %a, %b
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%neg = xor i32 %or, -1
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ret i32 %neg
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}
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define i64 @nor_i64(i64 %a, i64 %b) nounwind {
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; LA32-LABEL: nor_i64:
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; LA32: # %bb.0:
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; LA32-NEXT: nor $a0, $a0, $a2
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; LA32-NEXT: nor $a1, $a1, $a3
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; LA32-NEXT: jirl $zero, $ra, 0
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;
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; LA64-LABEL: nor_i64:
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; LA64: # %bb.0:
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; LA64-NEXT: nor $a0, $a0, $a1
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; LA64-NEXT: jirl $zero, $ra, 0
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%or = or i64 %a, %b
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%neg = xor i64 %or, -1
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ret i64 %neg
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}
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define i8 @nor_zero_i8(i8 %a) nounwind {
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; LA32-LABEL: nor_zero_i8:
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; LA32: # %bb.0:
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; LA32-NEXT: nor $a0, $a0, $zero
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; LA32-NEXT: jirl $zero, $ra, 0
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;
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; LA64-LABEL: nor_zero_i8:
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; LA64: # %bb.0:
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; LA64-NEXT: nor $a0, $a0, $zero
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; LA64-NEXT: jirl $zero, $ra, 0
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%neg = xor i8 %a, -1
77+
ret i8 %neg
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}
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define i16 @nor_zero_i16(i16 %a) nounwind {
81+
; LA32-LABEL: nor_zero_i16:
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; LA32: # %bb.0:
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; LA32-NEXT: nor $a0, $a0, $zero
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; LA32-NEXT: jirl $zero, $ra, 0
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;
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; LA64-LABEL: nor_zero_i16:
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; LA64: # %bb.0:
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; LA64-NEXT: nor $a0, $a0, $zero
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; LA64-NEXT: jirl $zero, $ra, 0
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%neg = xor i16 %a, -1
91+
ret i16 %neg
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}
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define i32 @nor_zero_i32(i32 %a) nounwind {
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; LA32-LABEL: nor_zero_i32:
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; LA32: # %bb.0:
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; LA32-NEXT: nor $a0, $a0, $zero
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; LA32-NEXT: jirl $zero, $ra, 0
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;
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; LA64-LABEL: nor_zero_i32:
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; LA64: # %bb.0:
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; LA64-NEXT: nor $a0, $a0, $zero
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; LA64-NEXT: jirl $zero, $ra, 0
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%neg = xor i32 %a, -1
105+
ret i32 %neg
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}
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define i64 @nor_zero_i64(i64 %a) nounwind {
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; LA32-LABEL: nor_zero_i64:
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; LA32: # %bb.0:
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; LA32-NEXT: nor $a0, $a0, $zero
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; LA32-NEXT: nor $a1, $a1, $zero
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; LA32-NEXT: jirl $zero, $ra, 0
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;
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; LA64-LABEL: nor_zero_i64:
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; LA64: # %bb.0:
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; LA64-NEXT: nor $a0, $a0, $zero
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; LA64-NEXT: jirl $zero, $ra, 0
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%neg = xor i64 %a, -1
120+
ret i64 %neg
121+
}
122+
123+
define i8 @orn_i8(i8 %a, i8 %b) nounwind {
124+
; LA32-LABEL: orn_i8:
125+
; LA32: # %bb.0:
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; LA32-NEXT: orn $a0, $a0, $a1
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; LA32-NEXT: jirl $zero, $ra, 0
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;
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; LA64-LABEL: orn_i8:
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; LA64: # %bb.0:
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; LA64-NEXT: orn $a0, $a0, $a1
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; LA64-NEXT: jirl $zero, $ra, 0
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%neg = xor i8 %b, -1
134+
%or = or i8 %neg, %a
135+
ret i8 %or
136+
}
137+
138+
define i16 @orn_i16(i16 %a, i16 %b) nounwind {
139+
; LA32-LABEL: orn_i16:
140+
; LA32: # %bb.0:
141+
; LA32-NEXT: orn $a0, $a0, $a1
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; LA32-NEXT: jirl $zero, $ra, 0
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;
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; LA64-LABEL: orn_i16:
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; LA64: # %bb.0:
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; LA64-NEXT: orn $a0, $a0, $a1
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; LA64-NEXT: jirl $zero, $ra, 0
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%neg = xor i16 %b, -1
149+
%or = or i16 %neg, %a
150+
ret i16 %or
151+
}
152+
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define i32 @orn_i32(i32 %a, i32 %b) nounwind {
154+
; LA32-LABEL: orn_i32:
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; LA32: # %bb.0:
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; LA32-NEXT: orn $a0, $a0, $a1
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; LA32-NEXT: jirl $zero, $ra, 0
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;
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; LA64-LABEL: orn_i32:
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; LA64: # %bb.0:
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; LA64-NEXT: orn $a0, $a0, $a1
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; LA64-NEXT: jirl $zero, $ra, 0
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%neg = xor i32 %b, -1
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%or = or i32 %neg, %a
165+
ret i32 %or
166+
}
167+
168+
define i64 @orn_i64(i64 %a, i64 %b) nounwind {
169+
; LA32-LABEL: orn_i64:
170+
; LA32: # %bb.0:
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; LA32-NEXT: orn $a0, $a0, $a2
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; LA32-NEXT: orn $a1, $a1, $a3
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; LA32-NEXT: jirl $zero, $ra, 0
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;
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; LA64-LABEL: orn_i64:
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; LA64: # %bb.0:
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; LA64-NEXT: orn $a0, $a0, $a1
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; LA64-NEXT: jirl $zero, $ra, 0
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%neg = xor i64 %b, -1
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%or = or i64 %neg, %a
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ret i64 %or
182+
}
183+
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define i8 @andn_i8(i8 %a, i8 %b) nounwind {
185+
; LA32-LABEL: andn_i8:
186+
; LA32: # %bb.0:
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; LA32-NEXT: andn $a0, $a0, $a1
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; LA32-NEXT: jirl $zero, $ra, 0
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;
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; LA64-LABEL: andn_i8:
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; LA64: # %bb.0:
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; LA64-NEXT: andn $a0, $a0, $a1
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; LA64-NEXT: jirl $zero, $ra, 0
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%neg = xor i8 %b, -1
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%and = and i8 %neg, %a
196+
ret i8 %and
197+
}
198+
199+
define i16 @andn_i16(i16 %a, i16 %b) nounwind {
200+
; LA32-LABEL: andn_i16:
201+
; LA32: # %bb.0:
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; LA32-NEXT: andn $a0, $a0, $a1
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; LA32-NEXT: jirl $zero, $ra, 0
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;
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; LA64-LABEL: andn_i16:
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; LA64: # %bb.0:
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; LA64-NEXT: andn $a0, $a0, $a1
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; LA64-NEXT: jirl $zero, $ra, 0
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%neg = xor i16 %b, -1
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%and = and i16 %neg, %a
211+
ret i16 %and
212+
}
213+
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define i32 @andn_i32(i32 %a, i32 %b) nounwind {
215+
; LA32-LABEL: andn_i32:
216+
; LA32: # %bb.0:
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; LA32-NEXT: andn $a0, $a0, $a1
218+
; LA32-NEXT: jirl $zero, $ra, 0
219+
;
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; LA64-LABEL: andn_i32:
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; LA64: # %bb.0:
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; LA64-NEXT: andn $a0, $a0, $a1
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; LA64-NEXT: jirl $zero, $ra, 0
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%neg = xor i32 %b, -1
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%and = and i32 %neg, %a
226+
ret i32 %and
227+
}
228+
229+
define i64 @andn_i64(i64 %a, i64 %b) nounwind {
230+
; LA32-LABEL: andn_i64:
231+
; LA32: # %bb.0:
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; LA32-NEXT: andn $a0, $a0, $a2
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; LA32-NEXT: andn $a1, $a1, $a3
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; LA32-NEXT: jirl $zero, $ra, 0
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;
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; LA64-LABEL: andn_i64:
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; LA64: # %bb.0:
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; LA64-NEXT: andn $a0, $a0, $a1
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; LA64-NEXT: jirl $zero, $ra, 0
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%neg = xor i64 %b, -1
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%and = and i64 %neg, %a
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ret i64 %and
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}

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