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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 |
| 2 | +; RUN: opt -p loop-vectorize -mtriple riscv64-linux-gnu -mattr=+v,+f -S %s | FileCheck %s |
| 3 | + |
| 4 | +target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128" |
| 5 | + |
| 6 | +; Test with a dead load in the loop, from |
| 7 | +; https://github.com/llvm/llvm-project/issues/99701 |
| 8 | +define void @dead_load(ptr %p, i16 %start) { |
| 9 | +; CHECK-LABEL: define void @dead_load( |
| 10 | +; CHECK-SAME: ptr [[P:%.*]], i16 [[START:%.*]]) #[[ATTR0:[0-9]+]] { |
| 11 | +; CHECK-NEXT: [[ENTRY:.*]]: |
| 12 | +; CHECK-NEXT: [[START_EXT:%.*]] = sext i16 [[START]] to i64 |
| 13 | +; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[START_EXT]], i64 111) |
| 14 | +; CHECK-NEXT: [[TMP0:%.*]] = sub i64 [[SMAX]], [[START_EXT]] |
| 15 | +; CHECK-NEXT: [[UMIN:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP0]], i64 1) |
| 16 | +; CHECK-NEXT: [[TMP1:%.*]] = sub i64 [[SMAX]], [[UMIN]] |
| 17 | +; CHECK-NEXT: [[TMP2:%.*]] = sub i64 [[TMP1]], [[START_EXT]] |
| 18 | +; CHECK-NEXT: [[TMP3:%.*]] = udiv i64 [[TMP2]], 3 |
| 19 | +; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[UMIN]], [[TMP3]] |
| 20 | +; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[TMP4]], 1 |
| 21 | +; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.vscale.i64() |
| 22 | +; CHECK-NEXT: [[TMP7:%.*]] = mul i64 [[TMP6]], 8 |
| 23 | +; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ule i64 [[TMP5]], [[TMP7]] |
| 24 | +; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| 25 | +; CHECK: [[VECTOR_PH]]: |
| 26 | +; CHECK-NEXT: [[TMP8:%.*]] = call i64 @llvm.vscale.i64() |
| 27 | +; CHECK-NEXT: [[TMP9:%.*]] = mul i64 [[TMP8]], 8 |
| 28 | +; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP5]], [[TMP9]] |
| 29 | +; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[N_MOD_VF]], 0 |
| 30 | +; CHECK-NEXT: [[TMP11:%.*]] = select i1 [[TMP10]], i64 [[TMP9]], i64 [[N_MOD_VF]] |
| 31 | +; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP5]], [[TMP11]] |
| 32 | +; CHECK-NEXT: [[TMP12:%.*]] = mul i64 [[N_VEC]], 3 |
| 33 | +; CHECK-NEXT: [[IND_END:%.*]] = add i64 [[START_EXT]], [[TMP12]] |
| 34 | +; CHECK-NEXT: [[TMP13:%.*]] = call i64 @llvm.vscale.i64() |
| 35 | +; CHECK-NEXT: [[TMP14:%.*]] = mul i64 [[TMP13]], 8 |
| 36 | +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i64> poison, i64 [[START_EXT]], i64 0 |
| 37 | +; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i64> [[DOTSPLATINSERT]], <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer |
| 38 | +; CHECK-NEXT: [[TMP15:%.*]] = call <vscale x 8 x i64> @llvm.experimental.stepvector.nxv8i64() |
| 39 | +; CHECK-NEXT: [[TMP16:%.*]] = add <vscale x 8 x i64> [[TMP15]], zeroinitializer |
| 40 | +; CHECK-NEXT: [[TMP17:%.*]] = mul <vscale x 8 x i64> [[TMP16]], shufflevector (<vscale x 8 x i64> insertelement (<vscale x 8 x i64> poison, i64 3, i64 0), <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer) |
| 41 | +; CHECK-NEXT: [[INDUCTION:%.*]] = add <vscale x 8 x i64> [[DOTSPLAT]], [[TMP17]] |
| 42 | +; CHECK-NEXT: [[TMP18:%.*]] = call i64 @llvm.vscale.i64() |
| 43 | +; CHECK-NEXT: [[TMP19:%.*]] = mul i64 [[TMP18]], 8 |
| 44 | +; CHECK-NEXT: [[TMP20:%.*]] = mul i64 3, [[TMP19]] |
| 45 | +; CHECK-NEXT: [[DOTSPLATINSERT1:%.*]] = insertelement <vscale x 8 x i64> poison, i64 [[TMP20]], i64 0 |
| 46 | +; CHECK-NEXT: [[DOTSPLAT2:%.*]] = shufflevector <vscale x 8 x i64> [[DOTSPLATINSERT1]], <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer |
| 47 | +; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] |
| 48 | +; CHECK: [[VECTOR_BODY]]: |
| 49 | +; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| 50 | +; CHECK-NEXT: [[VEC_IND:%.*]] = phi <vscale x 8 x i64> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| 51 | +; CHECK-NEXT: [[TMP21:%.*]] = getelementptr i16, ptr [[P]], <vscale x 8 x i64> [[VEC_IND]] |
| 52 | +; CHECK-NEXT: call void @llvm.masked.scatter.nxv8i16.nxv8p0(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x ptr> [[TMP21]], i32 2, <vscale x 8 x i1> shufflevector (<vscale x 8 x i1> insertelement (<vscale x 8 x i1> poison, i1 true, i64 0), <vscale x 8 x i1> poison, <vscale x 8 x i32> zeroinitializer)) |
| 53 | +; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP14]] |
| 54 | +; CHECK-NEXT: [[VEC_IND_NEXT]] = add <vscale x 8 x i64> [[VEC_IND]], [[DOTSPLAT2]] |
| 55 | +; CHECK-NEXT: [[TMP22:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| 56 | +; CHECK-NEXT: br i1 [[TMP22]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] |
| 57 | +; CHECK: [[MIDDLE_BLOCK]]: |
| 58 | +; CHECK-NEXT: br label %[[SCALAR_PH]] |
| 59 | +; CHECK: [[SCALAR_PH]]: |
| 60 | +; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[IND_END]], %[[MIDDLE_BLOCK]] ], [ [[START_EXT]], %[[ENTRY]] ] |
| 61 | +; CHECK-NEXT: br label %[[LOOP:.*]] |
| 62 | +; CHECK: [[LOOP]]: |
| 63 | +; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ] |
| 64 | +; CHECK-NEXT: [[GEP:%.*]] = getelementptr i16, ptr [[P]], i64 [[IV]] |
| 65 | +; CHECK-NEXT: store i16 0, ptr [[GEP]], align 2 |
| 66 | +; CHECK-NEXT: [[L:%.*]] = load i16, ptr [[GEP]], align 2 |
| 67 | +; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 3 |
| 68 | +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[IV]], 111 |
| 69 | +; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP]], label %[[EXIT:.*]], !llvm.loop [[LOOP3:![0-9]+]] |
| 70 | +; CHECK: [[EXIT]]: |
| 71 | +; CHECK-NEXT: ret void |
| 72 | +; |
| 73 | +entry: |
| 74 | + %start.ext = sext i16 %start to i64 |
| 75 | + br label %loop |
| 76 | + |
| 77 | +loop: |
| 78 | + %iv = phi i64 [ %start.ext, %entry ], [ %iv.next, %loop ] |
| 79 | + %gep = getelementptr i16, ptr %p, i64 %iv |
| 80 | + store i16 0, ptr %gep, align 2 |
| 81 | + %l = load i16, ptr %gep, align 2 |
| 82 | + %iv.next = add i64 %iv, 3 |
| 83 | + %cmp = icmp slt i64 %iv, 111 |
| 84 | + br i1 %cmp, label %loop, label %exit |
| 85 | + |
| 86 | +exit: |
| 87 | + ret void |
| 88 | +} |
| 89 | +;. |
| 90 | +; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]} |
| 91 | +; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1} |
| 92 | +; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"} |
| 93 | +; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]} |
| 94 | +;. |
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