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sparker-armsparker-arm
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[NFC][ARM] Add SimplifyCFG tests
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‎llvm/test/Transforms/SimplifyCFG/ARM/speculate-math.ll

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -simplifycfg -mtriple=thumbv8.1m.main -mattr=+mve < %s | FileCheck %s --check-prefix=CHECK-MVE
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; RUN: opt -S -simplifycfg -mtriple=thumbv8m.main < %s | FileCheck %s --check-prefix=CHECK-V8M-MAIN
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; RUN: opt -S -simplifycfg -mtriple=thumbv8m.base < %s | FileCheck %s --check-prefix=CHECK-V8M-BASE
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declare float @llvm.sqrt.f32(float) nounwind readonly
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declare float @llvm.fma.f32(float, float, float) nounwind readonly
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declare float @llvm.fmuladd.f32(float, float, float) nounwind readonly
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declare float @llvm.fabs.f32(float) nounwind readonly
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declare float @llvm.minnum.f32(float, float) nounwind readonly
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declare float @llvm.maxnum.f32(float, float) nounwind readonly
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declare float @llvm.minimum.f32(float, float) nounwind readonly
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declare float @llvm.maximum.f32(float, float) nounwind readonly
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define double @fdiv_test(double %a, double %b) {
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; CHECK-MVE-LABEL: @fdiv_test(
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; CHECK-MVE-NEXT: entry:
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; CHECK-MVE-NEXT: [[CMP:%.*]] = fcmp ogt double [[A:%.*]], 0.000000e+00
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; CHECK-MVE-NEXT: [[DIV:%.*]] = fdiv double [[B:%.*]], [[A]]
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; CHECK-MVE-NEXT: [[COND:%.*]] = select nsz i1 [[CMP]], double [[DIV]], double 0.000000e+00
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; CHECK-MVE-NEXT: ret double [[COND]]
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;
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; CHECK-V8M-MAIN-LABEL: @fdiv_test(
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; CHECK-V8M-MAIN-NEXT: entry:
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; CHECK-V8M-MAIN-NEXT: [[CMP:%.*]] = fcmp ogt double [[A:%.*]], 0.000000e+00
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; CHECK-V8M-MAIN-NEXT: [[DIV:%.*]] = fdiv double [[B:%.*]], [[A]]
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; CHECK-V8M-MAIN-NEXT: [[COND:%.*]] = select nsz i1 [[CMP]], double [[DIV]], double 0.000000e+00
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; CHECK-V8M-MAIN-NEXT: ret double [[COND]]
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;
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; CHECK-V8M-BASE-LABEL: @fdiv_test(
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; CHECK-V8M-BASE-NEXT: entry:
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; CHECK-V8M-BASE-NEXT: [[CMP:%.*]] = fcmp ogt double [[A:%.*]], 0.000000e+00
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; CHECK-V8M-BASE-NEXT: [[DIV:%.*]] = fdiv double [[B:%.*]], [[A]]
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; CHECK-V8M-BASE-NEXT: [[COND:%.*]] = select nsz i1 [[CMP]], double [[DIV]], double 0.000000e+00
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; CHECK-V8M-BASE-NEXT: ret double [[COND]]
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;
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entry:
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%cmp = fcmp ogt double %a, 0.0
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br i1 %cmp, label %cond.true, label %cond.end
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cond.true:
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%div = fdiv double %b, %a
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br label %cond.end
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cond.end:
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%cond = phi nsz double [ %div, %cond.true ], [ 0.0, %entry ]
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ret double %cond
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}
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define void @sqrt_test(float addrspace(1)* noalias nocapture %out, float %a) nounwind {
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; CHECK-MVE-LABEL: @sqrt_test(
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; CHECK-MVE-NEXT: entry:
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; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
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; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.sqrt.f32(float [[A]]) #3
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; CHECK-MVE-NEXT: [[COND_I:%.*]] = select afn i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
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; CHECK-MVE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
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; CHECK-MVE-NEXT: ret void
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;
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; CHECK-V8M-MAIN-LABEL: @sqrt_test(
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; CHECK-V8M-MAIN-NEXT: entry:
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; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
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; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.sqrt.f32(float [[A]]) #2
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; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select afn i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
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; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
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; CHECK-V8M-MAIN-NEXT: ret void
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;
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; CHECK-V8M-BASE-LABEL: @sqrt_test(
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; CHECK-V8M-BASE-NEXT: entry:
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; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
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; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.sqrt.f32(float [[A]]) #2
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; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select afn i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
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; CHECK-V8M-BASE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
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; CHECK-V8M-BASE-NEXT: ret void
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;
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entry:
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%cmp.i = fcmp olt float %a, 0.000000e+00
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br i1 %cmp.i, label %test_sqrt.exit, label %cond.else.i
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cond.else.i: ; preds = %entry
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%0 = tail call float @llvm.sqrt.f32(float %a) nounwind readnone
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br label %test_sqrt.exit
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test_sqrt.exit: ; preds = %cond.else.i, %entry
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%cond.i = phi afn float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
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store float %cond.i, float addrspace(1)* %out, align 4
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ret void
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}
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define void @fabs_test(float addrspace(1)* noalias nocapture %out, float %a) nounwind {
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; CHECK-MVE-LABEL: @fabs_test(
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; CHECK-MVE-NEXT: entry:
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; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
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; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[A]]) #3
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; CHECK-MVE-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
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; CHECK-MVE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
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; CHECK-MVE-NEXT: ret void
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;
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; CHECK-V8M-MAIN-LABEL: @fabs_test(
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; CHECK-V8M-MAIN-NEXT: entry:
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; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
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; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[A]]) #2
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; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
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; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
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; CHECK-V8M-MAIN-NEXT: ret void
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;
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; CHECK-V8M-BASE-LABEL: @fabs_test(
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; CHECK-V8M-BASE-NEXT: entry:
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; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
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; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[A]]) #2
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; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
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; CHECK-V8M-BASE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
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; CHECK-V8M-BASE-NEXT: ret void
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;
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entry:
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%cmp.i = fcmp olt float %a, 0.000000e+00
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br i1 %cmp.i, label %test_fabs.exit, label %cond.else.i
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cond.else.i: ; preds = %entry
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%0 = tail call float @llvm.fabs.f32(float %a) nounwind readnone
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br label %test_fabs.exit
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test_fabs.exit: ; preds = %cond.else.i, %entry
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%cond.i = phi reassoc float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
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store float %cond.i, float addrspace(1)* %out, align 4
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ret void
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}
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define void @fma_test(float addrspace(1)* noalias nocapture %out, float %a, float %b, float %c) nounwind {
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; CHECK-MVE-LABEL: @fma_test(
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; CHECK-MVE-NEXT: entry:
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; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
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; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fma.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #3
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; CHECK-MVE-NEXT: [[COND_I:%.*]] = select reassoc nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
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; CHECK-MVE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
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; CHECK-MVE-NEXT: ret void
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;
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; CHECK-V8M-MAIN-LABEL: @fma_test(
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; CHECK-V8M-MAIN-NEXT: entry:
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; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
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; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.fma.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2
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; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select reassoc nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
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; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
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; CHECK-V8M-MAIN-NEXT: ret void
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;
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; CHECK-V8M-BASE-LABEL: @fma_test(
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; CHECK-V8M-BASE-NEXT: entry:
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; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
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; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fma.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2
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; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select reassoc nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
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; CHECK-V8M-BASE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
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; CHECK-V8M-BASE-NEXT: ret void
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;
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entry:
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%cmp.i = fcmp olt float %a, 0.000000e+00
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br i1 %cmp.i, label %test_fma.exit, label %cond.else.i
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cond.else.i: ; preds = %entry
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%0 = tail call float @llvm.fma.f32(float %a, float %b, float %c) nounwind readnone
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br label %test_fma.exit
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test_fma.exit: ; preds = %cond.else.i, %entry
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%cond.i = phi nsz reassoc float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
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store float %cond.i, float addrspace(1)* %out, align 4
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ret void
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}
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define void @fmuladd_test(float addrspace(1)* noalias nocapture %out, float %a, float %b, float %c) nounwind {
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; CHECK-MVE-LABEL: @fmuladd_test(
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; CHECK-MVE-NEXT: entry:
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; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
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; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fmuladd.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #3
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; CHECK-MVE-NEXT: [[COND_I:%.*]] = select ninf i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
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; CHECK-MVE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
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; CHECK-MVE-NEXT: ret void
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;
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; CHECK-V8M-MAIN-LABEL: @fmuladd_test(
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; CHECK-V8M-MAIN-NEXT: entry:
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; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
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; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.fmuladd.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2
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; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select ninf i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
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; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
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; CHECK-V8M-MAIN-NEXT: ret void
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;
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; CHECK-V8M-BASE-LABEL: @fmuladd_test(
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; CHECK-V8M-BASE-NEXT: entry:
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; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
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; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fmuladd.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2
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; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select ninf i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
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; CHECK-V8M-BASE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
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; CHECK-V8M-BASE-NEXT: ret void
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;
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entry:
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%cmp.i = fcmp olt float %a, 0.000000e+00
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br i1 %cmp.i, label %test_fmuladd.exit, label %cond.else.i
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cond.else.i: ; preds = %entry
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%0 = tail call float @llvm.fmuladd.f32(float %a, float %b, float %c) nounwind readnone
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br label %test_fmuladd.exit
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test_fmuladd.exit: ; preds = %cond.else.i, %entry
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%cond.i = phi ninf float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
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store float %cond.i, float addrspace(1)* %out, align 4
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ret void
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}
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define void @minnum_test(float addrspace(1)* noalias nocapture %out, float %a, float %b) nounwind {
207+
; CHECK-MVE-LABEL: @minnum_test(
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; CHECK-MVE-NEXT: entry:
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; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
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; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.minnum.f32(float [[A]], float [[B:%.*]]) #3
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; CHECK-MVE-NEXT: [[COND_I:%.*]] = select i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
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; CHECK-MVE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
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; CHECK-MVE-NEXT: ret void
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;
215+
; CHECK-V8M-MAIN-LABEL: @minnum_test(
216+
; CHECK-V8M-MAIN-NEXT: entry:
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; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
218+
; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.minnum.f32(float [[A]], float [[B:%.*]]) #2
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; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
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; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
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; CHECK-V8M-MAIN-NEXT: ret void
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;
223+
; CHECK-V8M-BASE-LABEL: @minnum_test(
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; CHECK-V8M-BASE-NEXT: entry:
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; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
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; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.minnum.f32(float [[A]], float [[B:%.*]]) #2
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; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
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; CHECK-V8M-BASE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
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; CHECK-V8M-BASE-NEXT: ret void
230+
;
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entry:
232+
%cmp.i = fcmp olt float %a, 0.000000e+00
233+
br i1 %cmp.i, label %test_minnum.exit, label %cond.else.i
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cond.else.i: ; preds = %entry
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%0 = tail call float @llvm.minnum.f32(float %a, float %b) nounwind readnone
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br label %test_minnum.exit
238+
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test_minnum.exit: ; preds = %cond.else.i, %entry
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%cond.i = phi float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
241+
store float %cond.i, float addrspace(1)* %out, align 4
242+
ret void
243+
}
244+
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define void @maxnum_test(float addrspace(1)* noalias nocapture %out, float %a, float %b) nounwind {
246+
; CHECK-MVE-LABEL: @maxnum_test(
247+
; CHECK-MVE-NEXT: entry:
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; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
249+
; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.maxnum.f32(float [[A]], float [[B:%.*]]) #3
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; CHECK-MVE-NEXT: [[COND_I:%.*]] = select ninf nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
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; CHECK-MVE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
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; CHECK-MVE-NEXT: ret void
253+
;
254+
; CHECK-V8M-MAIN-LABEL: @maxnum_test(
255+
; CHECK-V8M-MAIN-NEXT: entry:
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; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
257+
; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.maxnum.f32(float [[A]], float [[B:%.*]]) #2
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; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select ninf nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
259+
; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
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; CHECK-V8M-MAIN-NEXT: ret void
261+
;
262+
; CHECK-V8M-BASE-LABEL: @maxnum_test(
263+
; CHECK-V8M-BASE-NEXT: entry:
264+
; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
265+
; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.maxnum.f32(float [[A]], float [[B:%.*]]) #2
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; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select ninf nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
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; CHECK-V8M-BASE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
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; CHECK-V8M-BASE-NEXT: ret void
269+
;
270+
entry:
271+
%cmp.i = fcmp olt float %a, 0.000000e+00
272+
br i1 %cmp.i, label %test_maxnum.exit, label %cond.else.i
273+
274+
cond.else.i: ; preds = %entry
275+
%0 = tail call float @llvm.maxnum.f32(float %a, float %b) nounwind readnone
276+
br label %test_maxnum.exit
277+
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test_maxnum.exit: ; preds = %cond.else.i, %entry
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%cond.i = phi ninf nsz float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
280+
store float %cond.i, float addrspace(1)* %out, align 4
281+
ret void
282+
}
283+
284+
define void @minimum_test(float addrspace(1)* noalias nocapture %out, float %a, float %b) nounwind {
285+
; CHECK-MVE-LABEL: @minimum_test(
286+
; CHECK-MVE-NEXT: entry:
287+
; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
288+
; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.minimum.f32(float [[A]], float [[B:%.*]]) #3
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; CHECK-MVE-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
290+
; CHECK-MVE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
291+
; CHECK-MVE-NEXT: ret void
292+
;
293+
; CHECK-V8M-MAIN-LABEL: @minimum_test(
294+
; CHECK-V8M-MAIN-NEXT: entry:
295+
; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
296+
; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.minimum.f32(float [[A]], float [[B:%.*]]) #2
297+
; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
298+
; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
299+
; CHECK-V8M-MAIN-NEXT: ret void
300+
;
301+
; CHECK-V8M-BASE-LABEL: @minimum_test(
302+
; CHECK-V8M-BASE-NEXT: entry:
303+
; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
304+
; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.minimum.f32(float [[A]], float [[B:%.*]]) #2
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; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
306+
; CHECK-V8M-BASE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
307+
; CHECK-V8M-BASE-NEXT: ret void
308+
;
309+
entry:
310+
%cmp.i = fcmp olt float %a, 0.000000e+00
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br i1 %cmp.i, label %test_minimum.exit, label %cond.else.i
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cond.else.i: ; preds = %entry
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%0 = tail call float @llvm.minimum.f32(float %a, float %b) nounwind readnone
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br label %test_minimum.exit
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test_minimum.exit: ; preds = %cond.else.i, %entry
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%cond.i = phi reassoc float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
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store float %cond.i, float addrspace(1)* %out, align 4
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ret void
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}
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define void @maximum_test(float addrspace(1)* noalias nocapture %out, float %a, float %b) nounwind {
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; CHECK-MVE-LABEL: @maximum_test(
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; CHECK-MVE-NEXT: entry:
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; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
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; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.maximum.f32(float [[A]], float [[B:%.*]]) #3
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; CHECK-MVE-NEXT: [[COND_I:%.*]] = select nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
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; CHECK-MVE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
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; CHECK-MVE-NEXT: ret void
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;
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; CHECK-V8M-MAIN-LABEL: @maximum_test(
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; CHECK-V8M-MAIN-NEXT: entry:
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; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
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; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.maximum.f32(float [[A]], float [[B:%.*]]) #2
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; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
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; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
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; CHECK-V8M-MAIN-NEXT: ret void
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;
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; CHECK-V8M-BASE-LABEL: @maximum_test(
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; CHECK-V8M-BASE-NEXT: entry:
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; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00
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; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.maximum.f32(float [[A]], float [[B:%.*]]) #2
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; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]]
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; CHECK-V8M-BASE-NEXT: store float [[COND_I]], float addrspace(1)* [[OUT:%.*]], align 4
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; CHECK-V8M-BASE-NEXT: ret void
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;
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entry:
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%cmp.i = fcmp olt float %a, 0.000000e+00
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br i1 %cmp.i, label %test_maximum.exit, label %cond.else.i
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cond.else.i: ; preds = %entry
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%0 = tail call float @llvm.maximum.f32(float %a, float %b) nounwind readnone
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br label %test_maximum.exit
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test_maximum.exit: ; preds = %cond.else.i, %entry
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%cond.i = phi nsz float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
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store float %cond.i, float addrspace(1)* %out, align 4
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ret void
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}

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