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AArch64: add missing Apple CPU names and use them by default.
Apple's CPUs are called A7-A13 in official communication, occasionally with weird suffixes which we probably don't need to care about. This adds each one and describes its features. It also switches the default CPU to the canonical name for Cyclone, but leaves legacy support in so that existing bitcode still compiles.
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11 files changed

+197
-19
lines changed

11 files changed

+197
-19
lines changed

‎clang/lib/Driver/ToolChains/Arch/AArch64.cpp

+5-4
Original file line numberDiff line numberDiff line change
@@ -43,10 +43,11 @@ std::string aarch64::getAArch64TargetCPU(const ArgList &Args,
4343
else if (CPU.size())
4444
return CPU;
4545

46-
// Make sure we pick "cyclone" if -arch is used or when targetting a Darwin
47-
// OS.
46+
// Make sure we pick the appropriate Apple CPU if -arch is used or when
47+
// targetting a Darwin OS.
4848
if (Args.getLastArg(options::OPT_arch) || Triple.isOSDarwin())
49-
return "cyclone";
49+
return Triple.getArch() == llvm::Triple::aarch64_32 ? "apple-s4"
50+
: "apple-a7";
5051

5152
return "generic";
5253
}
@@ -139,7 +140,7 @@ getAArch64MicroArchFeaturesFromMtune(const Driver &D, StringRef Mtune,
139140
// Handle CPU name is 'native'.
140141
if (MtuneLowerCase == "native")
141142
MtuneLowerCase = llvm::sys::getHostCPUName();
142-
if (MtuneLowerCase == "cyclone") {
143+
if (MtuneLowerCase == "cyclone" || MtuneLowerCase.find("apple") == 0) {
143144
Features.push_back("+zcm");
144145
Features.push_back("+zcz");
145146
}

‎clang/test/Driver/aarch64-cpus.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -23,11 +23,11 @@
2323
// RUN: %clang -target arm64-apple-darwin -arch arm64 -### -c %s 2>&1 | FileCheck -check-prefix=ARM64-DARWIN %s
2424
// RUN: %clang -target arm64-apple-darwin -### -c %s 2>&1 | FileCheck -check-prefix=ARM64-DARWIN %s
2525
// RUN: %clang -target arm64-apple-ios12.0 -### -c %s 2>&1 | FileCheck -check-prefix=ARM64-DARWIN %s
26-
// ARM64-DARWIN: "-cc1"{{.*}} "-triple" "arm64{{.*}}" "-target-cpu" "cyclone"
26+
// ARM64-DARWIN: "-cc1"{{.*}} "-triple" "arm64{{.*}}" "-target-cpu" "apple-a7"
2727
// ARM64-DARWIN-SAME: "-target-feature" "+aes"
2828

2929
// RUN: %clang -target arm64-apple-darwin -arch arm64_32 -### -c %s 2>&1 | FileCheck -check-prefix=ARM64_32-DARWIN %s
30-
// ARM64_32-DARWIN: "-cc1"{{.*}} "-triple" "aarch64_32{{.*}}" "-target-cpu" "cyclone"
30+
// ARM64_32-DARWIN: "-cc1"{{.*}} "-triple" "aarch64_32{{.*}}" "-target-cpu" "apple-s4"
3131

3232
// RUN: %clang -target aarch64 -mcpu=cortex-a35 -### -c %s 2>&1 | FileCheck -check-prefix=CA35 %s
3333
// RUN: %clang -target aarch64 -mlittle-endian -mcpu=cortex-a35 -### -c %s 2>&1 | FileCheck -check-prefix=CA35 %s

‎clang/test/Driver/arm64-as.s

+1-1
Original file line numberDiff line numberDiff line change
@@ -2,4 +2,4 @@
22
// RUN: %clang -target arm64-apple-ios -arch arm64 -### -c %s 2>&1 | FileCheck -check-prefix=TARGET %s
33
//
44
// TARGET: "-cc1as"
5-
// TARGET: "-target-cpu" "cyclone"
5+
// TARGET: "-target-cpu" "apple-a7"

‎clang/test/Preprocessor/aarch64-target-features.c

+17-4
Original file line numberDiff line numberDiff line change
@@ -142,7 +142,16 @@
142142
// RUN: %clang -target aarch64 -mtune=CYCLONE -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MTUNE-CYCLONE %s
143143
// CHECK-MTUNE-CYCLONE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+zcm" "-target-feature" "+zcz"
144144

145-
// RUN: %clang -target aarch64 -mcpu=cyclone -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-CYCLONE %s
145+
// RUN: %clang -target aarch64 -mcpu=apple-a7 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-APPLE-A7 %s
146+
// RUN: %clang -target aarch64 -mcpu=apple-a8 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-APPLE-A7 %s
147+
// RUN: %clang -target aarch64 -mcpu=apple-a9 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-APPLE-A7 %s
148+
// RUN: %clang -target aarch64 -mcpu=apple-a10 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-APPLE-A10 %s
149+
// RUN: %clang -target aarch64 -mcpu=apple-a11 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-APPLE-A11 %s
150+
// RUN: %clang -target aarch64 -mcpu=apple-a12 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-APPLE-A12 %s
151+
// RUN: %clang -target aarch64 -mcpu=apple-a13 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-APPLE-A13 %s
152+
// RUN: %clang -target aarch64 -mcpu=apple-s4 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-APPLE-A12 %s
153+
// RUN: %clang -target aarch64 -mcpu=apple-s5 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-APPLE-A12 %s
154+
// RUN: %clang -target aarch64 -mcpu=cyclone -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-APPLE-A7 %s
146155
// RUN: %clang -target aarch64 -mcpu=cortex-a35 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-A35 %s
147156
// RUN: %clang -target aarch64 -mcpu=cortex-a53 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-A53 %s
148157
// RUN: %clang -target aarch64 -mcpu=cortex-a57 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-A57 %s
@@ -153,7 +162,11 @@
153162
// RUN: %clang -target aarch64 -mcpu=exynos-m5 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-M4 %s
154163
// RUN: %clang -target aarch64 -mcpu=kryo -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-KRYO %s
155164
// RUN: %clang -target aarch64 -mcpu=thunderx2t99 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-THUNDERX2T99 %s
156-
// CHECK-MCPU-CYCLONE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crypto" "-target-feature" "+zcm" "-target-feature" "+zcz"
165+
// CHECK-MCPU-APPLE-A7: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crypto" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+sha2" "-target-feature" "+aes"
166+
// CHECK-MCPU-APPLE-A10: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+rdm" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+sha2" "-target-feature" "+aes"
167+
// CHECK-MCPU-APPLE-A11: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.2a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+sha2" "-target-feature" "+aes"
168+
// CHECK-MCPU-APPLE-A12: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.3a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+fullfp16" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+rcpc" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+sha2" "-target-feature" "+aes"
169+
// CHECK-MCPU-APPLE-A13: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.4a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+dotprod" "-target-feature" "+fullfp16" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+rcpc" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+fp16fml" "-target-feature" "+sm4" "-target-feature" "+sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
157170
// CHECK-MCPU-A35: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto"
158171
// CHECK-MCPU-A53: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto"
159172
// CHECK-MCPU-A57: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto"
@@ -165,10 +178,10 @@
165178
// CHECK-MCPU-THUNDERX2T99: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto"
166179

167180
// RUN: %clang -target x86_64-apple-macosx -arch arm64 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-ARCH-ARM64 %s
168-
// CHECK-ARCH-ARM64: "-target-cpu" "cyclone" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crypto" "-target-feature" "+zcm" "-target-feature" "+zcz"
181+
// CHECK-ARCH-ARM64: "-target-cpu" "apple-a7" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crypto" "-target-feature" "+zcm" "-target-feature" "+zcz"
169182

170183
// RUN: %clang -target x86_64-apple-macosx -arch arm64_32 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-ARCH-ARM64_32 %s
171-
// CHECK-ARCH-ARM64_32: "-target-cpu" "cyclone" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crypto" "-target-feature" "+zcm" "-target-feature" "+zcz"
184+
// CHECK-ARCH-ARM64_32: "-target-cpu" "apple-s4" "-target-feature" "+v8.3a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+fullfp16" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+rcpc" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+sha2" "-target-feature" "+aes"
172185

173186
// RUN: %clang -target aarch64 -march=armv8-a+fp+simd+crc+crypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MARCH-1 %s
174187
// RUN: %clang -target aarch64 -march=armv8-a+nofp+nosimd+nocrc+nocrypto+fp+simd+crc+crypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MARCH-1 %s

‎llvm/include/llvm/Support/AArch64TargetParser.def

+18
Original file line numberDiff line numberDiff line change
@@ -120,6 +120,24 @@ AARCH64_CPU_NAME("neoverse-n1", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
120120
AArch64::AEK_SSBS))
121121
AARCH64_CPU_NAME("cyclone", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
122122
(AArch64::AEK_NONE))
123+
AARCH64_CPU_NAME("apple-a7", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
124+
(AArch64::AEK_NONE))
125+
AARCH64_CPU_NAME("apple-a8", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
126+
(AArch64::AEK_NONE))
127+
AARCH64_CPU_NAME("apple-a9", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
128+
(AArch64::AEK_NONE))
129+
AARCH64_CPU_NAME("apple-a10", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
130+
(AArch64::AEK_CRC | AArch64::AEK_RDM))
131+
AARCH64_CPU_NAME("apple-a11", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
132+
(AArch64::AEK_NONE))
133+
AARCH64_CPU_NAME("apple-a12", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false,
134+
(AArch64::AEK_FP16))
135+
AARCH64_CPU_NAME("apple-a13", ARMV8_4A, FK_CRYPTO_NEON_FP_ARMV8, false,
136+
(AArch64::AEK_FP16 | AArch64::AEK_FP16FML))
137+
AARCH64_CPU_NAME("apple-s4", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false,
138+
(AArch64::AEK_FP16))
139+
AARCH64_CPU_NAME("apple-s5", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false,
140+
(AArch64::AEK_FP16))
123141
AARCH64_CPU_NAME("exynos-m3", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
124142
(AArch64::AEK_CRC))
125143
AARCH64_CPU_NAME("exynos-m4", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,

‎llvm/lib/Target/AArch64/AArch64.td

+96-4
Original file line numberDiff line numberDiff line change
@@ -565,8 +565,8 @@ def ProcA76 : SubtargetFeature<"a76", "ARMProcFamily", "CortexA76",
565565

566566
// Note that cyclone does not fuse AES instructions, but newer apple chips do
567567
// perform the fusion and cyclone is used by default when targetting apple OSes.
568-
def ProcCyclone : SubtargetFeature<"cyclone", "ARMProcFamily", "Cyclone",
569-
"Cyclone", [
568+
def ProcAppleA7 : SubtargetFeature<"apple-a7", "ARMProcFamily", "AppleA7",
569+
"Apple A7 (the CPU formerly known as Cyclone)", [
570570
FeatureAlternateSExtLoadCVTF32Pattern,
571571
FeatureArithmeticBccFusion,
572572
FeatureArithmeticCbzFusion,
@@ -582,6 +582,83 @@ def ProcCyclone : SubtargetFeature<"cyclone", "ARMProcFamily", "Cyclone",
582582
FeatureZCZeroingFPWorkaround
583583
]>;
584584

585+
def ProcAppleA10 : SubtargetFeature<"apple-a10", "ARMProcFamily", "AppleA10",
586+
"Apple A10", [
587+
FeatureAlternateSExtLoadCVTF32Pattern,
588+
FeatureArithmeticBccFusion,
589+
FeatureArithmeticCbzFusion,
590+
FeatureCrypto,
591+
FeatureDisableLatencySchedHeuristic,
592+
FeatureFPARMv8,
593+
FeatureFuseAES,
594+
FeatureFuseCryptoEOR,
595+
FeatureNEON,
596+
FeaturePerfMon,
597+
FeatureZCRegMove,
598+
FeatureZCZeroing,
599+
FeatureCRC,
600+
FeatureRDM,
601+
FeaturePAN,
602+
FeatureLOR,
603+
FeatureVH,
604+
]>;
605+
606+
def ProcAppleA11 : SubtargetFeature<"apple-a11", "ARMProcFamily", "AppleA11",
607+
"Apple A11", [
608+
FeatureAlternateSExtLoadCVTF32Pattern,
609+
FeatureArithmeticBccFusion,
610+
FeatureArithmeticCbzFusion,
611+
FeatureCrypto,
612+
FeatureDisableLatencySchedHeuristic,
613+
FeatureFPARMv8,
614+
FeatureFuseAES,
615+
FeatureFuseCryptoEOR,
616+
FeatureNEON,
617+
FeaturePerfMon,
618+
FeatureZCRegMove,
619+
FeatureZCZeroing,
620+
FeatureFullFP16,
621+
HasV8_2aOps
622+
]>;
623+
624+
def ProcAppleA12 : SubtargetFeature<"apple-a12", "ARMProcFamily", "AppleA12",
625+
"Apple A12", [
626+
FeatureAlternateSExtLoadCVTF32Pattern,
627+
FeatureArithmeticBccFusion,
628+
FeatureArithmeticCbzFusion,
629+
FeatureCrypto,
630+
FeatureDisableLatencySchedHeuristic,
631+
FeatureFPARMv8,
632+
FeatureFuseAES,
633+
FeatureFuseCryptoEOR,
634+
FeatureNEON,
635+
FeaturePerfMon,
636+
FeatureZCRegMove,
637+
FeatureZCZeroing,
638+
FeatureFullFP16,
639+
HasV8_3aOps
640+
]>;
641+
642+
def ProcAppleA13 : SubtargetFeature<"apple-a13", "ARMProcFamily", "AppleA13",
643+
"Apple A13", [
644+
FeatureAlternateSExtLoadCVTF32Pattern,
645+
FeatureArithmeticBccFusion,
646+
FeatureArithmeticCbzFusion,
647+
FeatureCrypto,
648+
FeatureDisableLatencySchedHeuristic,
649+
FeatureFPARMv8,
650+
FeatureFuseAES,
651+
FeatureFuseCryptoEOR,
652+
FeatureNEON,
653+
FeaturePerfMon,
654+
FeatureZCRegMove,
655+
FeatureZCZeroing,
656+
FeatureFullFP16,
657+
FeatureFP16FML,
658+
FeatureSHA3,
659+
HasV8_4aOps
660+
]>;
661+
585662
def ProcExynosM3 : SubtargetFeature<"exynosm3", "ARMProcFamily", "ExynosM3",
586663
"Samsung Exynos-M3 processors",
587664
[FeatureCRC,
@@ -788,7 +865,6 @@ def : ProcessorModel<"cortex-a76", CortexA57Model, [ProcA76]>;
788865
def : ProcessorModel<"cortex-a76ae", CortexA57Model, [ProcA76]>;
789866
def : ProcessorModel<"neoverse-e1", CortexA53Model, [ProcNeoverseE1]>;
790867
def : ProcessorModel<"neoverse-n1", CortexA57Model, [ProcNeoverseN1]>;
791-
def : ProcessorModel<"cyclone", CycloneModel, [ProcCyclone]>;
792868
def : ProcessorModel<"exynos-m3", ExynosM3Model, [ProcExynosM3]>;
793869
def : ProcessorModel<"exynos-m4", ExynosM4Model, [ProcExynosM4]>;
794870
def : ProcessorModel<"exynos-m5", ExynosM5Model, [ProcExynosM4]>;
@@ -805,8 +881,24 @@ def : ProcessorModel<"thunderx2t99", ThunderX2T99Model, [ProcThunderX2T99]>;
805881
// FIXME: HiSilicon TSV110 is currently modeled as a Cortex-A57.
806882
def : ProcessorModel<"tsv110", CortexA57Model, [ProcTSV110]>;
807883

884+
// Support cyclone as an alias for apple-a7 so we can still LTO old bitcode.
885+
def : ProcessorModel<"cyclone", CycloneModel, [ProcAppleA7]>;
886+
887+
// iPhone and iPad CPUs
888+
def : ProcessorModel<"apple-a7", CycloneModel, [ProcAppleA7]>;
889+
def : ProcessorModel<"apple-a8", CycloneModel, [ProcAppleA7]>;
890+
def : ProcessorModel<"apple-a9", CycloneModel, [ProcAppleA7]>;
891+
def : ProcessorModel<"apple-a10", CycloneModel, [ProcAppleA10]>;
892+
def : ProcessorModel<"apple-a11", CycloneModel, [ProcAppleA11]>;
893+
def : ProcessorModel<"apple-a12", CycloneModel, [ProcAppleA12]>;
894+
def : ProcessorModel<"apple-a13", CycloneModel, [ProcAppleA13]>;
895+
896+
// watch CPUs.
897+
def : ProcessorModel<"apple-s4", CycloneModel, [ProcAppleA12]>;
898+
def : ProcessorModel<"apple-s5", CycloneModel, [ProcAppleA12]>;
899+
808900
// Alias for the latest Apple processor model supported by LLVM.
809-
def : ProcessorModel<"apple-latest", CycloneModel, [ProcCyclone]>;
901+
def : ProcessorModel<"apple-latest", CycloneModel, [ProcAppleA13]>;
810902

811903
//===----------------------------------------------------------------------===//
812904
// Assembly parser

‎llvm/lib/Target/AArch64/AArch64Subtarget.cpp

+5-1
Original file line numberDiff line numberDiff line change
@@ -88,7 +88,11 @@ void AArch64Subtarget::initializeProperties() {
8888
case CortexA76:
8989
PrefFunctionLogAlignment = 4;
9090
break;
91-
case Cyclone:
91+
case AppleA7:
92+
case AppleA10:
93+
case AppleA11:
94+
case AppleA12:
95+
case AppleA13:
9296
CacheLineSize = 64;
9397
PrefetchDistance = 280;
9498
MinPrefetchStride = 2048;

‎llvm/lib/Target/AArch64/AArch64Subtarget.h

+5-1
Original file line numberDiff line numberDiff line change
@@ -38,6 +38,11 @@ class AArch64Subtarget final : public AArch64GenSubtargetInfo {
3838
public:
3939
enum ARMProcFamilyEnum : uint8_t {
4040
Others,
41+
AppleA7,
42+
AppleA10,
43+
AppleA11,
44+
AppleA12,
45+
AppleA13,
4146
CortexA35,
4247
CortexA53,
4348
CortexA55,
@@ -47,7 +52,6 @@ class AArch64Subtarget final : public AArch64GenSubtargetInfo {
4752
CortexA73,
4853
CortexA75,
4954
CortexA76,
50-
Cyclone,
5155
ExynosM3,
5256
Falkor,
5357
Kryo,

‎llvm/lib/Target/AArch64/AArch64SystemOperands.td

+1-1
Original file line numberDiff line numberDiff line change
@@ -1492,5 +1492,5 @@ def : ROSysReg<"TRBIDR_EL1", 0b11, 0b000, 0b1001, 0b1011, 0b111>;
14921492

14931493
// Cyclone specific system registers
14941494
// Op0 Op1 CRn CRm Op2
1495-
let Requires = [{ {AArch64::ProcCyclone} }] in
1495+
let Requires = [{ {AArch64::ProcAppleA7} }] in
14961496
def : RWSysReg<"CPM_IOACC_CTL_EL3", 0b11, 0b111, 0b1111, 0b0010, 0b000>;

‎llvm/test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll

+1
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@
44
; RUN: llc < %s -mtriple=aarch64-linux-gnu -mattr=+zcz-gp | FileCheck %s -check-prefixes=ALL,ZEROGP,NONEFP
55
; RUN: llc < %s -mtriple=aarch64-linux-gnu -mattr=+zcz-fp | FileCheck %s -check-prefixes=ALL,NONEGP,ZEROFP
66
; RUN: llc < %s -mtriple=arm64-apple-ios -mcpu=cyclone | FileCheck %s -check-prefixes=ALL,ZEROGP,NONEFP
7+
; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=apple-a10 | FileCheck %s -check-prefixes=ALL,ZEROGP,ZEROFP
78
; RUN: llc < %s -mtriple=arm64-apple-ios -mcpu=cyclone -mattr=+fullfp16 | FileCheck %s -check-prefixes=ALL,ZEROGP,NONE16
89
; RUN: llc < %s -mtriple=aarch64-linux-gnu -mcpu=exynos-m3 | FileCheck %s -check-prefixes=ALL,NONEGP,ZEROFP
910
; RUN: llc < %s -mtriple=aarch64-linux-gnu -mcpu=kryo | FileCheck %s -check-prefixes=ALL,ZEROGP,ZEROFP

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