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FastISel: Fix incorrectly using getPointerTy (llvm#110465)
This was using the default address space instead of the correct one. Fixes llvm#56055
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4 files changed

+89
-6
lines changed

4 files changed

+89
-6
lines changed

llvm/include/llvm/CodeGen/FastISel.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -275,7 +275,7 @@ class FastISel {
275275

276276
/// This is a wrapper around getRegForValue that also takes care of
277277
/// truncating or sign-extending the given getelementptr index value.
278-
Register getRegForGEPIndex(const Value *Idx);
278+
Register getRegForGEPIndex(MVT PtrVT, const Value *Idx);
279279

280280
/// We're checking to see if we can fold \p LI into \p FoldInst. Note
281281
/// that we could have a sequence where multiple LLVM IR instructions are

llvm/lib/CodeGen/SelectionDAG/FastISel.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -381,14 +381,13 @@ void FastISel::updateValueMap(const Value *I, Register Reg, unsigned NumRegs) {
381381
}
382382
}
383383

384-
Register FastISel::getRegForGEPIndex(const Value *Idx) {
384+
Register FastISel::getRegForGEPIndex(MVT PtrVT, const Value *Idx) {
385385
Register IdxN = getRegForValue(Idx);
386386
if (!IdxN)
387387
// Unhandled operand. Halt "fast" selection and bail.
388388
return Register();
389389

390390
// If the index is smaller or larger than intptr_t, truncate or extend it.
391-
MVT PtrVT = TLI.getPointerTy(DL);
392391
EVT IdxVT = EVT::getEVT(Idx->getType(), /*HandleUnknown=*/false);
393392
if (IdxVT.bitsLT(PtrVT)) {
394393
IdxN = fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::SIGN_EXTEND, IdxN);
@@ -544,7 +543,8 @@ bool FastISel::selectGetElementPtr(const User *I) {
544543
uint64_t TotalOffs = 0;
545544
// FIXME: What's a good SWAG number for MaxOffs?
546545
uint64_t MaxOffs = 2048;
547-
MVT VT = TLI.getPointerTy(DL);
546+
MVT VT = TLI.getValueType(DL, I->getType()).getSimpleVT();
547+
548548
for (gep_type_iterator GTI = gep_type_begin(I), E = gep_type_end(I);
549549
GTI != E; ++GTI) {
550550
const Value *Idx = GTI.getOperand();
@@ -585,7 +585,7 @@ bool FastISel::selectGetElementPtr(const User *I) {
585585

586586
// N = N + Idx * ElementSize;
587587
uint64_t ElementSize = GTI.getSequentialElementStride(DL);
588-
Register IdxN = getRegForGEPIndex(Idx);
588+
Register IdxN = getRegForGEPIndex(VT, Idx);
589589
if (!IdxN) // Unhandled operand. Halt "fast" selection and bail.
590590
return false;
591591

llvm/lib/Target/X86/X86FastISel.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -902,6 +902,8 @@ bool X86FastISel::X86SelectAddress(const Value *V, X86AddressMode &AM) {
902902
uint64_t Disp = (int32_t)AM.Disp;
903903
unsigned IndexReg = AM.IndexReg;
904904
unsigned Scale = AM.Scale;
905+
MVT PtrVT = TLI.getValueType(DL, U->getType()).getSimpleVT();
906+
905907
gep_type_iterator GTI = gep_type_begin(U);
906908
// Iterate through the indices, folding what we can. Constants can be
907909
// folded, and one dynamic index can be handled, if the scale is supported.
@@ -937,7 +939,7 @@ bool X86FastISel::X86SelectAddress(const Value *V, X86AddressMode &AM) {
937939
(S == 1 || S == 2 || S == 4 || S == 8)) {
938940
// Scaled-index addressing.
939941
Scale = S;
940-
IndexReg = getRegForGEPIndex(Op);
942+
IndexReg = getRegForGEPIndex(PtrVT, Op);
941943
if (IndexReg == 0)
942944
return false;
943945
break;

llvm/test/CodeGen/X86/issue56055.ll

Lines changed: 81 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,81 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2+
; RUN: llc -fast-isel < %s | FileCheck -check-prefixes=CHECK,FASTISEL %s
3+
; RUN: llc < %s | FileCheck -check-prefixes=CHECK,SDAG %s
4+
5+
target datalayout = "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
6+
target triple = "x86_64-unknown-windows-msvc"
7+
8+
define void @issue56055(ptr addrspace(270) %ptr, ptr %out) {
9+
; CHECK-LABEL: issue56055:
10+
; CHECK: # %bb.0:
11+
; CHECK-NEXT: addl $2, %ecx
12+
; CHECK-NEXT: movl %ecx, (%rdx)
13+
; CHECK-NEXT: retq
14+
%add.ptr = getelementptr inbounds i8, ptr addrspace(270) %ptr, i32 2
15+
store ptr addrspace(270) %add.ptr, ptr %out
16+
ret void
17+
}
18+
19+
define void @issue56055_vector(<2 x ptr addrspace(270)> %ptr, ptr %out) {
20+
; CHECK-LABEL: issue56055_vector:
21+
; CHECK: # %bb.0:
22+
; CHECK-NEXT: movdqa (%rcx), %xmm0
23+
; CHECK-NEXT: paddd __xmm@00000000000000000000000200000002(%rip), %xmm0
24+
; CHECK-NEXT: movq %xmm0, (%rdx)
25+
; CHECK-NEXT: retq
26+
%add.ptr = getelementptr inbounds i8, <2 x ptr addrspace(270)> %ptr, <2 x i32> <i32 2, i32 2>
27+
store <2 x ptr addrspace(270)> %add.ptr, ptr %out
28+
ret void
29+
}
30+
31+
define void @issue56055_small_idx(ptr addrspace(270) %ptr, ptr %out, i16 %idx) {
32+
; CHECK-LABEL: issue56055_small_idx:
33+
; CHECK: # %bb.0:
34+
; CHECK-NEXT: movswl %r8w, %eax
35+
; CHECK-NEXT: addl %ecx, %eax
36+
; CHECK-NEXT: movl %eax, (%rdx)
37+
; CHECK-NEXT: retq
38+
%add.ptr = getelementptr inbounds i8, ptr addrspace(270) %ptr, i16 %idx
39+
store ptr addrspace(270) %add.ptr, ptr %out
40+
ret void
41+
}
42+
43+
define void @issue56055_small_idx_vector(<2 x ptr addrspace(270)> %ptr, ptr %out, <2 x i16> %idx) {
44+
; CHECK-LABEL: issue56055_small_idx_vector:
45+
; CHECK: # %bb.0:
46+
; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = mem[0,0,2,1,4,5,6,7]
47+
; CHECK-NEXT: psrad $16, %xmm0
48+
; CHECK-NEXT: paddd (%rcx), %xmm0
49+
; CHECK-NEXT: movq %xmm0, (%rdx)
50+
; CHECK-NEXT: retq
51+
%add.ptr = getelementptr inbounds i8, <2 x ptr addrspace(270)> %ptr, <2 x i16> %idx
52+
store <2 x ptr addrspace(270)> %add.ptr, ptr %out
53+
ret void
54+
}
55+
56+
define void @issue56055_large_idx(ptr addrspace(270) %ptr, ptr %out, i64 %idx) {
57+
; CHECK-LABEL: issue56055_large_idx:
58+
; CHECK: # %bb.0:
59+
; CHECK-NEXT: addl %ecx, %r8d
60+
; CHECK-NEXT: movl %r8d, (%rdx)
61+
; CHECK-NEXT: retq
62+
%add.ptr = getelementptr inbounds i8, ptr addrspace(270) %ptr, i64 %idx
63+
store ptr addrspace(270) %add.ptr, ptr %out
64+
ret void
65+
}
66+
67+
define void @issue56055_large_idx_vector(<2 x ptr addrspace(270)> %ptr, ptr %out, <2 x i64> %idx) {
68+
; CHECK-LABEL: issue56055_large_idx_vector:
69+
; CHECK: # %bb.0:
70+
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = mem[0,2,2,3]
71+
; CHECK-NEXT: paddd (%rcx), %xmm0
72+
; CHECK-NEXT: movq %xmm0, (%rdx)
73+
; CHECK-NEXT: retq
74+
%add.ptr = getelementptr inbounds i8, <2 x ptr addrspace(270)> %ptr, <2 x i64> %idx
75+
store <2 x ptr addrspace(270)> %add.ptr, ptr %out
76+
ret void
77+
}
78+
79+
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
80+
; FASTISEL: {{.*}}
81+
; SDAG: {{.*}}

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