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[AArch64] Precommit tests for PR71917
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llvm/test/CodeGen/AArch64/arm64-addrmode.ll

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@@ -209,3 +209,90 @@ define void @t17(i64 %a) {
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%3 = load volatile i64, ptr %2, align 8
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ret void
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}
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define i32 @LdOffset_i8(ptr %a) {
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; CHECK-LABEL: LdOffset_i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #56952 // =0xde78
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; CHECK-NEXT: movk w8, #15, lsl #16
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; CHECK-NEXT: ldrb w0, [x0, x8]
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; CHECK-NEXT: ret
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%arrayidx = getelementptr inbounds i8, ptr %a, i64 1039992
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%val = load i8, ptr %arrayidx, align 1
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%conv = zext i8 %val to i32
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ret i32 %conv
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}
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define i32 @LdOffset_i16(ptr %a) {
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; CHECK-LABEL: LdOffset_i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #48368 // =0xbcf0
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; CHECK-NEXT: movk w8, #31, lsl #16
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; CHECK-NEXT: ldrsh w0, [x0, x8]
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; CHECK-NEXT: ret
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%arrayidx = getelementptr inbounds i16, ptr %a, i64 1039992
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%val = load i16, ptr %arrayidx, align 2
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%conv = sext i16 %val to i32
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ret i32 %conv
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}
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define i32 @LdOffset_i32(ptr %a) {
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; CHECK-LABEL: LdOffset_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #31200 // =0x79e0
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; CHECK-NEXT: movk w8, #63, lsl #16
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; CHECK-NEXT: ldr w0, [x0, x8]
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; CHECK-NEXT: ret
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%arrayidx = getelementptr inbounds i32, ptr %a, i64 1039992
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%val = load i32, ptr %arrayidx, align 4
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ret i32 %val
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}
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define i64 @LdOffset_i64_multi_offset(ptr %a) {
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; CHECK-LABEL: LdOffset_i64_multi_offset:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add x8, x0, #2031, lsl #12 // =8318976
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; CHECK-NEXT: add x8, x8, #960
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; CHECK-NEXT: ldr x9, [x8]
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; CHECK-NEXT: ldr x8, [x8, #2056]
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; CHECK-NEXT: add x0, x8, x9
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; CHECK-NEXT: ret
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%arrayidx = getelementptr inbounds i64, ptr %a, i64 1039992
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%val0 = load i64, ptr %arrayidx, align 8
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%arrayidx1 = getelementptr inbounds i64, ptr %a, i64 1040249
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%val1 = load i64, ptr %arrayidx1, align 8
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%add = add nsw i64 %val1, %val0
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ret i64 %add
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}
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define i64 @LdOffset_i64_multi_offset_with_commmon_base(ptr %a) {
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; CHECK-LABEL: LdOffset_i64_multi_offset_with_commmon_base:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add x8, x0, #507, lsl #12 // =2076672
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; CHECK-NEXT: ldr x9, [x8, #26464]
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; CHECK-NEXT: ldr x8, [x8, #26496]
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; CHECK-NEXT: add x0, x8, x9
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; CHECK-NEXT: ret
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%b = getelementptr inbounds i16, ptr %a, i64 1038336
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%arrayidx = getelementptr inbounds i64, ptr %b, i64 3308
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%val0 = load i64, ptr %arrayidx, align 8
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%arrayidx1 = getelementptr inbounds i64, ptr %b, i64 3312
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%val1 = load i64, ptr %arrayidx1, align 8
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%add = add nsw i64 %val1, %val0
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ret i64 %add
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}
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; Negative test: the offset is odd
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define i32 @LdOffset_i16_odd_offset(ptr nocapture noundef readonly %a) {
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; CHECK-LABEL: LdOffset_i16_odd_offset:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #56953 // =0xde79
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; CHECK-NEXT: movk w8, #15, lsl #16
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; CHECK-NEXT: ldrsh w0, [x0, x8]
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; CHECK-NEXT: ret
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%arrayidx = getelementptr inbounds i8, ptr %a, i64 1039993
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%val = load i16, ptr %arrayidx, align 2
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%conv = sext i16 %val to i32
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ret i32 %conv
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}
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