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[flang] update PPC vector tests (NFC) (llvm#126256)
Replace 'undef' with 'poison' based on commit f4e3b87
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4 files changed

+104
-104
lines changed

4 files changed

+104
-104
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flang/test/Lower/PowerPC/ppc-vec-load-elem-order.f90

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -719,8 +719,8 @@ subroutine vec_xlds_testi64a(arg1, arg2, res)
719719
! LLVMIR: %[[arg1:.*]] = load i64, ptr %0, align 8
720720
! LLVMIR: %[[addr:.*]] = getelementptr i8, ptr %1, i64 %[[arg1]]
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! LLVMIR: %[[ld:.*]] = load i64, ptr %[[addr]], align 8
722-
! LLVMIR: %[[insrt:.*]] = insertelement <2 x i64> undef, i64 %[[ld]], i32 0
723-
! LLVMIR: %[[shflv:.*]] = shufflevector <2 x i64> %[[insrt]], <2 x i64> undef, <2 x i32> zeroinitializer
722+
! LLVMIR: %[[insrt:.*]] = insertelement <2 x i64> poison, i64 %[[ld]], i32 0
723+
! LLVMIR: %[[shflv:.*]] = shufflevector <2 x i64> %[[insrt]], <2 x i64> poison, <2 x i32> zeroinitializer
724724
! LLVMIR: store <2 x i64> %[[shflv]], ptr %2, align 16
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end subroutine vec_xlds_testi64a
726726

@@ -734,8 +734,8 @@ subroutine vec_xlds_testf64a(arg1, arg2, res)
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! LLVMIR: %[[arg1:.*]] = load i64, ptr %0, align 8
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! LLVMIR: %[[addr:.*]] = getelementptr i8, ptr %1, i64 %[[arg1]]
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! LLVMIR: %[[ld:.*]] = load i64, ptr %[[addr]], align 8
737-
! LLVMIR: %[[insrt:.*]] = insertelement <2 x i64> undef, i64 %[[ld]], i32 0
738-
! LLVMIR: %[[shflv:.*]] = shufflevector <2 x i64> %[[insrt]], <2 x i64> undef, <2 x i32> zeroinitializer
737+
! LLVMIR: %[[insrt:.*]] = insertelement <2 x i64> poison, i64 %[[ld]], i32 0
738+
! LLVMIR: %[[shflv:.*]] = shufflevector <2 x i64> %[[insrt]], <2 x i64> poison, <2 x i32> zeroinitializer
739739
! LLVMIR: %[[bc:.*]] = bitcast <2 x i64> %[[shflv]] to <2 x double>
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! LLVMIR: store <2 x double> %[[bc]], ptr %2, align 16
741741
end subroutine vec_xlds_testf64a

flang/test/Lower/PowerPC/ppc-vec-load.f90

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -683,8 +683,8 @@ subroutine vec_xlds_testi64a(arg1, arg2, res)
683683
! LLVMIR: %[[arg1:.*]] = load i64, ptr %0, align 8
684684
! LLVMIR: %[[addr:.*]] = getelementptr i8, ptr %1, i64 %[[arg1]]
685685
! LLVMIR: %[[ld:.*]] = load i64, ptr %[[addr]], align 8
686-
! LLVMIR: %[[insrt:.*]] = insertelement <2 x i64> undef, i64 %[[ld]], i32 0
687-
! LLVMIR: %[[shfl:.*]] = shufflevector <2 x i64> %[[insrt]], <2 x i64> undef, <2 x i32> zeroinitializer
686+
! LLVMIR: %[[insrt:.*]] = insertelement <2 x i64> poison, i64 %[[ld]], i32 0
687+
! LLVMIR: %[[shfl:.*]] = shufflevector <2 x i64> %[[insrt]], <2 x i64> poison, <2 x i32> zeroinitializer
688688
! LLVMIR: store <2 x i64> %[[shfl]], ptr %2, align 16
689689
end subroutine vec_xlds_testi64a
690690

@@ -698,8 +698,8 @@ subroutine vec_xlds_testf64a(arg1, arg2, res)
698698
! LLVMIR: %[[arg1:.*]] = load i64, ptr %0, align 8
699699
! LLVMIR: %[[addr:.*]] = getelementptr i8, ptr %1, i64 %[[arg1]]
700700
! LLVMIR: %[[ld:.*]] = load i64, ptr %[[addr]], align 8
701-
! LLVMIR: %[[insrt:.*]] = insertelement <2 x i64> undef, i64 %[[ld]], i32 0
702-
! LLVMIR: %[[shfl:.*]] = shufflevector <2 x i64> %[[insrt]], <2 x i64> undef, <2 x i32> zeroinitializer
701+
! LLVMIR: %[[insrt:.*]] = insertelement <2 x i64> poison, i64 %[[ld]], i32 0
702+
! LLVMIR: %[[shfl:.*]] = shufflevector <2 x i64> %[[insrt]], <2 x i64> poison, <2 x i32> zeroinitializer
703703
! LLVMIR: %[[bc:.*]] = bitcast <2 x i64> %[[shfl]] to <2 x double>
704704
! LLVMIR: store <2 x double> %[[bc]], ptr %2, align 16
705705
end subroutine vec_xlds_testf64a

flang/test/Lower/PowerPC/ppc-vec-splat-elem-order.f90

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -8,8 +8,8 @@ subroutine vec_splat_testf32i64(x)
88

99
! LLVMIR: %[[x:.*]] = load <4 x float>, ptr %{{[0-9]}}, align 16
1010
! LLVMIR: %[[ele:.*]] = extractelement <4 x float> %[[x]], i64 3
11-
! LLVMIR: %[[ins:.*]] = insertelement <4 x float> undef, float %[[ele]], i32 0
12-
! LLVMIR: %[[y:.*]] = shufflevector <4 x float> %[[ins]], <4 x float> undef, <4 x i32> zeroinitializer
11+
! LLVMIR: %[[ins:.*]] = insertelement <4 x float> poison, float %[[ele]], i32 0
12+
! LLVMIR: %[[y:.*]] = shufflevector <4 x float> %[[ins]], <4 x float> poison, <4 x i32> zeroinitializer
1313
! LLVMIR: store <4 x float> %[[y]], ptr %{{[0-9]}}, align 16
1414
end subroutine vec_splat_testf32i64
1515

@@ -20,7 +20,7 @@ subroutine vec_splat_testu8i16(x)
2020

2121
! LLVMIR: %[[x:.*]] = load <16 x i8>, ptr %{{[0-9]}}, align 16
2222
! LLVMIR: %[[ele:.*]] = extractelement <16 x i8> %[[x]], i16 15
23-
! LLVMIR: %[[ins:.*]] = insertelement <16 x i8> undef, i8 %[[ele]], i32 0
24-
! LLVMIR: %[[y:.*]] = shufflevector <16 x i8> %[[ins]], <16 x i8> undef, <16 x i32> zeroinitializer
23+
! LLVMIR: %[[ins:.*]] = insertelement <16 x i8> poison, i8 %[[ele]], i32 0
24+
! LLVMIR: %[[y:.*]] = shufflevector <16 x i8> %[[ins]], <16 x i8> poison, <16 x i32> zeroinitializer
2525
! LLVMIR: store <16 x i8> %[[y]], ptr %{{[0-9]}}, align 16
2626
end subroutine vec_splat_testu8i16

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