Skip to content

Commit 0863e94

Browse files
tambrysdesmalen-arm
tambry
authored and
sdesmalen-arm
committed
[AArch64] Add NVIDIA Carmel support
Summary: NVIDIA's Carmel ARM64 cores are used in Tegra194 chips found in Jetson AGX Xavier, DRIVE AGX Xavier and DRIVE AGX Pegasus. References: * https://devblogs.nvidia.com/nvidia-jetson-agx-xavier-32-teraops-ai-robotics/#h.huq9xtg75a5e * NVIDIA Xavier Series System-on-Chip Technical Reference Manual 1.3 (https://developer.nvidia.com/embedded/downloads#?search=Xavier%20Series%20SoC%20Technical%20Reference%20Manual) Reviewers: sdesmalen, paquette Reviewed By: sdesmalen Subscribers: llvm-commits, ianshmean, kristof.beyls, hiraditya, jfb, danielkiss, cfe-commits, t.p.northover Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D77940
1 parent f5360d4 commit 0863e94

File tree

10 files changed

+70
-1
lines changed

10 files changed

+70
-1
lines changed

‎clang/test/Driver/aarch64-cpus.c

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -283,6 +283,20 @@
283283
// ARM64-A64FX: "-cc1"{{.*}} "-triple" "arm64{{.*}}" "-target-cpu" "a64fx"
284284
// ARM64-A64FX-TUNE: "-cc1"{{.*}} "-triple" "arm64{{.*}}" "-target-cpu" "generic"
285285

286+
// RUN: %clang -target aarch64 -mcpu=carmel -### -c %s 2>&1 | FileCheck -check-prefix=CARMEL %s
287+
// RUN: %clang -target aarch64 -mlittle-endian -mcpu=carmel -### -c %s 2>&1 | FileCheck -check-prefix=CARMEL %s
288+
// RUN: %clang -target aarch64 -mtune=carmel -### -c %s 2>&1 | FileCheck -check-prefix=CARMEL-TUNE %s
289+
// RUN: %clang -target aarch64 -mlittle-endian -mtune=carmel -### -c %s 2>&1 | FileCheck -check-prefix=CARMEL-TUNE %s
290+
// CARMEL: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "carmel"
291+
// CARMEL-TUNE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic"
292+
293+
// RUN: %clang -target arm64 -mcpu=carmel -### -c %s 2>&1 | FileCheck -check-prefix=ARM64-CARMEL %s
294+
// RUN: %clang -target arm64 -mlittle-endian -mcpu=carmel -### -c %s 2>&1 | FileCheck -check-prefix=ARM64-CARMEL %s
295+
// RUN: %clang -target arm64 -mtune=carmel -### -c %s 2>&1 | FileCheck -check-prefix=ARM64-CARMEL-TUNE %s
296+
// RUN: %clang -target arm64 -mlittle-endian -mtune=carmel -### -c %s 2>&1 | FileCheck -check-prefix=ARM64-CARMEL-TUNE %s
297+
// ARM64-CARMEL: "-cc1"{{.*}} "-triple" "arm64{{.*}}" "-target-cpu" "carmel"
298+
// ARM64-CARMEL-TUNE: "-cc1"{{.*}} "-triple" "arm64{{.*}}" "-target-cpu" "generic"
299+
286300
// RUN: %clang -target aarch64_be -### -c %s 2>&1 | FileCheck -check-prefix=GENERIC-BE %s
287301
// RUN: %clang -target aarch64 -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=GENERIC-BE %s
288302
// RUN: %clang -target aarch64_be -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=GENERIC-BE %s

‎clang/test/Preprocessor/aarch64-target-features.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -163,6 +163,7 @@
163163
// RUN: %clang -target aarch64 -mcpu=kryo -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-KRYO %s
164164
// RUN: %clang -target aarch64 -mcpu=thunderx2t99 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-THUNDERX2T99 %s
165165
// RUN: %clang -target aarch64 -mcpu=a64fx -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-A64FX %s
166+
// RUN: %clang -target aarch64 -mcpu=carmel -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-CARMEL %s
166167
// CHECK-MCPU-APPLE-A7: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crypto" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+sha2" "-target-feature" "+aes"
167168
// CHECK-MCPU-APPLE-A10: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+rdm" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+sha2" "-target-feature" "+aes"
168169
// CHECK-MCPU-APPLE-A11: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.2a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+sha2" "-target-feature" "+aes"
@@ -179,6 +180,7 @@
179180
// CHECK-MCPU-KRYO: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto"
180181
// CHECK-MCPU-THUNDERX2T99: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto"
181182
// CHECK-MCPU-A64FX: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.2a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+fullfp16" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+sve" "-target-feature" "+sha2"
183+
// CHECK-MCPU-CARMEL: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.2a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+fullfp16" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+sha2" "-target-feature" "+aes"
182184

183185
// RUN: %clang -target x86_64-apple-macosx -arch arm64 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-ARCH-ARM64 %s
184186
// CHECK-ARCH-ARM64: "-target-cpu" "apple-a7" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crypto" "-target-feature" "+zcm" "-target-feature" "+zcz"

‎llvm/include/llvm/Support/AArch64TargetParser.def

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -179,6 +179,8 @@ AARCH64_CPU_NAME("tsv110", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
179179
AArch64::AEK_PROFILE))
180180
AARCH64_CPU_NAME("a64fx", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
181181
(AArch64::AEK_FP16 | AArch64::AEK_SVE))
182+
AARCH64_CPU_NAME("carmel", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
183+
AArch64::AEK_FP16)
182184
// Invalid CPU
183185
AARCH64_CPU_NAME("invalid", INVALID, FK_INVALID, true, AArch64::AEK_INVALID)
184186
#undef AARCH64_CPU_NAME

‎llvm/lib/Support/Host.cpp

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -231,6 +231,16 @@ StringRef sys::detail::getHostCPUNameForARM(StringRef ProcCpuinfoContent) {
231231
}
232232
}
233233

234+
if (Implementer == "0x4e") { // NVIDIA Corporation
235+
for (unsigned I = 0, E = Lines.size(); I != E; ++I) {
236+
if (Lines[I].startswith("CPU part")) {
237+
return StringSwitch<const char *>(Lines[I].substr(8).ltrim("\t :"))
238+
.Case("0x004", "carmel")
239+
.Default("generic");
240+
}
241+
}
242+
}
243+
234244
if (Implementer == "0x48") // HiSilicon Technologies, Inc.
235245
// Look for the CPU part line.
236246
for (unsigned I = 0, E = Lines.size(); I != E; ++I)

‎llvm/lib/Target/AArch64/AArch64.td

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -605,6 +605,14 @@ def ProcA64FX : SubtargetFeature<"a64fx", "ARMProcFamily", "A64FX",
605605
FeatureComplxNum
606606
]>;
607607

608+
def ProcCarmel : SubtargetFeature<"carmel", "ARMProcFamily", "Carmel",
609+
"Nvidia Carmel processors", [
610+
HasV8_2aOps,
611+
FeatureNEON,
612+
FeatureCrypto,
613+
FeatureFullFP16
614+
]>;
615+
608616
// Note that cyclone does not fuse AES instructions, but newer apple chips do
609617
// perform the fusion and cyclone is used by default when targetting apple OSes.
610618
def ProcAppleA7 : SubtargetFeature<"apple-a7", "ARMProcFamily", "AppleA7",
@@ -947,6 +955,9 @@ def : ProcessorModel<"apple-latest", CycloneModel, [ProcAppleA13]>;
947955
// FIXME: Scheduling model is not implemented yet.
948956
def : ProcessorModel<"a64fx", NoSchedModel, [ProcA64FX]>;
949957

958+
// Nvidia Carmel
959+
def : ProcessorModel<"carmel", NoSchedModel, [ProcCarmel]>;
960+
950961
//===----------------------------------------------------------------------===//
951962
// Assembly parser
952963
//===----------------------------------------------------------------------===//

‎llvm/lib/Target/AArch64/AArch64Subtarget.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -68,6 +68,9 @@ void AArch64Subtarget::initializeProperties() {
6868
switch (ARMProcFamily) {
6969
case Others:
7070
break;
71+
case Carmel:
72+
CacheLineSize = 64;
73+
break;
7174
case CortexA35:
7275
break;
7376
case CortexA53:

‎llvm/lib/Target/AArch64/AArch64Subtarget.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -45,6 +45,7 @@ class AArch64Subtarget final : public AArch64GenSubtargetInfo {
4545
AppleA11,
4646
AppleA12,
4747
AppleA13,
48+
Carmel,
4849
CortexA35,
4950
CortexA53,
5051
CortexA55,

‎llvm/test/CodeGen/AArch64/cpus.ll

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,7 @@
22

33

44
; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=generic 2>&1 | FileCheck %s
5+
; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=carmel 2>&1 | FileCheck %s
56
; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a35 2>&1 | FileCheck %s
67
; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a34 2>&1 | FileCheck %s
78
; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a53 2>&1 | FileCheck %s

‎llvm/unittests/Support/Host.cpp

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -262,6 +262,21 @@ CPU part : 0x001
262262
)";
263263

264264
EXPECT_EQ(sys::detail::getHostCPUNameForARM(A64FXProcCpuInfo), "a64fx");
265+
266+
// Verify Nvidia Carmel.
267+
const std::string CarmelProcCpuInfo = R"(
268+
processor : 0
269+
model name : ARMv8 Processor rev 0 (v8l)
270+
BogoMIPS : 62.50
271+
Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm dcpop
272+
CPU implementer : 0x4e
273+
CPU architecture: 8
274+
CPU variant : 0x0
275+
CPU part : 0x004
276+
CPU revision : 0
277+
)";
278+
279+
EXPECT_EQ(sys::detail::getHostCPUNameForARM(CarmelProcCpuInfo), "carmel");
265280
}
266281

267282
#if defined(__APPLE__) || defined(_AIX)

‎llvm/unittests/Support/TargetParserTest.cpp

Lines changed: 11 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -975,9 +975,15 @@ TEST(TargetParserTest, testAArch64CPU) {
975975
AArch64::AEK_SIMD | AArch64::AEK_FP16 | AArch64::AEK_RAS |
976976
AArch64::AEK_LSE | AArch64::AEK_SVE | AArch64::AEK_RDM,
977977
"8.2-A"));
978+
EXPECT_TRUE(testAArch64CPU(
979+
"carmel", "armv8.2-a", "crypto-neon-fp-armv8",
980+
AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
981+
AArch64::AEK_SIMD | AArch64::AEK_FP16 | AArch64::AEK_RAS |
982+
AArch64::AEK_LSE | AArch64::AEK_RDM,
983+
"8.2-A"));
978984
}
979985

980-
static constexpr unsigned NumAArch64CPUArchs = 37;
986+
static constexpr unsigned NumAArch64CPUArchs = 38;
981987

982988
TEST(TargetParserTest, testAArch64CPUArchList) {
983989
SmallVector<StringRef, NumAArch64CPUArchs> List;
@@ -1126,6 +1132,10 @@ TEST(TargetParserTest, testAArch64Extension) {
11261132
AArch64::ArchKind::INVALID, "sve"));
11271133
EXPECT_FALSE(testAArch64Extension("a64fx",
11281134
AArch64::ArchKind::INVALID, "sve2"));
1135+
EXPECT_TRUE(
1136+
testAArch64Extension("carmel", AArch64::ArchKind::INVALID, "crypto"));
1137+
EXPECT_TRUE(
1138+
testAArch64Extension("carmel", AArch64::ArchKind::INVALID, "fp16"));
11291139

11301140
EXPECT_FALSE(testAArch64Extension(
11311141
"generic", AArch64::ArchKind::ARMV8A, "ras"));

0 commit comments

Comments
 (0)