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MCUdudefpistm
MCUdude
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fpistm
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Add support for F103Tx chips
This adds support for F103T4, T6, T8 and TB
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‎README.md

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@@ -119,6 +119,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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| :green_heart: | [BlackPill F103C(8-B)](https://stm32-base.org/boards/STM32F103C8T6-Black-Pill) | *1.5.0* | |
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| :yellow_heart: | Generic F103C(4-6-8-B) | **1.9.0** | |
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| :yellow_heart: | [Generic F103R(6-8-B-C-D-E-F-G)](https://stm32-base.org/boards/STM32F103RET6-Generic-Board) | **1.9.0** | |
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| :yellow_heart: | Generic F103T(4-6-8-B) | **1.9.0** | |
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| :yellow_heart: | Generic F103V(8-B-C-D-E-F-G) | **1.9.0** | |
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| :yellow_heart: | Generic F103Z(C-D-E-F-G) | **1.9.0** | |
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| :green_heart: | HY-TinySTM103T | *1.5.0* | |

‎boards.txt

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@@ -966,6 +966,35 @@ GenF1.menu.pnum.Generic_F103RG.build.board=GENERIC_F103RG
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GenF1.menu.pnum.Generic_F103RG.build.product_line=STM32F103xG
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GenF1.menu.pnum.Generic_F103RG.build.variant=Generic_F103Rx
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# Generic STM32F103Tx boards
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GenF1.menu.pnum.Generic_F103T4=Generic F103T4
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GenF1.menu.pnum.Generic_F103T4.upload.maximum_size=16384
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GenF1.menu.pnum.Generic_F103T4.upload.maximum_data_size=6144
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GenF1.menu.pnum.Generic_F103T4.build.board=GENERIC_F103T4
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GenF1.menu.pnum.Generic_F103T4.build.product_line=STM32F103x6
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GenF1.menu.pnum.Generic_F103T4.build.variant=Generic_F103Tx
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GenF1.menu.pnum.Generic_F103T6=Generic F103T6
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GenF1.menu.pnum.Generic_F103T6.upload.maximum_size=32768
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GenF1.menu.pnum.Generic_F103T6.upload.maximum_data_size=10240
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GenF1.menu.pnum.Generic_F103T6.build.board=GENERIC_F103T6
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GenF1.menu.pnum.Generic_F103T6.build.product_line=STM32F103x6
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GenF1.menu.pnum.Generic_F103T6.build.variant=Generic_F103Tx
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GenF1.menu.pnum.Generic_F103T8=Generic F103T8
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GenF1.menu.pnum.Generic_F103T8.upload.maximum_size=65536
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GenF1.menu.pnum.Generic_F103T8.upload.maximum_data_size=20480
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GenF1.menu.pnum.Generic_F103T8.build.board=GENERIC_F103T8
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GenF1.menu.pnum.Generic_F103T8.build.product_line=STM32F103xB
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GenF1.menu.pnum.Generic_F103T8.build.variant=Generic_F103Tx
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GenF1.menu.pnum.Generic_F103TB=Generic F103TB
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GenF1.menu.pnum.Generic_F103TB.upload.maximum_size=131072
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GenF1.menu.pnum.Generic_F103TB.upload.maximum_data_size=20480
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GenF1.menu.pnum.Generic_F103TB.build.board=GENERIC_F103TB
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GenF1.menu.pnum.Generic_F103TB.build.product_line=STM32F103xB
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GenF1.menu.pnum.Generic_F103TB.build.variant=Generic_F103Tx
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# Generic STM32F103Vx boards
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GenF1.menu.pnum.Generic_F103V8=Generic F103V8
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GenF1.menu.pnum.Generic_F103V8.upload.maximum_size=65536

‎variants/Generic_F103Tx/PeripheralPins.c

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/*
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*******************************************************************************
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* Copyright (c) 2020, STMicroelectronics
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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*******************************************************************************
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* Automatically generated from STM32F103T(8-B)Ux.xml
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*/
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#include "Arduino.h"
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#include "PeripheralPins.h"
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/* =====
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* Note: Commented lines are alternative possibilities which are not used per default.
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* If you change them, you will have to know what you do
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* =====
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*/
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//*** ADC ***
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#ifdef HAL_ADC_MODULE_ENABLED
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WEAK const PinMap PinMap_ADC[] = {
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{PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
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// {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0
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{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
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// {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1
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{PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
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// {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2
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{PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
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// {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3
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{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
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// {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4
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{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
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// {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5
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{PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
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// {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6
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{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
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// {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7
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{PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
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// {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8
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{PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
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// {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9
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{NC, NP, 0}
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};
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#endif
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//*** No DAC ***
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//*** I2C ***
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#ifdef HAL_I2C_MODULE_ENABLED
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WEAK const PinMap PinMap_I2C_SDA[] = {
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{PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)},
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{NC, NP, 0}
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};
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#endif
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#ifdef HAL_I2C_MODULE_ENABLED
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WEAK const PinMap PinMap_I2C_SCL[] = {
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{PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)},
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{NC, NP, 0}
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};
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#endif
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//*** PWM ***
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#ifdef HAL_TIM_MODULE_ENABLED
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WEAK const PinMap PinMap_PWM[] = {
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{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM2_CH1
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// {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 1, 0)}, // TIM2_CH1
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{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM2_CH2
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// {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 2, 0)}, // TIM2_CH2
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{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM2_CH3
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// {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3
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{PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM2_CH4
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// {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 4, 0)}, // TIM2_CH4
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{PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM3_CH1
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// {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N
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{PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM3_CH2
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{PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM1_CH1
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// {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 0)}, // TIM1_CH1
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{PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM1_CH2
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// {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 0)}, // TIM1_CH2
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{PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM1_CH3
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// {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 0)}, // TIM1_CH3
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{PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM1_CH4
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// {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 4, 0)}, // TIM1_CH4
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// {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 1, 0)}, // TIM2_CH1
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{PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 1, 0)}, // TIM2_CH1
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// {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 1)}, // TIM1_CH2N
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{PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM3_CH3
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// {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 3, 0)}, // TIM3_CH3
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// {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 1)}, // TIM1_CH3N
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{PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM3_CH4
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// {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 4, 0)}, // TIM3_CH4
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// {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 2, 0)}, // TIM2_CH2
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{PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 2, 0)}, // TIM2_CH2
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{PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 1, 0)}, // TIM3_CH1
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{PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 2, 0)}, // TIM3_CH2
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#ifdef STM32F103xB
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{PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM4_CH1
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{PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM4_CH2
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#endif
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{NC, NP, 0}
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};
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#endif
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//*** SERIAL ***
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#ifdef HAL_UART_MODULE_ENABLED
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WEAK const PinMap PinMap_UART_TX[] = {
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{PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
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{PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
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{PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART1_ENABLE)},
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{NC, NP, 0}
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};
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#endif
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#ifdef HAL_UART_MODULE_ENABLED
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WEAK const PinMap PinMap_UART_RX[] = {
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{PA_3, USART2, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)},
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{PA_10, USART1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)},
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{PB_7, USART1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART1_ENABLE)},
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{NC, NP, 0}
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};
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#endif
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#ifdef HAL_UART_MODULE_ENABLED
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WEAK const PinMap PinMap_UART_RTS[] = {
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{PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
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{PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
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{NC, NP, 0}
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};
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#endif
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#ifdef HAL_UART_MODULE_ENABLED
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WEAK const PinMap PinMap_UART_CTS[] = {
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{PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
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{PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
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{NC, NP, 0}
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};
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#endif
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//*** SPI ***
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#ifdef HAL_SPI_MODULE_ENABLED
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WEAK const PinMap PinMap_SPI_MOSI[] = {
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{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
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{PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
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{NC, NP, 0}
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};
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#endif
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#ifdef HAL_SPI_MODULE_ENABLED
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WEAK const PinMap PinMap_SPI_MISO[] = {
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{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
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{PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
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{NC, NP, 0}
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};
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#endif
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#ifdef HAL_SPI_MODULE_ENABLED
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WEAK const PinMap PinMap_SPI_SCLK[] = {
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{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
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{PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
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{NC, NP, 0}
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};
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#endif
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#ifdef HAL_SPI_MODULE_ENABLED
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WEAK const PinMap PinMap_SPI_SSEL[] = {
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{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
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{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
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{NC, NP, 0}
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};
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#endif
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//*** CAN ***
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#ifdef HAL_CAN_MODULE_ENABLED
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WEAK const PinMap PinMap_CAN_RD[] = {
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{PA_11, CAN1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)},
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{NC, NP, 0}
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};
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#endif
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#ifdef HAL_CAN_MODULE_ENABLED
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WEAK const PinMap PinMap_CAN_TD[] = {
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{PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)},
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{NC, NP, 0}
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};
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#endif
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//*** No ETHERNET ***
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//*** No QUADSPI ***
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//*** USB ***
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#ifdef HAL_PCD_MODULE_ENABLED
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WEAK const PinMap PinMap_USB[] = {
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{PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DM
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{PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DP
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{NC, NP, 0}
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};
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#endif
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//*** No USB_OTG_FS ***
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//*** No USB_OTG_HS ***
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//*** No SD ***

‎variants/Generic_F103Tx/PinNamesVar.h

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/* SYS_WKUP */
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#ifdef PWR_WAKEUP_PIN1
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SYS_WKUP1 = PA_0,
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#endif
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#ifdef PWR_WAKEUP_PIN2
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SYS_WKUP2 = NC,
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#endif
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#ifdef PWR_WAKEUP_PIN3
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SYS_WKUP3 = NC,
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#endif
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#ifdef PWR_WAKEUP_PIN4
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SYS_WKUP4 = NC,
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#endif
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#ifdef PWR_WAKEUP_PIN5
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SYS_WKUP5 = NC,
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#endif
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#ifdef PWR_WAKEUP_PIN6
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SYS_WKUP6 = NC,
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#endif
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#ifdef PWR_WAKEUP_PIN7
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SYS_WKUP7 = NC,
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#endif
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#ifdef PWR_WAKEUP_PIN8
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SYS_WKUP8 = NC,
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#endif
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/* USB */
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#ifdef USBCON
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USB_DM = PA_11,
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USB_DP = PA_12,
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#endif

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