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[AMDGPU][True16][MC] added VOPC realtrue/faketrue flag and fake16 instructions (#104739)
VOPC instructions were defined with HasTrue16BitInst flag while these true16 instructions are actually implemented with fake16 profile. Seperate them to true16 version and fake16 version by adding UseRealTrue16 and UseFakeTrue16 flag and fake16 instructions. The code default to use fake16. This is preparing for the upcoming changes in MC to support realtrue 16bit operands and vdst. The true16 and fake16 profile will be modified in the later patches.
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‎llvm/lib/Target/AMDGPU/VOPCInstructions.td

Lines changed: 140 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -87,6 +87,17 @@ class VOPC_Profile<list<SchedReadWrite> sched, ValueType vt0, ValueType vt1 = vt
8787
multiclass VOPC_Profile_t16<list<SchedReadWrite> sched, ValueType vt0, ValueType vt1 = vt0> {
8888
def NAME : VOPC_Profile<sched, vt0, vt1>;
8989
def _t16 : VOPC_Profile<sched, vt0, vt1> {
90+
let IsTrue16 = 1;
91+
let IsRealTrue16 = 1;
92+
let Src1RC32 = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
93+
let Src0DPP = getVregSrcForVT<Src0VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
94+
let Src1DPP = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
95+
let Src2DPP = getVregSrcForVT<Src2VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
96+
let Src0ModDPP = getSrcModDPP_t16<Src0VT>.ret;
97+
let Src1ModDPP = getSrcModDPP_t16<Src1VT>.ret;
98+
let Src2ModDPP = getSrcModDPP_t16<Src2VT>.ret;
99+
}
100+
def _fake16: VOPC_Profile<sched, vt0, vt1> {
90101
let IsTrue16 = 1;
91102
let Src1RC32 = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
92103
let Src0DPP = getVregSrcForVT<Src0VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
@@ -117,6 +128,17 @@ class VOPC_NoSdst_Profile<list<SchedReadWrite> sched, ValueType vt0,
117128
multiclass VOPC_NoSdst_Profile_t16<list<SchedReadWrite> sched, ValueType vt0, ValueType vt1 = vt0> {
118129
def NAME : VOPC_NoSdst_Profile<sched, vt0, vt1>;
119130
def _t16 : VOPC_NoSdst_Profile<sched, vt0, vt1> {
131+
let IsTrue16 = 1;
132+
let IsRealTrue16 = 1;
133+
let Src1RC32 = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
134+
let Src0DPP = getVregSrcForVT<Src0VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
135+
let Src1DPP = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
136+
let Src2DPP = getVregSrcForVT<Src2VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
137+
let Src0ModDPP = getSrcModDPP_t16<Src0VT>.ret;
138+
let Src1ModDPP = getSrcModDPP_t16<Src1VT>.ret;
139+
let Src2ModDPP = getSrcModDPP_t16<Src2VT>.ret;
140+
}
141+
def _fake16 : VOPC_NoSdst_Profile<sched, vt0, vt1> {
120142
let IsTrue16 = 1;
121143
let Src1RC32 = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
122144
let Src0DPP = getVregSrcForVT<Src0VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
@@ -412,9 +434,12 @@ multiclass VOPC_F16 <string opName, SDPatternOperator cond = COND_NULL,
412434
let OtherPredicates = [Has16BitInsts], True16Predicate = NotHasTrue16BitInsts in {
413435
defm NAME : VOPC_Pseudos <opName, VOPC_I1_F16_F16, cond, revOp, 0>;
414436
}
415-
let OtherPredicates = [HasTrue16BitInsts] in {
437+
let True16Predicate = UseRealTrue16Insts in {
416438
defm _t16 : VOPC_Pseudos <opName#"_t16", VOPC_I1_F16_F16_t16, cond, revOp#"_t16", 0>;
417439
}
440+
let True16Predicate = UseFakeTrue16Insts in {
441+
defm _fake16 : VOPC_Pseudos <opName#"_fake16", VOPC_I1_F16_F16_fake16, cond, revOp#"_fake16", 0>;
442+
}
418443
}
419444

420445
multiclass VOPC_F32 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> :
@@ -428,9 +453,12 @@ multiclass VOPC_I16 <string opName, SDPatternOperator cond = COND_NULL,
428453
let OtherPredicates = [Has16BitInsts], True16Predicate = NotHasTrue16BitInsts in {
429454
defm NAME : VOPC_Pseudos <opName, VOPC_I1_I16_I16, cond, revOp, 0>;
430455
}
431-
let OtherPredicates = [HasTrue16BitInsts] in {
456+
let True16Predicate = UseRealTrue16Insts in {
432457
defm _t16 : VOPC_Pseudos <opName#"_t16", VOPC_I1_I16_I16_t16, cond, revOp#"_t16", 0>;
433458
}
459+
let True16Predicate = UseFakeTrue16Insts in {
460+
defm _fake16 : VOPC_Pseudos <opName#"_fake16", VOPC_I1_I16_I16_fake16, cond, revOp#"_fake16", 0>;
461+
}
434462
}
435463

436464
multiclass VOPC_I32 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> :
@@ -445,9 +473,12 @@ multiclass VOPCX_F16<string opName, string revOp = opName> {
445473
let OtherPredicates = [Has16BitInsts], True16Predicate = NotHasTrue16BitInsts in {
446474
defm NAME : VOPCX_Pseudos <opName, VOPC_I1_F16_F16, VOPC_F16_F16, COND_NULL, revOp>;
447475
}
448-
let OtherPredicates = [HasTrue16BitInsts] in {
476+
let True16Predicate = UseRealTrue16Insts in {
449477
defm _t16 : VOPCX_Pseudos <opName#"_t16", VOPC_I1_F16_F16_t16, VOPC_F16_F16_t16, COND_NULL, revOp#"_t16">;
450478
}
479+
let True16Predicate = UseFakeTrue16Insts in {
480+
defm _fake16 : VOPCX_Pseudos <opName#"_fake16", VOPC_I1_F16_F16_fake16, VOPC_F16_F16_fake16, COND_NULL, revOp#"_fake16">;
481+
}
451482
}
452483

453484
multiclass VOPCX_F32 <string opName, string revOp = opName> :
@@ -460,9 +491,12 @@ multiclass VOPCX_I16<string opName, string revOp = opName> {
460491
let OtherPredicates = [Has16BitInsts], True16Predicate = NotHasTrue16BitInsts in {
461492
defm NAME : VOPCX_Pseudos <opName, VOPC_I1_I16_I16, VOPC_I16_I16, COND_NULL, revOp>;
462493
}
463-
let OtherPredicates = [HasTrue16BitInsts] in {
494+
let True16Predicate = UseRealTrue16Insts in {
464495
defm _t16 : VOPCX_Pseudos <opName#"_t16", VOPC_I1_I16_I16_t16, VOPC_I16_I16_t16, COND_NULL, revOp#"_t16">;
465496
}
497+
let True16Predicate = UseFakeTrue16Insts in {
498+
defm _fake16 : VOPCX_Pseudos <opName#"_fake16", VOPC_I1_I16_I16_fake16, VOPC_I16_I16_fake16, COND_NULL, revOp#"_fake16">;
499+
}
466500
}
467501

468502
multiclass VOPCX_I32 <string opName, string revOp = opName> :
@@ -795,6 +829,18 @@ class VOPC_Class_Profile<list<SchedReadWrite> sched, ValueType src0VT, ValueType
795829
multiclass VOPC_Class_Profile_t16<list<SchedReadWrite> sched> {
796830
def NAME : VOPC_Class_Profile<sched, f16>;
797831
def _t16 : VOPC_Class_Profile<sched, f16, i16> {
832+
let IsTrue16 = 1;
833+
let IsRealTrue16 = 1;
834+
let Src1RC32 = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
835+
let Src1RC64 = VSrc_b32;
836+
let Src0DPP = getVregSrcForVT<Src0VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
837+
let Src1DPP = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
838+
let Src2DPP = getVregSrcForVT<Src2VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
839+
let Src0ModDPP = getSrcModDPP_t16<Src0VT>.ret;
840+
let Src1ModDPP = getSrcModDPP_t16<Src1VT>.ret;
841+
let Src2ModDPP = getSrcModDPP_t16<Src2VT>.ret;
842+
}
843+
def _fake16 : VOPC_Class_Profile<sched, f16, i16> {
798844
let IsTrue16 = 1;
799845
let Src1RC32 = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
800846
let Src1RC64 = VSrc_b32;
@@ -822,6 +868,18 @@ class VOPC_Class_NoSdst_Profile<list<SchedReadWrite> sched, ValueType src0VT, Va
822868
multiclass VOPC_Class_NoSdst_Profile_t16<list<SchedReadWrite> sched> {
823869
def NAME : VOPC_Class_NoSdst_Profile<sched, f16>;
824870
def _t16 : VOPC_Class_NoSdst_Profile<sched, f16, i16> {
871+
let IsTrue16 = 1;
872+
let IsRealTrue16 = 1;
873+
let Src1RC32 = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
874+
let Src1RC64 = VSrc_b32;
875+
let Src0DPP = getVregSrcForVT<Src0VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
876+
let Src1DPP = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
877+
let Src2DPP = getVregSrcForVT<Src2VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
878+
let Src0ModDPP = getSrcModDPP_t16<Src0VT>.ret;
879+
let Src1ModDPP = getSrcModDPP_t16<Src1VT>.ret;
880+
let Src2ModDPP = getSrcModDPP_t16<Src2VT>.ret;
881+
}
882+
def _fake16 : VOPC_Class_NoSdst_Profile<sched, f16, i16> {
825883
let IsTrue16 = 1;
826884
let Src1RC32 = getVregSrcForVT<Src1VT, 1/*IsTrue16*/, 1/*IsFake16*/>.ret;
827885
let Src1RC64 = VSrc_b32;
@@ -948,18 +1006,24 @@ multiclass VOPC_CLASS_F16 <string opName> {
9481006
let OtherPredicates = [Has16BitInsts], True16Predicate = NotHasTrue16BitInsts in {
9491007
defm NAME : VOPC_Class_Pseudos <opName, VOPC_I1_F16_I16, 0>;
9501008
}
951-
let OtherPredicates = [HasTrue16BitInsts] in {
1009+
let OtherPredicates = [UseRealTrue16Insts] in {
9521010
defm _t16 : VOPC_Class_Pseudos <opName#"_t16", VOPC_I1_F16_I16_t16, 0>;
9531011
}
1012+
let OtherPredicates = [UseFakeTrue16Insts] in {
1013+
defm _fake16 : VOPC_Class_Pseudos <opName#"_fake16", VOPC_I1_F16_I16_fake16, 0>;
1014+
}
9541015
}
9551016

9561017
multiclass VOPCX_CLASS_F16 <string opName> {
9571018
let OtherPredicates = [Has16BitInsts], True16Predicate = NotHasTrue16BitInsts in {
9581019
defm NAME : VOPCX_Class_Pseudos <opName, VOPC_I1_F16_I16, VOPC_F16_I16>;
9591020
}
960-
let OtherPredicates = [HasTrue16BitInsts] in {
1021+
let OtherPredicates = [UseRealTrue16Insts] in {
9611022
defm _t16 : VOPCX_Class_Pseudos <opName#"_t16", VOPC_I1_F16_I16_t16, VOPC_F16_I16_t16>;
9621023
}
1024+
let OtherPredicates = [UseFakeTrue16Insts] in {
1025+
defm _fake16 : VOPCX_Class_Pseudos <opName#"_fake16", VOPC_I1_F16_I16_fake16, VOPC_F16_I16_fake16>;
1026+
}
9631027
}
9641028

9651029
multiclass VOPC_CLASS_F32 <string opName> :
@@ -1401,7 +1465,7 @@ multiclass VOPC_Real_with_name<GFXGen Gen, bits<9> op, string OpName,
14011465
pseudo_mnemonic),
14021466
asm_name, ps64.AsmVariantName>;
14031467

1404-
let DecoderNamespace = Gen.DecoderNamespace in {
1468+
let DecoderNamespace = Gen.DecoderNamespace # !if(ps32.Pfl.IsRealTrue16, "", "_FAKE16") in {
14051469
def _e32#Gen.Suffix :
14061470
// 32 and 64 bit forms of the instruction have _e32 and _e64
14071471
// respectively appended to their assembly mnemonic.
@@ -1530,7 +1594,7 @@ multiclass VOPCX_Real_with_name<GFXGen Gen, bits<9> op, string OpName,
15301594
pseudo_mnemonic),
15311595
asm_name, ps64.AsmVariantName>;
15321596

1533-
let DecoderNamespace = Gen.DecoderNamespace in {
1597+
let DecoderNamespace = Gen.DecoderNamespace # !if(ps32.Pfl.IsRealTrue16, "", "_FAKE16") in {
15341598
def _e32#Gen.Suffix
15351599
: VOPC_Real<ps32, Gen.Subtarget, asm_name>,
15361600
VOPCe<op{7-0}> {
@@ -1623,7 +1687,25 @@ defm V_CMP_NGT_F16_t16 : VOPC_Real_t16_gfx11_gfx12<0x00b, "v_cmp_ngt_f16">;
16231687
defm V_CMP_NLE_F16_t16 : VOPC_Real_t16_gfx11_gfx12<0x00c, "v_cmp_nle_f16">;
16241688
defm V_CMP_NEQ_F16_t16 : VOPC_Real_t16_gfx11_gfx12<0x00d, "v_cmp_neq_f16">;
16251689
defm V_CMP_NLT_F16_t16 : VOPC_Real_t16_gfx11_gfx12<0x00e, "v_cmp_nlt_f16">;
1626-
defm V_CMP_T_F16_t16 : VOPC_Real_with_name_gfx11<0x00f, "V_CMP_TRU_F16_t16", "v_cmp_t_f16", "v_cmp_tru_f16">;
1690+
defm V_CMP_T_F16_t16 : VOPC_Real_t16_gfx11<0x00f, "v_cmp_t_f16", "V_CMP_TRU_F16_t16", "v_cmp_tru_f16">;
1691+
1692+
defm V_CMP_F_F16_fake16 : VOPC_Real_t16_gfx11<0x000, "v_cmp_f_f16">;
1693+
defm V_CMP_LT_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x001, "v_cmp_lt_f16">;
1694+
defm V_CMP_EQ_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x002, "v_cmp_eq_f16">;
1695+
defm V_CMP_LE_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x003, "v_cmp_le_f16">;
1696+
defm V_CMP_GT_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x004, "v_cmp_gt_f16">;
1697+
defm V_CMP_LG_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x005, "v_cmp_lg_f16">;
1698+
defm V_CMP_GE_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x006, "v_cmp_ge_f16">;
1699+
defm V_CMP_O_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x007, "v_cmp_o_f16">;
1700+
defm V_CMP_U_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x008, "v_cmp_u_f16">;
1701+
defm V_CMP_NGE_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x009, "v_cmp_nge_f16">;
1702+
defm V_CMP_NLG_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x00a, "v_cmp_nlg_f16">;
1703+
defm V_CMP_NGT_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x00b, "v_cmp_ngt_f16">;
1704+
defm V_CMP_NLE_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x00c, "v_cmp_nle_f16">;
1705+
defm V_CMP_NEQ_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x00d, "v_cmp_neq_f16">;
1706+
defm V_CMP_NLT_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x00e, "v_cmp_nlt_f16">;
1707+
defm V_CMP_T_F16_fake16 : VOPC_Real_t16_gfx11<0x00f, "v_cmp_t_f16", "V_CMP_TRU_F16_fake16", "v_cmp_tru_f16">;
1708+
16271709
defm V_CMP_F_F32 : VOPC_Real_gfx11<0x010>;
16281710
defm V_CMP_LT_F32 : VOPC_Real_gfx11_gfx12<0x011>;
16291711
defm V_CMP_EQ_F32 : VOPC_Real_gfx11_gfx12<0x012>;
@@ -1641,6 +1723,7 @@ defm V_CMP_NEQ_F32 : VOPC_Real_gfx11_gfx12<0x01d>;
16411723
defm V_CMP_NLT_F32 : VOPC_Real_gfx11_gfx12<0x01e>;
16421724
defm V_CMP_T_F32 : VOPC_Real_with_name_gfx11<0x01f, "V_CMP_TRU_F32", "v_cmp_t_f32">;
16431725
defm V_CMP_T_F64 : VOPC_Real_with_name_gfx11<0x02f, "V_CMP_TRU_F64", "v_cmp_t_f64">;
1726+
16441727
defm V_CMP_LT_I16_t16 : VOPC_Real_t16_gfx11_gfx12<0x031, "v_cmp_lt_i16">;
16451728
defm V_CMP_EQ_I16_t16 : VOPC_Real_t16_gfx11_gfx12<0x032, "v_cmp_eq_i16">;
16461729
defm V_CMP_LE_I16_t16 : VOPC_Real_t16_gfx11_gfx12<0x033, "v_cmp_le_i16">;
@@ -1653,6 +1736,20 @@ defm V_CMP_LE_U16_t16 : VOPC_Real_t16_gfx11_gfx12<0x03b, "v_cmp_le_u16">;
16531736
defm V_CMP_GT_U16_t16 : VOPC_Real_t16_gfx11_gfx12<0x03c, "v_cmp_gt_u16">;
16541737
defm V_CMP_NE_U16_t16 : VOPC_Real_t16_gfx11_gfx12<0x03d, "v_cmp_ne_u16">;
16551738
defm V_CMP_GE_U16_t16 : VOPC_Real_t16_gfx11_gfx12<0x03e, "v_cmp_ge_u16">;
1739+
1740+
defm V_CMP_LT_I16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x031, "v_cmp_lt_i16">;
1741+
defm V_CMP_EQ_I16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x032, "v_cmp_eq_i16">;
1742+
defm V_CMP_LE_I16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x033, "v_cmp_le_i16">;
1743+
defm V_CMP_GT_I16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x034, "v_cmp_gt_i16">;
1744+
defm V_CMP_NE_I16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x035, "v_cmp_ne_i16">;
1745+
defm V_CMP_GE_I16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x036, "v_cmp_ge_i16">;
1746+
defm V_CMP_LT_U16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x039, "v_cmp_lt_u16">;
1747+
defm V_CMP_EQ_U16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x03a, "v_cmp_eq_u16">;
1748+
defm V_CMP_LE_U16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x03b, "v_cmp_le_u16">;
1749+
defm V_CMP_GT_U16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x03c, "v_cmp_gt_u16">;
1750+
defm V_CMP_NE_U16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x03d, "v_cmp_ne_u16">;
1751+
defm V_CMP_GE_U16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x03e, "v_cmp_ge_u16">;
1752+
16561753
defm V_CMP_F_I32 : VOPC_Real_gfx11<0x040>;
16571754
defm V_CMP_LT_I32 : VOPC_Real_gfx11_gfx12<0x041>;
16581755
defm V_CMP_EQ_I32 : VOPC_Real_gfx11_gfx12<0x042>;
@@ -1688,6 +1785,7 @@ defm V_CMP_GE_U64 : VOPC_Real_gfx11_gfx12<0x05e>;
16881785
defm V_CMP_T_U64 : VOPC_Real_gfx11<0x05f>;
16891786

16901787
defm V_CMP_CLASS_F16_t16 : VOPC_Real_t16_gfx11_gfx12<0x07d, "v_cmp_class_f16">;
1788+
defm V_CMP_CLASS_F16_fake16 : VOPC_Real_t16_gfx11_gfx12<0x07d, "v_cmp_class_f16">;
16911789
defm V_CMP_CLASS_F32 : VOPC_Real_gfx11_gfx12<0x07e>;
16921790
defm V_CMP_CLASS_F64 : VOPC_Real_gfx11_gfx12<0x07f>;
16931791

@@ -1707,6 +1805,24 @@ defm V_CMPX_NLE_F16_t16 : VOPCX_Real_t16_gfx11_gfx12<0x08c, "v_cmpx_nle_f16">;
17071805
defm V_CMPX_NEQ_F16_t16 : VOPCX_Real_t16_gfx11_gfx12<0x08d, "v_cmpx_neq_f16">;
17081806
defm V_CMPX_NLT_F16_t16 : VOPCX_Real_t16_gfx11_gfx12<0x08e, "v_cmpx_nlt_f16">;
17091807
defm V_CMPX_T_F16_t16 : VOPCX_Real_with_name_gfx11<0x08f, "V_CMPX_TRU_F16_t16", "v_cmpx_t_f16", "v_cmpx_tru_f16">;
1808+
1809+
defm V_CMPX_F_F16_fake16 : VOPCX_Real_t16_gfx11<0x080, "v_cmpx_f_f16">;
1810+
defm V_CMPX_LT_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x081, "v_cmpx_lt_f16">;
1811+
defm V_CMPX_EQ_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x082, "v_cmpx_eq_f16">;
1812+
defm V_CMPX_LE_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x083, "v_cmpx_le_f16">;
1813+
defm V_CMPX_GT_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x084, "v_cmpx_gt_f16">;
1814+
defm V_CMPX_LG_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x085, "v_cmpx_lg_f16">;
1815+
defm V_CMPX_GE_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x086, "v_cmpx_ge_f16">;
1816+
defm V_CMPX_O_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x087, "v_cmpx_o_f16">;
1817+
defm V_CMPX_U_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x088, "v_cmpx_u_f16">;
1818+
defm V_CMPX_NGE_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x089, "v_cmpx_nge_f16">;
1819+
defm V_CMPX_NLG_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x08a, "v_cmpx_nlg_f16">;
1820+
defm V_CMPX_NGT_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x08b, "v_cmpx_ngt_f16">;
1821+
defm V_CMPX_NLE_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x08c, "v_cmpx_nle_f16">;
1822+
defm V_CMPX_NEQ_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x08d, "v_cmpx_neq_f16">;
1823+
defm V_CMPX_NLT_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x08e, "v_cmpx_nlt_f16">;
1824+
defm V_CMPX_T_F16_fake16 : VOPCX_Real_with_name_gfx11<0x08f, "V_CMPX_TRU_F16_fake16", "v_cmpx_t_f16", "v_cmpx_tru_f16">;
1825+
17101826
defm V_CMPX_F_F32 : VOPCX_Real_gfx11<0x090>;
17111827
defm V_CMPX_LT_F32 : VOPCX_Real_gfx11_gfx12<0x091>;
17121828
defm V_CMPX_EQ_F32 : VOPCX_Real_gfx11_gfx12<0x092>;
@@ -1753,6 +1869,20 @@ defm V_CMPX_LE_U16_t16 : VOPCX_Real_t16_gfx11_gfx12<0x0bb, "v_cmpx_le_u16">;
17531869
defm V_CMPX_GT_U16_t16 : VOPCX_Real_t16_gfx11_gfx12<0x0bc, "v_cmpx_gt_u16">;
17541870
defm V_CMPX_NE_U16_t16 : VOPCX_Real_t16_gfx11_gfx12<0x0bd, "v_cmpx_ne_u16">;
17551871
defm V_CMPX_GE_U16_t16 : VOPCX_Real_t16_gfx11_gfx12<0x0be, "v_cmpx_ge_u16">;
1872+
1873+
defm V_CMPX_LT_I16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0b1, "v_cmpx_lt_i16">;
1874+
defm V_CMPX_EQ_I16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0b2, "v_cmpx_eq_i16">;
1875+
defm V_CMPX_LE_I16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0b3, "v_cmpx_le_i16">;
1876+
defm V_CMPX_GT_I16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0b4, "v_cmpx_gt_i16">;
1877+
defm V_CMPX_NE_I16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0b5, "v_cmpx_ne_i16">;
1878+
defm V_CMPX_GE_I16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0b6, "v_cmpx_ge_i16">;
1879+
defm V_CMPX_LT_U16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0b9, "v_cmpx_lt_u16">;
1880+
defm V_CMPX_EQ_U16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0ba, "v_cmpx_eq_u16">;
1881+
defm V_CMPX_LE_U16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0bb, "v_cmpx_le_u16">;
1882+
defm V_CMPX_GT_U16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0bc, "v_cmpx_gt_u16">;
1883+
defm V_CMPX_NE_U16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0bd, "v_cmpx_ne_u16">;
1884+
defm V_CMPX_GE_U16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0be, "v_cmpx_ge_u16">;
1885+
17561886
defm V_CMPX_F_I32 : VOPCX_Real_gfx11<0x0c0>;
17571887
defm V_CMPX_LT_I32 : VOPCX_Real_gfx11_gfx12<0x0c1>;
17581888
defm V_CMPX_EQ_I32 : VOPCX_Real_gfx11_gfx12<0x0c2>;
@@ -1787,6 +1917,7 @@ defm V_CMPX_NE_U64 : VOPCX_Real_gfx11_gfx12<0x0dd>;
17871917
defm V_CMPX_GE_U64 : VOPCX_Real_gfx11_gfx12<0x0de>;
17881918
defm V_CMPX_T_U64 : VOPCX_Real_gfx11<0x0df>;
17891919
defm V_CMPX_CLASS_F16_t16 : VOPCX_Real_t16_gfx11_gfx12<0x0fd, "v_cmpx_class_f16">;
1920+
defm V_CMPX_CLASS_F16_fake16 : VOPCX_Real_t16_gfx11_gfx12<0x0fd, "v_cmpx_class_f16">;
17901921
defm V_CMPX_CLASS_F32 : VOPCX_Real_gfx11_gfx12<0x0fe>;
17911922
defm V_CMPX_CLASS_F64 : VOPCX_Real_gfx11_gfx12<0x0ff>;
17921923

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