@@ -5424,26 +5424,26 @@ let Predicates = [HasAVX512, NoVLX] in {
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(EXTRACT_SUBREG (v8i64
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(VPROLVQZrr
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(v8i64 (INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src1, sub_xmm)),
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- (INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src2, sub_xmm))),
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+ (v8i64 (INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src2, sub_xmm) ))),
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sub_xmm)>;
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def : Pat<(v4i64 (rotl (v4i64 VR256X:$src1), (v4i64 VR256X:$src2))),
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(EXTRACT_SUBREG (v8i64
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(VPROLVQZrr
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(v8i64 (INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src1, sub_ymm)),
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- (INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src2, sub_ymm))),
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+ (v8i64 (INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src2, sub_ymm) ))),
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sub_ymm)>;
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def : Pat<(v4i32 (rotl (v4i32 VR128X:$src1), (v4i32 VR128X:$src2))),
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(EXTRACT_SUBREG (v16i32
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(VPROLVDZrr
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(v16i32 (INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src1, sub_xmm)),
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- (INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src2, sub_xmm))),
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+ (v16i32 (INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src2, sub_xmm) ))),
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sub_xmm)>;
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def : Pat<(v8i32 (rotl (v8i32 VR256X:$src1), (v8i32 VR256X:$src2))),
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(EXTRACT_SUBREG (v16i32
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(VPROLVDZrr
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(v16i32 (INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src1, sub_ymm)),
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- (INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src2, sub_ymm))),
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+ (v16i32 (INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src2, sub_ymm) ))),
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sub_ymm)>;
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def : Pat<(v2i64 (X86vrotli (v2i64 VR128X:$src1), (i8 imm:$src2))),
@@ -5475,26 +5475,26 @@ let Predicates = [HasAVX512, NoVLX] in {
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(EXTRACT_SUBREG (v8i64
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(VPRORVQZrr
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(v8i64 (INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src1, sub_xmm)),
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- (INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src2, sub_xmm))),
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+ (v8i64 (INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src2, sub_xmm) ))),
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sub_xmm)>;
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def : Pat<(v4i64 (rotr (v4i64 VR256X:$src1), (v4i64 VR256X:$src2))),
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(EXTRACT_SUBREG (v8i64
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(VPRORVQZrr
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(v8i64 (INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src1, sub_ymm)),
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- (INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src2, sub_ymm))),
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+ (v8i64 (INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src2, sub_ymm) ))),
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sub_ymm)>;
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def : Pat<(v4i32 (rotr (v4i32 VR128X:$src1), (v4i32 VR128X:$src2))),
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(EXTRACT_SUBREG (v16i32
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(VPRORVDZrr
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(v16i32 (INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src1, sub_xmm)),
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- (INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src2, sub_xmm))),
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+ (v16i32 (INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src2, sub_xmm) ))),
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sub_xmm)>;
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def : Pat<(v8i32 (rotr (v8i32 VR256X:$src1), (v8i32 VR256X:$src2))),
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(EXTRACT_SUBREG (v16i32
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(VPRORVDZrr
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(v16i32 (INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src1, sub_ymm)),
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- (INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src2, sub_ymm))),
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+ (v16i32 (INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src2, sub_ymm) ))),
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sub_ymm)>;
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def : Pat<(v2i64 (X86vrotri (v2i64 VR128X:$src1), (i8 imm:$src2))),
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