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[X86] Add more type qualifiers to INSERT_SUBREG operations in rotate patterns so they don't get created with a v64i8 type.
Not sure why tablegen didn't error on this. Fixes PR35158. llvm-svn: 317079
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llvm/lib/Target/X86/X86InstrAVX512.td

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -5424,26 +5424,26 @@ let Predicates = [HasAVX512, NoVLX] in {
54245424
(EXTRACT_SUBREG (v8i64
54255425
(VPROLVQZrr
54265426
(v8i64 (INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src1, sub_xmm)),
5427-
(INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src2, sub_xmm))),
5427+
(v8i64 (INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src2, sub_xmm)))),
54285428
sub_xmm)>;
54295429
def : Pat<(v4i64 (rotl (v4i64 VR256X:$src1), (v4i64 VR256X:$src2))),
54305430
(EXTRACT_SUBREG (v8i64
54315431
(VPROLVQZrr
54325432
(v8i64 (INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src1, sub_ymm)),
5433-
(INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src2, sub_ymm))),
5433+
(v8i64 (INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src2, sub_ymm)))),
54345434
sub_ymm)>;
54355435

54365436
def : Pat<(v4i32 (rotl (v4i32 VR128X:$src1), (v4i32 VR128X:$src2))),
54375437
(EXTRACT_SUBREG (v16i32
54385438
(VPROLVDZrr
54395439
(v16i32 (INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src1, sub_xmm)),
5440-
(INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src2, sub_xmm))),
5440+
(v16i32 (INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src2, sub_xmm)))),
54415441
sub_xmm)>;
54425442
def : Pat<(v8i32 (rotl (v8i32 VR256X:$src1), (v8i32 VR256X:$src2))),
54435443
(EXTRACT_SUBREG (v16i32
54445444
(VPROLVDZrr
54455445
(v16i32 (INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src1, sub_ymm)),
5446-
(INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src2, sub_ymm))),
5446+
(v16i32 (INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src2, sub_ymm)))),
54475447
sub_ymm)>;
54485448

54495449
def : Pat<(v2i64 (X86vrotli (v2i64 VR128X:$src1), (i8 imm:$src2))),
@@ -5475,26 +5475,26 @@ let Predicates = [HasAVX512, NoVLX] in {
54755475
(EXTRACT_SUBREG (v8i64
54765476
(VPRORVQZrr
54775477
(v8i64 (INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src1, sub_xmm)),
5478-
(INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src2, sub_xmm))),
5478+
(v8i64 (INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src2, sub_xmm)))),
54795479
sub_xmm)>;
54805480
def : Pat<(v4i64 (rotr (v4i64 VR256X:$src1), (v4i64 VR256X:$src2))),
54815481
(EXTRACT_SUBREG (v8i64
54825482
(VPRORVQZrr
54835483
(v8i64 (INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src1, sub_ymm)),
5484-
(INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src2, sub_ymm))),
5484+
(v8i64 (INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src2, sub_ymm)))),
54855485
sub_ymm)>;
54865486

54875487
def : Pat<(v4i32 (rotr (v4i32 VR128X:$src1), (v4i32 VR128X:$src2))),
54885488
(EXTRACT_SUBREG (v16i32
54895489
(VPRORVDZrr
54905490
(v16i32 (INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src1, sub_xmm)),
5491-
(INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src2, sub_xmm))),
5491+
(v16i32 (INSERT_SUBREG (IMPLICIT_DEF), VR128X:$src2, sub_xmm)))),
54925492
sub_xmm)>;
54935493
def : Pat<(v8i32 (rotr (v8i32 VR256X:$src1), (v8i32 VR256X:$src2))),
54945494
(EXTRACT_SUBREG (v16i32
54955495
(VPRORVDZrr
54965496
(v16i32 (INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src1, sub_ymm)),
5497-
(INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src2, sub_ymm))),
5497+
(v16i32 (INSERT_SUBREG (IMPLICIT_DEF), VR256X:$src2, sub_ymm)))),
54985498
sub_ymm)>;
54995499

55005500
def : Pat<(v2i64 (X86vrotri (v2i64 VR128X:$src1), (i8 imm:$src2))),

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