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[InstCombine] Remove one-use limitation from X-Y==0 fold
This one-use limitation is artificial, we do not increase instruction count if we perform the fold with multiple uses. The motivating case is shown in @sub_eq_zero_select, where the one-use limitation causes us to miss a subsequent select fold. I believe the backend is pretty good about reusing flag-producing subs for cmps with same operands, so I think doing this is fine. Differential Revision: https://reviews.llvm.org/D120337
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+39
-41
lines changed

4 files changed

+39
-41
lines changed

llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp

+5-5
Original file line numberDiff line numberDiff line change
@@ -2593,18 +2593,18 @@ Instruction *InstCombinerImpl::foldICmpSubConstant(ICmpInst &Cmp,
25932593
!subWithOverflow(SubResult, *C2, C, Cmp.isSigned()))
25942594
return new ICmpInst(SwappedPred, Y, ConstantInt::get(Ty, SubResult));
25952595

2596+
// X - Y == 0 --> X == Y.
2597+
// X - Y != 0 --> X != Y.
2598+
if (Cmp.isEquality() && C.isZero())
2599+
return new ICmpInst(Pred, X, Y);
2600+
25962601
// The following transforms are only worth it if the only user of the subtract
25972602
// is the icmp.
25982603
// TODO: This is an artificial restriction for all of the transforms below
25992604
// that only need a single replacement icmp.
26002605
if (!Sub->hasOneUse())
26012606
return nullptr;
26022607

2603-
// X - Y == 0 --> X == Y.
2604-
// X - Y != 0 --> X != Y.
2605-
if (Cmp.isEquality() && C.isZero())
2606-
return new ICmpInst(Pred, X, Y);
2607-
26082608
if (Sub->hasNoSignedWrap()) {
26092609
// (icmp sgt (sub nsw X, Y), -1) -> (icmp sge X, Y)
26102610
if (Pred == ICmpInst::ICMP_SGT && C.isAllOnes())

llvm/test/Transforms/InstCombine/icmp-sub.ll

+3-5
Original file line numberDiff line numberDiff line change
@@ -467,7 +467,7 @@ define i1 @sub_eq_zero_use(i32 %x, i32 %y) {
467467
; CHECK-LABEL: @sub_eq_zero_use(
468468
; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[X:%.*]], [[Y:%.*]]
469469
; CHECK-NEXT: call void @use(i32 [[SUB]])
470-
; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[SUB]], 0
470+
; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[X]], [[Y]]
471471
; CHECK-NEXT: ret i1 [[R]]
472472
;
473473
%sub = sub i32 %x, %y
@@ -480,7 +480,7 @@ define <2 x i1> @sub_ne_zero_use(<2 x i8> %x, <2 x i8> %y) {
480480
; CHECK-LABEL: @sub_ne_zero_use(
481481
; CHECK-NEXT: [[SUB:%.*]] = sub <2 x i8> [[X:%.*]], [[Y:%.*]]
482482
; CHECK-NEXT: call void @use_vec(<2 x i8> [[SUB]])
483-
; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[SUB]], zeroinitializer
483+
; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[X]], [[Y]]
484484
; CHECK-NEXT: ret <2 x i1> [[R]]
485485
;
486486
%sub = sub <2 x i8> %x, %y
@@ -493,9 +493,7 @@ define i32 @sub_eq_zero_select(i32 %a, i32 %b, i32* %p) {
493493
; CHECK-LABEL: @sub_eq_zero_select(
494494
; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A:%.*]], [[B:%.*]]
495495
; CHECK-NEXT: store i32 [[SUB]], i32* [[P:%.*]], align 4
496-
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[SUB]], 0
497-
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[B]]
498-
; CHECK-NEXT: ret i32 [[SEL]]
496+
; CHECK-NEXT: ret i32 [[B]]
499497
;
500498
%sub = sub i32 %a, %b
501499
store i32 %sub, i32* %p

llvm/test/Transforms/InstCombine/prevent-cmp-merge.ll

+3-3
Original file line numberDiff line numberDiff line change
@@ -56,7 +56,7 @@ define zeroext i1 @test2(i32 %lhs, i32 %rhs) {
5656
define zeroext i1 @test3(i32 %lhs, i32 %rhs) {
5757
; CHECK-LABEL: @test3(
5858
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[LHS:%.*]], [[RHS:%.*]]
59-
; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[SUB]], 0
59+
; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[LHS]], [[RHS]]
6060
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[SUB]], 31
6161
; CHECK-NEXT: [[SEL:%.*]] = or i1 [[CMP1]], [[CMP2]]
6262
; CHECK-NEXT: ret i1 [[SEL]]
@@ -72,9 +72,9 @@ define zeroext i1 @test3(i32 %lhs, i32 %rhs) {
7272
define zeroext i1 @test3_logical(i32 %lhs, i32 %rhs) {
7373
; CHECK-LABEL: @test3_logical(
7474
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[LHS:%.*]], [[RHS:%.*]]
75-
; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[SUB]], 0
75+
; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[LHS]], [[RHS]]
7676
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[SUB]], 31
77-
; CHECK-NEXT: [[SEL:%.*]] = or i1 [[CMP1]], [[CMP2]]
77+
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP1]], i1 true, i1 [[CMP2]]
7878
; CHECK-NEXT: ret i1 [[SEL]]
7979
;
8080

llvm/test/Transforms/InstCombine/result-of-usub-is-non-zero-and-no-overflow.ll

+28-28
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,7 @@ define i1 @t0_noncanonical_ignoreme(i8 %base, i8 %offset) {
2222
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
2323
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]]
2424
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
25-
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
25+
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
2626
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
2727
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
2828
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -43,7 +43,7 @@ define i1 @t0_noncanonical_ignoreme_logical(i8 %base, i8 %offset) {
4343
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
4444
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]]
4545
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
46-
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
46+
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
4747
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
4848
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
4949
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -64,7 +64,7 @@ define i1 @t1(i8 %base, i8 %offset) {
6464
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
6565
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]]
6666
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
67-
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
67+
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
6868
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
6969
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
7070
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -85,7 +85,7 @@ define i1 @t1_logical(i8 %base, i8 %offset) {
8585
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
8686
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]]
8787
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
88-
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
88+
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
8989
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
9090
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
9191
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -105,7 +105,7 @@ define i1 @t1_strict(i8 %base, i8 %offset) {
105105
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
106106
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
107107
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
108-
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
108+
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
109109
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
110110
; CHECK-NEXT: ret i1 [[NO_UNDERFLOW]]
111111
;
@@ -125,7 +125,7 @@ define i1 @t1_strict_logical(i8 %base, i8 %offset) {
125125
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
126126
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
127127
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
128-
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
128+
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
129129
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
130130
; CHECK-NEXT: ret i1 [[NO_UNDERFLOW]]
131131
;
@@ -201,7 +201,7 @@ define i1 @t3_commutability0(i8 %base, i8 %offset) {
201201
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
202202
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]]
203203
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
204-
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
204+
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
205205
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
206206
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
207207
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -222,7 +222,7 @@ define i1 @t3_commutability0_logical(i8 %base, i8 %offset) {
222222
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
223223
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]]
224224
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
225-
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
225+
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
226226
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
227227
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
228228
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -242,7 +242,7 @@ define i1 @t4_commutability1(i8 %base, i8 %offset) {
242242
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
243243
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]]
244244
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
245-
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
245+
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
246246
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
247247
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
248248
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -263,7 +263,7 @@ define i1 @t4_commutability1_logical(i8 %base, i8 %offset) {
263263
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
264264
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]]
265265
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
266-
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
266+
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
267267
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
268268
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
269269
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -283,7 +283,7 @@ define i1 @t5_commutability2(i8 %base, i8 %offset) {
283283
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
284284
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]]
285285
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
286-
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
286+
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
287287
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
288288
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
289289
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -304,7 +304,7 @@ define i1 @t5_commutability2_logical(i8 %base, i8 %offset) {
304304
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
305305
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]]
306306
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
307-
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
307+
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
308308
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
309309
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
310310
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -382,7 +382,7 @@ define i1 @t7(i8 %base, i8 %offset) {
382382
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
383383
; CHECK-NEXT: [[UNDERFLOW:%.*]] = icmp ult i8 [[BASE]], [[OFFSET]]
384384
; CHECK-NEXT: call void @use1(i1 [[UNDERFLOW]])
385-
; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[ADJUSTED]], 0
385+
; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[BASE]], [[OFFSET]]
386386
; CHECK-NEXT: call void @use1(i1 [[NULL]])
387387
; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i8 [[BASE]], [[OFFSET]]
388388
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -403,7 +403,7 @@ define i1 @t7_logical(i8 %base, i8 %offset) {
403403
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
404404
; CHECK-NEXT: [[UNDERFLOW:%.*]] = icmp ult i8 [[BASE]], [[OFFSET]]
405405
; CHECK-NEXT: call void @use1(i1 [[UNDERFLOW]])
406-
; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[ADJUSTED]], 0
406+
; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[BASE]], [[OFFSET]]
407407
; CHECK-NEXT: call void @use1(i1 [[NULL]])
408408
; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i8 [[BASE]], [[OFFSET]]
409409
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -423,7 +423,7 @@ define i1 @t7_nonstrict(i8 %base, i8 %offset) {
423423
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
424424
; CHECK-NEXT: [[UNDERFLOW:%.*]] = icmp ule i8 [[BASE]], [[OFFSET]]
425425
; CHECK-NEXT: call void @use1(i1 [[UNDERFLOW]])
426-
; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[ADJUSTED]], 0
426+
; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[BASE]], [[OFFSET]]
427427
; CHECK-NEXT: call void @use1(i1 [[NULL]])
428428
; CHECK-NEXT: ret i1 [[UNDERFLOW]]
429429
;
@@ -443,7 +443,7 @@ define i1 @t7_nonstrict_logical(i8 %base, i8 %offset) {
443443
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
444444
; CHECK-NEXT: [[UNDERFLOW:%.*]] = icmp ule i8 [[BASE]], [[OFFSET]]
445445
; CHECK-NEXT: call void @use1(i1 [[UNDERFLOW]])
446-
; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[ADJUSTED]], 0
446+
; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[BASE]], [[OFFSET]]
447447
; CHECK-NEXT: call void @use1(i1 [[NULL]])
448448
; CHECK-NEXT: ret i1 [[UNDERFLOW]]
449449
;
@@ -511,7 +511,7 @@ define i1 @t9_commutative(i8 %base, i8 %offset) {
511511
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
512512
; CHECK-NEXT: [[UNDERFLOW:%.*]] = icmp ult i8 [[BASE]], [[OFFSET]]
513513
; CHECK-NEXT: call void @use1(i1 [[UNDERFLOW]])
514-
; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[ADJUSTED]], 0
514+
; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[BASE]], [[OFFSET]]
515515
; CHECK-NEXT: call void @use1(i1 [[NULL]])
516516
; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i8 [[BASE]], [[OFFSET]]
517517
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -532,7 +532,7 @@ define i1 @t9_commutative_logical(i8 %base, i8 %offset) {
532532
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
533533
; CHECK-NEXT: [[UNDERFLOW:%.*]] = icmp ult i8 [[BASE]], [[OFFSET]]
534534
; CHECK-NEXT: call void @use1(i1 [[UNDERFLOW]])
535-
; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[ADJUSTED]], 0
535+
; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[BASE]], [[OFFSET]]
536536
; CHECK-NEXT: call void @use1(i1 [[NULL]])
537537
; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i8 [[BASE]], [[OFFSET]]
538538
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -556,7 +556,7 @@ define i1 @t10(i64 %base, i64* nonnull %offsetptr) {
556556
; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]])
557557
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ule i64 [[OFFSET]], [[BASE]]
558558
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
559-
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[ADJUSTED]], 0
559+
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[OFFSET]], [[BASE]]
560560
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
561561
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[OFFSET]], [[BASE]]
562562
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -580,7 +580,7 @@ define i1 @t10_logical(i64 %base, i64* nonnull %offsetptr) {
580580
; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]])
581581
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ule i64 [[OFFSET]], [[BASE]]
582582
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
583-
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[ADJUSTED]], 0
583+
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[OFFSET]], [[BASE]]
584584
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
585585
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[OFFSET]], [[BASE]]
586586
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -603,7 +603,7 @@ define i1 @t11_commutative(i64 %base, i64* nonnull %offsetptr) {
603603
; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]])
604604
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ule i64 [[OFFSET]], [[BASE]]
605605
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
606-
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[ADJUSTED]], 0
606+
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[OFFSET]], [[BASE]]
607607
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
608608
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[OFFSET]], [[BASE]]
609609
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -627,7 +627,7 @@ define i1 @t11_commutative_logical(i64 %base, i64* nonnull %offsetptr) {
627627
; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]])
628628
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ule i64 [[OFFSET]], [[BASE]]
629629
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
630-
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[ADJUSTED]], 0
630+
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[OFFSET]], [[BASE]]
631631
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
632632
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[OFFSET]], [[BASE]]
633633
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -651,7 +651,7 @@ define i1 @t12(i64 %base, i64* nonnull %offsetptr) {
651651
; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]])
652652
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ugt i64 [[OFFSET]], [[BASE]]
653653
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
654-
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp eq i64 [[ADJUSTED]], 0
654+
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp eq i64 [[OFFSET]], [[BASE]]
655655
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
656656
; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i64 [[OFFSET]], [[BASE]]
657657
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -675,7 +675,7 @@ define i1 @t12_logical(i64 %base, i64* nonnull %offsetptr) {
675675
; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]])
676676
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ugt i64 [[OFFSET]], [[BASE]]
677677
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
678-
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp eq i64 [[ADJUSTED]], 0
678+
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp eq i64 [[OFFSET]], [[BASE]]
679679
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
680680
; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i64 [[OFFSET]], [[BASE]]
681681
; CHECK-NEXT: ret i1 [[TMP1]]
@@ -698,7 +698,7 @@ define i1 @t13(i64 %base, i64* nonnull %offsetptr) {
698698
; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]])
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; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ugt i64 [[OFFSET]], [[BASE]]
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; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
701-
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp eq i64 [[ADJUSTED]], 0
701+
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp eq i64 [[OFFSET]], [[BASE]]
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; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
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; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i64 [[OFFSET]], [[BASE]]
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; CHECK-NEXT: ret i1 [[TMP1]]
@@ -722,7 +722,7 @@ define i1 @t13_logical(i64 %base, i64* nonnull %offsetptr) {
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; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]])
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; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ugt i64 [[OFFSET]], [[BASE]]
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; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
725-
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp eq i64 [[ADJUSTED]], 0
725+
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp eq i64 [[OFFSET]], [[BASE]]
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; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
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; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i64 [[OFFSET]], [[BASE]]
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; CHECK-NEXT: ret i1 [[TMP1]]
@@ -745,7 +745,7 @@ define i1 @t14_bad(i64 %base, i64 %offset) {
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; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]])
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; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ult i64 [[ADJUSTED]], [[BASE]]
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; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
748-
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[ADJUSTED]], 0
748+
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[BASE]], [[OFFSET]]
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; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
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; CHECK-NEXT: [[R:%.*]] = and i1 [[NOT_NULL]], [[NO_UNDERFLOW]]
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; CHECK-NEXT: ret i1 [[R]]
@@ -766,7 +766,7 @@ define i1 @t14_bad_logical(i64 %base, i64 %offset) {
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; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]])
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; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ult i64 [[ADJUSTED]], [[BASE]]
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; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
769-
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[ADJUSTED]], 0
769+
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[BASE]], [[OFFSET]]
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; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
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; CHECK-NEXT: [[R:%.*]] = and i1 [[NOT_NULL]], [[NO_UNDERFLOW]]
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; CHECK-NEXT: ret i1 [[R]]

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