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[RISCV] Mark Zacas as non-experimental (#109651)
The extension has been ratified for some time, but we kept it experimental (see #99898) due to <riscv-non-isa/riscv-elf-psabi-doc#444>. The ABI issue has been resolved by #101023 so I believe there's no known barrier to moving Zacas to non-experimental.
1 parent c92137e commit 614aeda

17 files changed

+57
-54
lines changed

‎clang/test/Driver/print-supported-extensions-riscv.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,7 @@
3535
// CHECK-NEXT: za64rs 1.0 'Za64rs' (Reservation Set Size of at Most 64 Bytes)
3636
// CHECK-NEXT: zaamo 1.0 'Zaamo' (Atomic Memory Operations)
3737
// CHECK-NEXT: zabha 1.0 'Zabha' (Byte and Halfword Atomic Memory Operations)
38+
// CHECK-NEXT: zacas 1.0 'Zacas' (Atomic Compare-And-Swap Instructions)
3839
// CHECK-NEXT: zalrsc 1.0 'Zalrsc' (Load-Reserved/Store-Conditional)
3940
// CHECK-NEXT: zama16b 1.0 'Zama16b' (Atomic 16-byte misaligned loads, stores and AMOs)
4041
// CHECK-NEXT: zawrs 1.0 'Zawrs' (Wait on Reservation Set)
@@ -171,7 +172,6 @@
171172
// CHECK-NEXT: Experimental extensions
172173
// CHECK-NEXT: zicfilp 1.0 'Zicfilp' (Landing pad)
173174
// CHECK-NEXT: zicfiss 1.0 'Zicfiss' (Shadow stack)
174-
// CHECK-NEXT: zacas 1.0 'Zacas' (Atomic Compare-And-Swap Instructions)
175175
// CHECK-NEXT: zalasr 0.1 'Zalasr' (Load-Acquire and Store-Release Instructions)
176176
// CHECK-NEXT: zvbc32e 0.7 'Zvbc32e' (Vector Carryless Multiplication with 32-bits elements)
177177
// CHECK-NEXT: zvkgs 0.7 'Zvkgs' (Vector-Scalar GCM instructions for Cryptography)

‎clang/test/Preprocessor/riscv-target-features.c

+9-9
Original file line numberDiff line numberDiff line change
@@ -87,6 +87,7 @@
8787
// CHECK-NOT: __riscv_za64rs {{.*$}}
8888
// CHECK-NOT: __riscv_zaamo {{.*$}}
8989
// CHECK-NOT: __riscv_zabha {{.*$}}
90+
// CHECK-NOT: __riscv_zacas {{.*$}}
9091
// CHECK-NOT: __riscv_zalrsc {{.*$}}
9192
// CHECK-NOT: __riscv_zama16b {{.*$}}
9293
// CHECK-NOT: __riscv_zawrs {{.*$}}
@@ -183,7 +184,6 @@
183184
// CHECK-NOT: __riscv_ssnpm{{.*$}}
184185
// CHECK-NOT: __riscv_sspm{{.*$}}
185186
// CHECK-NOT: __riscv_supm{{.*$}}
186-
// CHECK-NOT: __riscv_zacas {{.*$}}
187187
// CHECK-NOT: __riscv_zalasr {{.*$}}
188188
// CHECK-NOT: __riscv_zfbfmin {{.*$}}
189189
// CHECK-NOT: __riscv_zicfilp {{.*$}}
@@ -751,6 +751,14 @@
751751
// RUN: -o - | FileCheck --check-prefix=CHECK-ZABHA-EXT %s
752752
// CHECK-ZABHA-EXT: __riscv_zabha 1000000{{$}}
753753

754+
// RUN: %clang --target=riscv32 \
755+
// RUN: -march=rv32ia_zacas1p0 -E -dM %s \
756+
// RUN: -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
757+
// RUN: %clang --target=riscv64 \
758+
// RUN: -march=rv64ia_zacas1p0 -E -dM %s \
759+
// RUN: -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
760+
// CHECK-ZACAS-EXT: __riscv_zacas 1000000{{$}}
761+
754762
// RUN: %clang --target=riscv32 \
755763
// RUN: -march=rv32i_zalrsc1p0 -E -dM %s \
756764
// RUN: -o - | FileCheck --check-prefix=CHECK-ZALRSC-EXT %s
@@ -1630,14 +1638,6 @@
16301638
// CHECK-ZVKT-EXT: __riscv_zvkt 1000000{{$}}
16311639

16321640
// Experimental extensions
1633-
// RUN: %clang --target=riscv32 -menable-experimental-extensions \
1634-
// RUN: -march=rv32ia_zacas1p0 -E -dM %s \
1635-
// RUN: -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
1636-
// RUN: %clang --target=riscv64 -menable-experimental-extensions \
1637-
// RUN: -march=rv64ia_zacas1p0 -E -dM %s \
1638-
// RUN: -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
1639-
// CHECK-ZACAS-EXT: __riscv_zacas 1000000{{$}}
1640-
16411641
// RUN: %clang --target=riscv32 -menable-experimental-extensions \
16421642
// RUN: -march=rv32i_zalasr0p1 -E -dM %s \
16431643
// RUN: -o - | FileCheck --check-prefix=CHECK-ZALASR-EXT %s

‎llvm/docs/RISCVUsage.rst

+6-3
Original file line numberDiff line numberDiff line change
@@ -154,6 +154,7 @@ on support follow.
154154
``Za64rs`` Supported (`See note <#riscv-profiles-extensions-note>`__)
155155
``Zaamo`` Assembly Support
156156
``Zabha`` Supported
157+
``Zacas`` Supported (`See note<#riscv-zacas-note>`__)
157158
``Zalrsc`` Assembly Support
158159
``Zama16b`` Supported (`See note <#riscv-profiles-extensions-note>`__)
159160
``Zawrs`` Assembly Support
@@ -287,6 +288,11 @@ Supported
287288
``Za128rs``, ``Za64rs``, ``Zama16b``, ``Zic64b``, ``Ziccamoa``, ``Ziccif``, ``Zicclsm``, ``Ziccrse``, ``Shcounterenvw``, ``Shgatpa``, ``Shtvala``, ``Shvsatpa``, ``Shvstvala``, ``Shvstvecd``, ``Ssccptr``, ``Sscounterenw``, ``Ssstateen``, ``Ssstrict``, ``Sstvala``, ``Sstvecd``, ``Ssu64xl``, ``Svade``, ``Svbare``
288289
These extensions are defined as part of the `RISC-V Profiles specification <https://github.com/riscv/riscv-profiles/releases/tag/v1.0>`__. They do not introduce any new features themselves, but instead describe existing hardware features.
289290

291+
.. _riscv-zacas-note:
292+
293+
``Zacas``
294+
The compiler will not generate amocas.d on RV32 or amocas.q on RV64 due to ABI compatibilty. These can only be used in the assembler.
295+
290296
Atomics ABIs
291297
============
292298

@@ -304,9 +310,6 @@ The primary goal of experimental support is to assist in the process of ratifica
304310
``experimental-ssnpm``, ``experimental-smnpm``, ``experimental-smmpm``, ``experimental-sspm``, ``experimental-supm``
305311
LLVM implements the `v1.0.0-rc2 specification <https://github.com/riscv/riscv-j-extension/releases/tag/pointer-masking-v1.0.0-rc2>`__.
306312

307-
``experimental-zacas``
308-
LLVM implements the `1.0 release specification <https://github.com/riscvarchive/riscv-zacas/releases/tag/v1.0>`__. amocas.w will be used for i32 cmpxchg. amocas.d will be used i64 cmpxchg on RV64. The compiler will not generate amocas.d on RV32 or amocas.q on RV64 due to ABI compatibilty. These can only be used in the assembler. The extension will be left as experimental until `an ABI issue <https://github.com/riscv-non-isa/riscv-elf-psabi-doc/issues/444>`__ is resolved.
309-
310313
``experimental-zalasr``
311314
LLVM implements the `0.0.5 draft specification <https://github.com/mehnadnerd/riscv-zalasr>`__.
312315

‎llvm/docs/ReleaseNotes.rst

+1
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@@ -149,6 +149,7 @@ Changes to the RISC-V Backend
149149
* The ``Zvbc32e`` and ``Zvkgs`` extensions are now supported experimentally.
150150
* Added ``Smctr`` and ``Ssctr`` extensions.
151151
* ``-mcpu=syntacore-scr7`` was added.
152+
* The ``Zacas`` extension is no longer marked as experimental.
152153

153154
Changes to the WebAssembly Backend
154155
----------------------------------

‎llvm/lib/Target/RISCV/RISCVFeatures.td

+2-2
Original file line numberDiff line numberDiff line change
@@ -243,8 +243,8 @@ def HasStdExtZabha : Predicate<"Subtarget->hasStdExtZabha()">,
243243
"'Zabha' (Byte and Halfword Atomic Memory Operations)">;
244244

245245
def FeatureStdExtZacas
246-
: RISCVExperimentalExtension<"zacas", 1, 0,
247-
"'Zacas' (Atomic Compare-And-Swap Instructions)">,
246+
: RISCVExtension<"zacas", 1, 0,
247+
"'Zacas' (Atomic Compare-And-Swap Instructions)">,
248248
RISCVExtensionBitmask<0, 26>;
249249
def HasStdExtZacas : Predicate<"Subtarget->hasStdExtZacas()">,
250250
AssemblerPredicate<(all_of FeatureStdExtZacas),

‎llvm/lib/TargetParser/Host.cpp

+1-2
Original file line numberDiff line numberDiff line change
@@ -2040,8 +2040,7 @@ const StringMap<bool> sys::getHostCPUFeatures() {
20402040
Features["zvfhmin"] = ExtMask & (1ULL << 31); // RISCV_HWPROBE_EXT_ZVFHMIN
20412041
Features["zfa"] = ExtMask & (1ULL << 32); // RISCV_HWPROBE_EXT_ZFA
20422042
Features["ztso"] = ExtMask & (1ULL << 33); // RISCV_HWPROBE_EXT_ZTSO
2043-
// TODO: Re-enable zacas when it is marked non-experimental again.
2044-
// Features["zacas"] = ExtMask & (1ULL << 34); // RISCV_HWPROBE_EXT_ZACAS
2043+
Features["zacas"] = ExtMask & (1ULL << 34); // RISCV_HWPROBE_EXT_ZACAS
20452044
Features["zicond"] = ExtMask & (1ULL << 35); // RISCV_HWPROBE_EXT_ZICOND
20462045
Features["zihintpause"] =
20472046
ExtMask & (1ULL << 36); // RISCV_HWPROBE_EXT_ZIHINTPAUSE

‎llvm/test/CodeGen/RISCV/atomic-cmpxchg-branch-on-result.ll

+3-3
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@@ -1,13 +1,13 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc -mtriple=riscv32 -mattr=+a -verify-machineinstrs < %s \
33
; RUN: | FileCheck -check-prefixes=NOZACAS,RV32IA %s
4-
; RUN: llc -mtriple=riscv32 -mattr=+a,+experimental-zacas -verify-machineinstrs < %s \
4+
; RUN: llc -mtriple=riscv32 -mattr=+a,+zacas -verify-machineinstrs < %s \
55
; RUN: | FileCheck -check-prefixes=ZACAS,RV32IA-ZACAS %s
66
; RUN: llc -mtriple=riscv64 -mattr=+a -verify-machineinstrs < %s \
77
; RUN: | FileCheck -check-prefixes=NOZACAS,RV64IA %s
8-
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-zacas -verify-machineinstrs < %s \
8+
; RUN: llc -mtriple=riscv64 -mattr=+a,+zacas -verify-machineinstrs < %s \
99
; RUN: | FileCheck -check-prefixes=ZACAS,RV64IA-ZACAS %s
10-
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-zacas,+zabha -verify-machineinstrs < %s \
10+
; RUN: llc -mtriple=riscv64 -mattr=+a,+zacas,+zabha -verify-machineinstrs < %s \
1111
; RUN: | FileCheck -check-prefixes=ZACAS,RV64IA-ZABHA %s
1212

1313
; Test cmpxchg followed by a branch on the cmpxchg success value to see if the

‎llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll

+6-6
Original file line numberDiff line numberDiff line change
@@ -3,25 +3,25 @@
33
; RUN: | FileCheck -check-prefix=RV32I %s
44
; RUN: llc -mtriple=riscv32 -mattr=+a -verify-machineinstrs < %s \
55
; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-WMO %s
6-
; RUN: llc -mtriple=riscv32 -mattr=+a,+experimental-zacas -verify-machineinstrs < %s \
6+
; RUN: llc -mtriple=riscv32 -mattr=+a,+zacas -verify-machineinstrs < %s \
77
; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-ZACAS,RV32IA-WMO-ZACAS %s
88
; RUN: llc -mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs < %s \
99
; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-TSO %s
10-
; RUN: llc -mtriple=riscv32 -mattr=+a,+ztso,+experimental-zacas -verify-machineinstrs < %s \
10+
; RUN: llc -mtriple=riscv32 -mattr=+a,+ztso,+zacas -verify-machineinstrs < %s \
1111
; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-ZACAS,RV32IA-TSO-ZACAS %s
1212
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
1313
; RUN: | FileCheck -check-prefix=RV64I %s
1414
; RUN: llc -mtriple=riscv64 -mattr=+a -verify-machineinstrs < %s \
1515
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-WMO %s
16-
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-zacas -verify-machineinstrs < %s \
16+
; RUN: llc -mtriple=riscv64 -mattr=+a,+zacas -verify-machineinstrs < %s \
1717
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZACAS,RV64IA-WMO-ZACAS %s
18-
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-zacas,+zabha -verify-machineinstrs < %s \
18+
; RUN: llc -mtriple=riscv64 -mattr=+a,+zacas,+zabha -verify-machineinstrs < %s \
1919
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZABHA,RV64IA-WMO-ZABHA %s
2020
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso -verify-machineinstrs < %s \
2121
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-TSO %s
22-
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso,+experimental-zacas -verify-machineinstrs < %s \
22+
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso,+zacas -verify-machineinstrs < %s \
2323
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZACAS,RV64IA-TSO-ZACAS %s
24-
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso,+experimental-zacas,+zabha -verify-machineinstrs < %s \
24+
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso,+zacas,+zabha -verify-machineinstrs < %s \
2525
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZABHA,RV64IA-TSO-ZABHA %s
2626

2727
define void @cmpxchg_i8_monotonic_monotonic(ptr %ptr, i8 %cmp, i8 %val) nounwind {

‎llvm/test/CodeGen/RISCV/atomic-rmw.ll

+6-6
Original file line numberDiff line numberDiff line change
@@ -12,22 +12,22 @@
1212
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso -verify-machineinstrs < %s \
1313
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-NOZACAS,RV64IA-TSO,RV64IA-TSO-NOZACAS %s
1414

15-
; RUN: llc -mtriple=riscv32 -mattr=+a,+experimental-zacas -verify-machineinstrs < %s \
15+
; RUN: llc -mtriple=riscv32 -mattr=+a,+zacas -verify-machineinstrs < %s \
1616
; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-ZACAS,RV32IA-WMO,RV32IA-WMO-ZACAS %s
17-
; RUN: llc -mtriple=riscv32 -mattr=+a,+ztso,+experimental-zacas -verify-machineinstrs < %s \
17+
; RUN: llc -mtriple=riscv32 -mattr=+a,+ztso,+zacas -verify-machineinstrs < %s \
1818
; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-ZACAS,RV32IA-TSO,RV32IA-TSO-ZACAS %s
19-
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-zacas -verify-machineinstrs < %s \
19+
; RUN: llc -mtriple=riscv64 -mattr=+a,+zacas -verify-machineinstrs < %s \
2020
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZACAS,RV64IA-WMO,RV64IA-WMO-ZACAS %s
21-
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso,+experimental-zacas -verify-machineinstrs < %s \
21+
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso,+zacas -verify-machineinstrs < %s \
2222
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZACAS,RV64IA-TSO,RV64IA-TSO-ZACAS %s
2323

2424
; RUN: llc -mtriple=riscv64 -mattr=+a,+zabha -verify-machineinstrs < %s \
2525
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-WMO,RV64IA-WMO-ZABHA,RV64IA-WMO-ZABHA-NOZACAS %s
2626
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso,+zabha -verify-machineinstrs < %s \
2727
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-TSO,RV64IA-TSO-ZABHA,RV64IA-TSO-ZABHA-NOZACAS %s
28-
; RUN: llc -mtriple=riscv64 -mattr=+a,+zabha,+experimental-zacas -verify-machineinstrs < %s \
28+
; RUN: llc -mtriple=riscv64 -mattr=+a,+zabha,+zacas -verify-machineinstrs < %s \
2929
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-WMO,RV64IA-WMO-ZABHA,RV64IA-WMO-ZABHA-ZACAS %s
30-
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso,+zabha,+experimental-zacas -verify-machineinstrs < %s \
30+
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso,+zabha,+zacas -verify-machineinstrs < %s \
3131
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-TSO,RV64IA-TSO-ZABHA,RV64IA-TSO-ZABHA-ZACAS %s
3232

3333
define i8 @atomicrmw_xchg_i8_monotonic(ptr %a, i8 %b) nounwind {

‎llvm/test/CodeGen/RISCV/atomic-signext.ll

+2-2
Original file line numberDiff line numberDiff line change
@@ -3,13 +3,13 @@
33
; RUN: | FileCheck -check-prefix=RV32I %s
44
; RUN: llc -mtriple=riscv32 -mattr=+a -verify-machineinstrs < %s \
55
; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-NOZACAS %s
6-
; RUN: llc -mtriple=riscv32 -mattr=+a,+experimental-zacas -verify-machineinstrs < %s \
6+
; RUN: llc -mtriple=riscv32 -mattr=+a,+zacas -verify-machineinstrs < %s \
77
; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-ZACAS %s
88
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
99
; RUN: | FileCheck -check-prefix=RV64I %s
1010
; RUN: llc -mtriple=riscv64 -mattr=+a -verify-machineinstrs < %s \
1111
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-NOZACAS %s
12-
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-zacas -verify-machineinstrs < %s \
12+
; RUN: llc -mtriple=riscv64 -mattr=+a,+zacas -verify-machineinstrs < %s \
1313
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZACAS %s
1414

1515
define signext i8 @atomic_load_i8_unordered(ptr %a) nounwind {

‎llvm/test/CodeGen/RISCV/attributes.ll

+2-2
Original file line numberDiff line numberDiff line change
@@ -121,7 +121,7 @@
121121
; RUN: llc -mtriple=riscv32 -mattr=+zfbfmin %s -o - | FileCheck --check-prefixes=CHECK,RV32ZFBFMIN %s
122122
; RUN: llc -mtriple=riscv32 -mattr=+zvfbfmin %s -o - | FileCheck --check-prefixes=CHECK,RV32ZVFBFMIN %s
123123
; RUN: llc -mtriple=riscv32 -mattr=+zvfbfwma %s -o - | FileCheck --check-prefixes=CHECK,RV32ZVFBFWMA %s
124-
; RUN: llc -mtriple=riscv32 -mattr=+a,+experimental-zacas %s -o - | FileCheck --check-prefix=RV32ZACAS %s
124+
; RUN: llc -mtriple=riscv32 -mattr=+a,+zacas %s -o - | FileCheck --check-prefix=RV32ZACAS %s
125125
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zalasr %s -o - | FileCheck --check-prefix=RV32ZALASR %s
126126
; RUN: llc -mtriple=riscv32 -mattr=+zama16b %s -o - | FileCheck --check-prefixes=CHECK,RV32ZAMA16B %s
127127
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zicfilp %s -o - | FileCheck --check-prefix=RV32ZICFILP %s
@@ -264,7 +264,7 @@
264264
; RUN: llc -mtriple=riscv64 -mattr=+zfbfmin %s -o - | FileCheck --check-prefixes=CHECK,RV64ZFBFMIN %s
265265
; RUN: llc -mtriple=riscv64 -mattr=+zvfbfmin %s -o - | FileCheck --check-prefixes=CHECK,RV64ZVFBFMIN %s
266266
; RUN: llc -mtriple=riscv64 -mattr=+zvfbfwma %s -o - | FileCheck --check-prefixes=CHECK,RV64ZVFBFWMA %s
267-
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-zacas %s -o - | FileCheck --check-prefix=RV64ZACAS %s
267+
; RUN: llc -mtriple=riscv64 -mattr=+a,+zacas %s -o - | FileCheck --check-prefix=RV64ZACAS %s
268268
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zalasr %s -o - | FileCheck --check-prefix=RV64ZALASR %s
269269
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zicfilp %s -o - | FileCheck --check-prefix=RV64ZICFILP %s
270270
; RUN: llc -mtriple=riscv64 -mattr=+a,+zabha %s -o - | FileCheck --check-prefix=RV64ZABHA %s

‎llvm/test/MC/RISCV/rv32zacas-invalid.s

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
# RUN: not llvm-mc -triple riscv32 -mattr=+a,+experimental-zacas < %s 2>&1 | FileCheck %s
1+
# RUN: not llvm-mc -triple riscv32 -mattr=+a,+zacas < %s 2>&1 | FileCheck %s
22

33
# Non-zero offsets not supported for the third operand (rs1).
44
amocas.w a1, a3, 1(a5) # CHECK: :[[@LINE]]:18: error: optional integer offset must be 0

‎llvm/test/MC/RISCV/rv32zacas-valid.s

+6-6
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@@ -1,12 +1,12 @@
1-
# RUN: llvm-mc %s -triple=riscv32 -mattr=+a,+experimental-zacas -riscv-no-aliases -show-encoding \
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+a,+zacas -riscv-no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
3-
# RUN: llvm-mc %s -triple=riscv64 -mattr=+a,+experimental-zacas -riscv-no-aliases -show-encoding \
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# RUN: llvm-mc %s -triple=riscv64 -mattr=+a,+zacas -riscv-no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
5-
# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+a,+experimental-zacas < %s \
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# RUN: | llvm-objdump --mattr=+a,+experimental-zacas -M no-aliases -d -r - \
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# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+a,+zacas < %s \
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# RUN: | llvm-objdump --mattr=+a,+zacas -M no-aliases -d -r - \
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# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
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# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+a,+experimental-zacas < %s \
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# RUN: | llvm-objdump --mattr=+a,+experimental-zacas -M no-aliases -d -r - \
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# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+a,+zacas < %s \
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# RUN: | llvm-objdump --mattr=+a,+zacas -M no-aliases -d -r - \
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# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
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# RUN: not llvm-mc -triple=riscv32 -mattr=+a -show-encoding %s 2>&1 \
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# RUN: | FileCheck %s --check-prefix=CHECK-ERROR

‎llvm/test/MC/RISCV/rv64zacas-invalid.s

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Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
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# RUN: not llvm-mc -triple riscv64 -mattr=+a,+experimental-zacas < %s 2>&1 | FileCheck %s
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# RUN: not llvm-mc -triple riscv64 -mattr=+a,+zacas < %s 2>&1 | FileCheck %s
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# Non-zero offsets not supported for the third operand (rs1).
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amocas.w a1, a3, 1(a5) # CHECK: :[[@LINE]]:18: error: optional integer offset must be 0

‎llvm/test/MC/RISCV/rv64zacas-valid.s

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@@ -1,7 +1,7 @@
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# RUN: llvm-mc %s -triple=riscv64 -mattr=+a,+experimental-zacas -riscv-no-aliases -show-encoding \
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# RUN: llvm-mc %s -triple=riscv64 -mattr=+a,+zacas -riscv-no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
3-
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+a,+experimental-zacas < %s \
4-
# RUN: | llvm-objdump --mattr=+a,+experimental-zacas -M no-aliases -d -r - \
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# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+a,+zacas < %s \
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# RUN: | llvm-objdump --mattr=+a,+zacas -M no-aliases -d -r - \
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# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
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# RUN: not llvm-mc -triple=riscv64 -mattr=+a -show-encoding %s 2>&1 \
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# RUN: | FileCheck %s --check-prefix=CHECK-ERROR

‎llvm/test/MC/RISCV/rvzabha-zacas-valid.s

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Original file line numberDiff line numberDiff line change
@@ -1,12 +1,12 @@
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+a,+zabha,+experimental-zacas -riscv-no-aliases -show-encoding \
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+a,+zabha,+zacas -riscv-no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
3-
# RUN: llvm-mc %s -triple=riscv64 -mattr=+a,+zabha,+experimental-zacas -riscv-no-aliases -show-encoding \
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# RUN: llvm-mc %s -triple=riscv64 -mattr=+a,+zabha,+zacas -riscv-no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
5-
# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+a,+zabha,+experimental-zacas < %s \
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# RUN: | llvm-objdump --mattr=+a,+zabha,+experimental-zacas -M no-aliases -d -r - \
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# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+a,+zabha,+zacas < %s \
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# RUN: | llvm-objdump --mattr=+a,+zabha,+zacas -M no-aliases -d -r - \
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# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
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# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+a,+zabha,+experimental-zacas < %s \
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# RUN: | llvm-objdump --mattr=+a,+zabha,+experimental-zacas -M no-aliases -d -r - \
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# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+a,+zabha,+zacas < %s \
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# RUN: | llvm-objdump --mattr=+a,+zabha,+zacas -M no-aliases -d -r - \
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# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
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# RUN: not llvm-mc -triple=riscv32 -mattr=+a,+zabha -show-encoding %s 2>&1 \
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# RUN: | FileCheck %s --check-prefix=CHECK-ERROR

‎llvm/unittests/TargetParser/RISCVISAInfoTest.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -980,6 +980,7 @@ R"(All available -march extensions for RISC-V
980980
za64rs 1.0
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zaamo 1.0
982982
zabha 1.0
983+
zacas 1.0
983984
zalrsc 1.0
984985
zama16b 1.0
985986
zawrs 1.0
@@ -1116,7 +1117,6 @@ R"(All available -march extensions for RISC-V
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Experimental extensions
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zicfilp 1.0 This is a long dummy description
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zicfiss 1.0
1119-
zacas 1.0
11201120
zalasr 0.1
11211121
zvbc32e 0.7
11221122
zvkgs 0.7

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