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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
1 | 2 | ; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc | FileCheck %s -check-prefix=X64
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2 | 3 | ; Control Flow Guard is currently only available on Windows
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3 | 4 |
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4 | 5 |
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5 | 6 | ; Test that Control Flow Guard checks are correctly added for x86_64 vector calls.
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6 | 7 | define void @func_cf_vector_x64(ptr %0, ptr %1) #0 {
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| 8 | +; X64-LABEL: func_cf_vector_x64: |
| 9 | +; X64: # %bb.0: # %entry |
| 10 | +; X64-NEXT: subq $72, %rsp |
| 11 | +; X64-NEXT: .seh_stackalloc 72 |
| 12 | +; X64-NEXT: .seh_endprologue |
| 13 | +; X64-NEXT: movq %rcx, %rax |
| 14 | +; X64-NEXT: movups (%rdx), %xmm0 |
| 15 | +; X64-NEXT: movups 16(%rdx), %xmm1 |
| 16 | +; X64-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp) |
| 17 | +; X64-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) |
| 18 | +; X64-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero |
| 19 | +; X64-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero |
| 20 | +; X64-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero |
| 21 | +; X64-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero |
| 22 | +; X64-NEXT: callq *__guard_dispatch_icall_fptr(%rip) |
| 23 | +; X64-NEXT: nop |
| 24 | +; X64-NEXT: addq $72, %rsp |
| 25 | +; X64-NEXT: retq |
| 26 | +; X64-NEXT: .seh_endproc |
7 | 27 | entry:
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8 | 28 | %2 = alloca %struct.HVA, align 8
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9 | 29 | call void @llvm.memcpy.p0.p0.i64(ptr align 8 %2, ptr align 8 %1, i64 32, i1 false)
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10 | 30 | %3 = load %struct.HVA, ptr %2, align 8
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11 | 31 | call x86_vectorcallcc void %0(%struct.HVA inreg %3)
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12 | 32 | ret void
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13 | 33 |
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14 |
| - ; X64-LABEL: func_cf_vector_x64 |
15 |
| - ; X64: movq %rcx, %rax |
16 |
| - ; X64: movups (%rdx), %xmm0 |
17 |
| - ; X64: movups 16(%rdx), %xmm1 |
18 |
| - ; X64: movaps %xmm0, 32(%rsp) |
19 |
| - ; X64: movaps %xmm1, 48(%rsp) |
20 |
| - ; X64: movsd 32(%rsp), %xmm0 # xmm0 = mem[0],zero |
21 |
| - ; X64: movsd 40(%rsp), %xmm1 # xmm1 = mem[0],zero |
22 |
| - ; X64: movsd 48(%rsp), %xmm2 # xmm2 = mem[0],zero |
23 |
| - ; X64: movsd 56(%rsp), %xmm3 # xmm3 = mem[0],zero |
24 |
| - ; X64: callq *__guard_dispatch_icall_fptr(%rip) |
25 |
| - ; X64-NOT: callq |
26 | 34 | }
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27 | 35 | attributes #0 = { "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" }
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28 | 36 |
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