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[PowerPC] Enhance the fast selection of cmp instruction and clean up related asserts
Fast selection of llvm icmp and fcmp instructions is not handled well about VSX instruction support. We'd use VSX float comparison instruction instead of non-vsx float comparison instruction if the operand register class is VSSRC or VSFRC because i32 and i64 are mapped to VSSRC and VSFRC correspondingly if VSX feature is opened. If the target does not have corresponding VSX instruction comparison for some type, just copy VSX-related register to common float register class and use non-vsx comparison instruction. Differential Revision: https://reviews.llvm.org/D57078 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352174 91177308-0d34-0410-b5e6-96231b3b80d8
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2 files changed

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-31
lines changed

2 files changed

+163
-31
lines changed

‎lib/Target/PowerPC/PPCFastISel.cpp

Lines changed: 12 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -873,7 +873,10 @@ bool PPCFastISel::PPCEmitCmp(const Value *SrcValue1, const Value *SrcValue2,
873873

874874
unsigned CmpOpc;
875875
bool NeedsExt = false;
876-
auto RC = MRI.getRegClass(SrcReg1);
876+
877+
auto RC1 = MRI.getRegClass(SrcReg1);
878+
auto RC2 = SrcReg2 != 0 ? MRI.getRegClass(SrcReg2) : nullptr;
879+
877880
switch (SrcVT.SimpleTy) {
878881
default: return false;
879882
case MVT::f32:
@@ -892,12 +895,18 @@ bool PPCFastISel::PPCEmitCmp(const Value *SrcValue1, const Value *SrcValue2,
892895
}
893896
} else {
894897
CmpOpc = PPC::FCMPUS;
895-
if (isVSSRCRegClass(RC)) {
898+
if (isVSSRCRegClass(RC1)) {
896899
unsigned TmpReg = createResultReg(&PPC::F4RCRegClass);
897900
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
898901
TII.get(TargetOpcode::COPY), TmpReg).addReg(SrcReg1);
899902
SrcReg1 = TmpReg;
900903
}
904+
if (RC2 && isVSSRCRegClass(RC2)) {
905+
unsigned TmpReg = createResultReg(&PPC::F4RCRegClass);
906+
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
907+
TII.get(TargetOpcode::COPY), TmpReg).addReg(SrcReg2);
908+
SrcReg2 = TmpReg;
909+
}
901910
}
902911
break;
903912
case MVT::f64:
@@ -914,7 +923,7 @@ bool PPCFastISel::PPCEmitCmp(const Value *SrcValue1, const Value *SrcValue2,
914923
CmpOpc = PPC::EFDCMPGT;
915924
break;
916925
}
917-
} else if (isVSFRCRegClass(RC)) {
926+
} else if (isVSFRCRegClass(RC1) || (RC2 && isVSFRCRegClass(RC2))) {
918927
CmpOpc = PPC::XSCMPUDP;
919928
} else {
920929
CmpOpc = PPC::FCMPUD;

‎test/CodeGen/PowerPC/fast-isel-cmp-imm.ll

Lines changed: 151 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -1,17 +1,21 @@
1-
; FIXME: FastISel currently returns false if it hits code that uses VSX
2-
; registers and with -fast-isel-abort=1 turned on the test case will then fail.
3-
; When fastisel better supports VSX fix up this test case.
4-
;
51
; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck %s --check-prefix=ELF64
2+
; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64le-unknown-linux-gnu -mattr=+vsx | FileCheck %s --check-prefix=VSX
63
; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc-unknown-linux-gnu -mcpu=e500 -mattr=spe | FileCheck %s --check-prefix=SPE
4+
5+
declare void @foo()
6+
77
define void @t1a(float %a) nounwind {
88
entry:
9-
; ELF64: t1a
10-
; SPE: t1a
9+
; ELF64-LABEL: @t1a
10+
; SPE-LABEL: @t1a
11+
; VSX-LABEL: @t1a
1112
%cmp = fcmp oeq float %a, 0.000000e+00
1213
; ELF64: addis
1314
; ELF64: lfs
1415
; ELF64: fcmpu
16+
; VSX: addis
17+
; VSX: lfs
18+
; VSX: fcmpu
1519
; SPE: efscmpeq
1620
br i1 %cmp, label %if.then, label %if.end
1721

@@ -23,16 +27,41 @@ if.end: ; preds = %if.then, %entry
2327
ret void
2428
}
2529

26-
declare void @foo()
27-
2830
define void @t1b(float %a) nounwind {
2931
entry:
30-
; ELF64: t1b
31-
; SPE: t1b
32+
; ELF64-LABEL: @t1b
33+
; SPE-LABEL: @t1b
34+
; VSX-LABEL: @t1b
3235
%cmp = fcmp oeq float %a, -0.000000e+00
3336
; ELF64: addis
3437
; ELF64: lfs
3538
; ELF64: fcmpu
39+
; VSX: addis
40+
; VSX: lfs
41+
; VSX: fcmpu
42+
; SPE: efscmpeq
43+
br i1 %cmp, label %if.then, label %if.end
44+
45+
if.then: ; preds = %entry
46+
call void @foo()
47+
br label %if.end
48+
49+
if.end: ; preds = %if.then, %entry
50+
ret void
51+
}
52+
53+
define void @t1c(float %a) nounwind {
54+
entry:
55+
; ELF64-LABEL: @t1c
56+
; SPE-LABEL: @t1c
57+
; VSX-LABEL: @t1c
58+
%cmp = fcmp oeq float -0.000000e+00, %a
59+
; ELF64: addis
60+
; ELF64: lfs
61+
; ELF64: fcmpu
62+
; VSX: addis
63+
; VSX: lfs
64+
; VSX: fcmpu
3665
; SPE: efscmpeq
3766
br i1 %cmp, label %if.then, label %if.end
3867

@@ -46,12 +75,16 @@ if.end: ; preds = %if.then, %entry
4675

4776
define void @t2a(double %a) nounwind {
4877
entry:
49-
; ELF64: t2a
50-
; SPE: t2a
78+
; ELF64-LABEL: @t2a
79+
; SPE-LABEL: @t2a
80+
; VSX-LABEL: @t2a
5181
%cmp = fcmp oeq double %a, 0.000000e+00
5282
; ELF64: addis
5383
; ELF64: lfd
5484
; ELF64: fcmpu
85+
; VSX: addis
86+
; VSX: lfd
87+
; VSX: xscmpudp
5588
; SPE: efdcmpeq
5689
br i1 %cmp, label %if.then, label %if.end
5790

@@ -65,12 +98,39 @@ if.end: ; preds = %if.then, %entry
6598

6699
define void @t2b(double %a) nounwind {
67100
entry:
68-
; ELF64: t2b
69-
; SPE: t2b
101+
; ELF64-LABEL: @t2b
102+
; SPE-LABEL: @t2b
103+
; VSX-LABEL: @t2b
70104
%cmp = fcmp oeq double %a, -0.000000e+00
71105
; ELF64: addis
72106
; ELF64: lfd
73107
; ELF64: fcmpu
108+
; VSX: addis
109+
; VSX: lfd
110+
; VSX: xscmpudp
111+
; SPE: efdcmpeq
112+
br i1 %cmp, label %if.then, label %if.end
113+
114+
if.then: ; preds = %entry
115+
call void @foo()
116+
br label %if.end
117+
118+
if.end: ; preds = %if.then, %entry
119+
ret void
120+
}
121+
122+
define void @t2c(double %a) nounwind {
123+
entry:
124+
; ELF64-LABEL: @t2c
125+
; SPE-LABEL: @t2c
126+
; VSX-LABEL: @t2c
127+
%cmp = fcmp oeq double -0.000000e+00, %a
128+
; ELF64: addis
129+
; ELF64: lfd
130+
; ELF64: fcmpu
131+
; VSX: addis
132+
; VSX: lfd
133+
; VSX: xscmpudp
74134
; SPE: efdcmpeq
75135
br i1 %cmp, label %if.then, label %if.end
76136

@@ -84,7 +144,7 @@ if.end: ; preds = %if.then, %entry
84144

85145
define void @t4(i8 signext %a) nounwind {
86146
entry:
87-
; ELF64: t4
147+
; ELF64-LABEL: @t4
88148
%cmp = icmp eq i8 %a, -1
89149
; ELF64: extsb
90150
; ELF64: cmpwi
@@ -100,7 +160,7 @@ if.end: ; preds = %if.then, %entry
100160

101161
define void @t5(i8 zeroext %a) nounwind {
102162
entry:
103-
; ELF64: t5
163+
; ELF64-LABEL: @t5
104164
%cmp = icmp eq i8 %a, 1
105165
; ELF64: extsb
106166
; ELF64: cmpwi
@@ -114,9 +174,25 @@ if.end: ; preds = %if.then, %entry
114174
ret void
115175
}
116176

177+
define void @t5a(i8 zeroext %a) nounwind {
178+
entry:
179+
; ELF64-LABEL: @t5a
180+
%cmp = icmp eq i8 1, %a
181+
; ELF64: extsb
182+
; ELF64: cmpw
183+
br i1 %cmp, label %if.then, label %if.end
184+
185+
if.then: ; preds = %entry
186+
call void @foo()
187+
br label %if.end
188+
189+
if.end: ; preds = %if.then, %entry
190+
ret void
191+
}
192+
117193
define void @t6(i16 signext %a) nounwind {
118194
entry:
119-
; ELF64: t6
195+
; ELF64-LABEL: @t6
120196
%cmp = icmp eq i16 %a, -1
121197
; ELF64: extsh
122198
; ELF64: cmpwi
@@ -132,7 +208,7 @@ if.end: ; preds = %if.then, %entry
132208

133209
define void @t7(i16 zeroext %a) nounwind {
134210
entry:
135-
; ELF64: t7
211+
; ELF64-LABEL: @t7
136212
%cmp = icmp eq i16 %a, 1
137213
; ELF64: extsh
138214
; ELF64: cmpwi
@@ -146,9 +222,25 @@ if.end: ; preds = %if.then, %entry
146222
ret void
147223
}
148224

225+
define void @t7a(i16 zeroext %a) nounwind {
226+
entry:
227+
; ELF64-LABEL: @t7a
228+
%cmp = icmp eq i16 1, %a
229+
; ELF64: extsh
230+
; ELF64: cmpw
231+
br i1 %cmp, label %if.then, label %if.end
232+
233+
if.then: ; preds = %entry
234+
call void @foo()
235+
br label %if.end
236+
237+
if.end: ; preds = %if.then, %entry
238+
ret void
239+
}
240+
149241
define void @t8(i32 %a) nounwind {
150242
entry:
151-
; ELF64: t8
243+
; ELF64-LABEL: @t8
152244
%cmp = icmp eq i32 %a, -1
153245
; ELF64: cmpwi
154246
br i1 %cmp, label %if.then, label %if.end
@@ -163,7 +255,7 @@ if.end: ; preds = %if.then, %entry
163255

164256
define void @t9(i32 %a) nounwind {
165257
entry:
166-
; ELF64: t9
258+
; ELF64-LABEL: @t9
167259
%cmp = icmp eq i32 %a, 1
168260
; ELF64: cmpwi
169261
br i1 %cmp, label %if.then, label %if.end
@@ -178,7 +270,7 @@ if.end: ; preds = %if.then, %entry
178270

179271
define void @t10(i32 %a) nounwind {
180272
entry:
181-
; ELF64: t10
273+
; ELF64-LABEL: @t10
182274
%cmp = icmp eq i32 %a, 384
183275
; ELF64: cmpwi
184276
br i1 %cmp, label %if.then, label %if.end
@@ -193,7 +285,7 @@ if.end: ; preds = %if.then, %entry
193285

194286
define void @t11(i32 %a) nounwind {
195287
entry:
196-
; ELF64: t11
288+
; ELF64-LABEL: @t11
197289
%cmp = icmp eq i32 %a, 4096
198290
; ELF64: cmpwi
199291
br i1 %cmp, label %if.then, label %if.end
@@ -206,9 +298,24 @@ if.end: ; preds = %if.then, %entry
206298
ret void
207299
}
208300

301+
define void @t11a(i32 %a) nounwind {
302+
entry:
303+
; ELF64-LABEL: @t11a
304+
%cmp = icmp eq i32 4096, %a
305+
; ELF64: cmpw
306+
br i1 %cmp, label %if.then, label %if.end
307+
308+
if.then: ; preds = %entry
309+
call void @foo()
310+
br label %if.end
311+
312+
if.end: ; preds = %if.then, %entry
313+
ret void
314+
}
315+
209316
define void @t12(i8 %a) nounwind {
210317
entry:
211-
; ELF64: t12
318+
; ELF64-LABEL: @t12
212319
%cmp = icmp ugt i8 %a, -113
213320
; ELF64: clrlwi
214321
; ELF64: cmplwi
@@ -224,7 +331,7 @@ if.end: ; preds = %if.then, %entry
224331

225332
define void @t13() nounwind ssp {
226333
entry:
227-
; ELF64: t13
334+
; ELF64-LABEL: @t13
228335
%cmp = icmp slt i32 -123, -2147483648
229336
; ELF64: li
230337
; ELF64: lis
@@ -240,7 +347,7 @@ if.end: ; preds = %entry
240347

241348
define void @t14(i64 %a) nounwind {
242349
entry:
243-
; ELF64: t14
350+
; ELF64-LABEL: @t14
244351
%cmp = icmp eq i64 %a, -1
245352
; ELF64: cmpdi
246353
br i1 %cmp, label %if.then, label %if.end
@@ -255,7 +362,7 @@ if.end: ; preds = %if.then, %entry
255362

256363
define void @t15(i64 %a) nounwind {
257364
entry:
258-
; ELF64: t15
365+
; ELF64-LABEL: @t15
259366
%cmp = icmp eq i64 %a, 1
260367
; ELF64: cmpdi
261368
br i1 %cmp, label %if.then, label %if.end
@@ -270,7 +377,7 @@ if.end: ; preds = %if.then, %entry
270377

271378
define void @t16(i64 %a) nounwind {
272379
entry:
273-
; ELF64: t16
380+
; ELF64-LABEL: @t16
274381
%cmp = icmp eq i64 %a, 384
275382
; ELF64: cmpdi
276383
br i1 %cmp, label %if.then, label %if.end
@@ -285,7 +392,7 @@ if.end: ; preds = %if.then, %entry
285392

286393
define void @t17(i64 %a) nounwind {
287394
entry:
288-
; ELF64: t17
395+
; ELF64-LABEL: @t17
289396
%cmp = icmp eq i64 %a, 32768
290397
; Extra operand so we don't match on cmpdi.
291398
; ELF64: cmpd {{[0-9]+}}
@@ -299,3 +406,19 @@ if.end: ; preds = %if.then, %entry
299406
ret void
300407
}
301408

409+
define void @t17a(i64 %a) nounwind {
410+
entry:
411+
; ELF64-LABEL: @t17a
412+
%cmp = icmp eq i64 32768, %a
413+
; Extra operand so we don't match on cmpdi.
414+
; ELF64: cmpd {{[0-9]+}}
415+
br i1 %cmp, label %if.then, label %if.end
416+
417+
if.then: ; preds = %entry
418+
call void @foo()
419+
br label %if.end
420+
421+
if.end: ; preds = %if.then, %entry
422+
ret void
423+
}
424+

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