@@ -90,6 +90,19 @@ static void generic_compute_matrix(
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bool measure_directconnect,
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const std::set<std::string>& allowed_types);
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+ static void generic_compute_matrix_expand (
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+ const RouterDelayProfiler& route_profiler,
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+ vtr::Matrix<std::vector<float >>& matrix,
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+ int source_x,
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+ int source_y,
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+ int start_x,
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+ int start_y,
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+ int end_x,
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+ int end_y,
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+ const t_router_opts& router_opts,
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+ bool measure_directconnect,
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+ const std::set<std::string>& allowed_types);
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+
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static vtr::Matrix<float > compute_delta_delays (
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const RouterDelayProfiler& route_profiler,
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const t_placer_opts& palcer_opts,
@@ -340,6 +353,151 @@ static float route_connection_delay(
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return (net_delay_value);
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}
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+ static void add_delay_to_matrix (
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+ vtr::Matrix<std::vector<float >>* matrix,
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+ int delta_x,
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+ int delta_y,
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+ float delay) {
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+ if ((*matrix)[delta_x][delta_y].size () == 1 && (*matrix)[delta_x][delta_y][0 ] == EMPTY_DELTA) {
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+ // Overwrite empty delta
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+ (*matrix)[delta_x][delta_y][0 ] = delay;
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+ } else {
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+ // Collect delta
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+ (*matrix)[delta_x][delta_y].push_back (delay);
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+ }
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+ }
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+
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+ static void generic_compute_matrix_expand (
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+ const RouterDelayProfiler& route_profiler,
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+ vtr::Matrix<std::vector<float >>& matrix,
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+ int source_x,
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+ int source_y,
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+ int start_x,
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+ int start_y,
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+ int end_x,
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+ int end_y,
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+ const t_router_opts& router_opts,
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+ bool measure_directconnect,
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+ const std::set<std::string>& allowed_types) {
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+ auto & device_ctx = g_vpr_ctx.device ();
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+
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+ t_physical_tile_type_ptr src_type = device_ctx.grid [source_x][source_y].type ;
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+ bool is_allowed_type = allowed_types.empty () || allowed_types.find (src_type->name ) != allowed_types.end ();
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+ if (src_type == device_ctx.EMPTY_PHYSICAL_TILE_TYPE || !is_allowed_type) {
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+ for (int sink_x = start_x; sink_x <= end_x; sink_x++) {
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+ for (int sink_y = start_y; sink_y <= end_y; sink_y++) {
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+ int delta_x = abs (sink_x - source_x);
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+ int delta_y = abs (sink_y - source_y);
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+
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+ if (matrix[delta_x][delta_y].empty ()) {
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+ // Only set empty target if we don't already have a valid delta delay
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+ matrix[delta_x][delta_y].push_back (EMPTY_DELTA);
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+ #ifdef VERBOSE
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+ VTR_LOG (" Computed delay: %12s delta: %d,%d (src: %d,%d sink: %d,%d)\n " ,
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+ " EMPTY" ,
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+ delta_x, delta_y,
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+ source_x, source_y,
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+ sink_x, sink_y);
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+ #endif
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+ }
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+ }
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+ }
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+
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+ return ;
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+ }
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+
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+ vtr::Matrix<bool > found_matrix ({matrix.dim_size (0 ), matrix.dim_size (1 )}, false );
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+
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+ auto best_driver_ptcs = get_best_classes (DRIVER, device_ctx.grid [source_x][source_y].type );
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+ for (int driver_ptc : best_driver_ptcs) {
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+ VTR_ASSERT (driver_ptc != OPEN);
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+ int source_rr_node = get_rr_node_index (device_ctx.rr_node_indices , source_x, source_y, SOURCE, driver_ptc);
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+ auto delays = calculate_all_path_delays_from_rr_node (source_rr_node, router_opts);
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+
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+ bool path_to_all_sinks = true ;
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+ for (int sink_x = start_x; sink_x <= end_x; sink_x++) {
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+ for (int sink_y = start_y; sink_y <= end_y; sink_y++) {
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+ int delta_x = abs (sink_x - source_x);
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+ int delta_y = abs (sink_y - source_y);
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+
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+ if (found_matrix[delta_x][delta_y]) {
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+ continue ;
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+ }
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+
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+ t_physical_tile_type_ptr sink_type = device_ctx.grid [sink_x][sink_y].type ;
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+ if (sink_type == device_ctx.EMPTY_PHYSICAL_TILE_TYPE ) {
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+ if (matrix[delta_x][delta_y].empty ()) {
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+ // Only set empty target if we don't already have a valid delta delay
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+ matrix[delta_x][delta_y].push_back (EMPTY_DELTA);
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+ #ifdef VERBOSE
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+ VTR_LOG (" Computed delay: %12s delta: %d,%d (src: %d,%d sink: %d,%d)\n " ,
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+ " EMPTY" ,
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+ delta_x, delta_y,
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+ source_x, source_y,
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+ sink_x, sink_y);
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+ #endif
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+ found_matrix[delta_x][delta_y] = true ;
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+ }
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+ } else {
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+ bool found_a_sink = false ;
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+ auto best_sink_ptcs = get_best_classes (RECEIVER, device_ctx.grid [sink_x][sink_y].type );
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+ for (int sink_ptc : best_sink_ptcs) {
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+ VTR_ASSERT (sink_ptc != OPEN);
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+
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+ int sink_rr_node = get_rr_node_index (device_ctx.rr_node_indices , sink_x, sink_y, SINK, sink_ptc);
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+
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+ VTR_ASSERT (sink_rr_node != OPEN);
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+
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+ if (!measure_directconnect && directconnect_exists (source_rr_node, sink_rr_node)) {
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+ // Skip if we shouldn't measure direct connects and a direct connect exists
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+ continue ;
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+ }
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+
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+ if (std::isnan (delays[sink_rr_node])) {
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+ // This sink was not found
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+ continue ;
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+ }
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+
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+ #ifdef VERBOSE
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+ VTR_LOG (" Computed delay: %12g delta: %d,%d (src: %d,%d sink: %d,%d)\n " ,
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+ delay,
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+ delta_x, delta_y,
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+ source_x, source_y,
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+ sink_x, sink_y);
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+ #endif
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+ found_matrix[delta_x][delta_y] = true ;
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+
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+ add_delay_to_matrix (&matrix, delta_x, delta_y, delays[sink_rr_node]);
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+
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+ found_a_sink = true ;
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+ break ;
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+ }
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+
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+ if (!found_a_sink) {
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+ path_to_all_sinks = false ;
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+ }
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+ }
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+ }
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+ }
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+
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+ if (path_to_all_sinks) {
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+ break ;
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+ }
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+ }
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+
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+ for (int sink_x = start_x; sink_x <= end_x; sink_x++) {
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+ for (int sink_y = start_y; sink_y <= end_y; sink_y++) {
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+ int delta_x = abs (sink_x - source_x);
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+ int delta_y = abs (sink_y - source_y);
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+ if (!found_matrix[delta_x][delta_y]) {
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+ add_delay_to_matrix (&matrix, delta_x, delta_y, IMPOSSIBLE_DELTA);
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+ VTR_LOG_WARN (" Unable to route between blocks at (%d,%d) and (%d,%d) to characterize delay (setting to %g)\n " ,
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+ source_x, source_y, sink_x, sink_y, IMPOSSIBLE_DELTA);
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+ }
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+ }
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+ }
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+ }
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+
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static void generic_compute_matrix (
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const RouterDelayProfiler& route_profiler,
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vtr::Matrix<std::vector<float >>& matrix,
@@ -426,8 +584,14 @@ static vtr::Matrix<float> compute_delta_delays(
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size_t low_x = std::min (longest_length, mid_x);
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size_t low_y = std::min (longest_length, mid_y);
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- size_t high_x = std::max (grid.width () - longest_length, mid_x);
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- size_t high_y = std::max (grid.height () - longest_length, mid_y);
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+ size_t high_x = mid_x;
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+ size_t high_y = mid_y;
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+ if (longest_length <= grid.width ()) {
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+ high_x = std::max (grid.width () - longest_length, mid_x);
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+ }
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+ if (longest_length <= grid.height ()) {
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+ high_y = std::max (grid.height () - longest_length, mid_y);
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+ }
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std::set<std::string> allowed_types;
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if (!placer_opts.allowed_tiles_for_delay_model .empty ()) {
@@ -488,12 +652,12 @@ static vtr::Matrix<float> compute_delta_delays(
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#ifdef VERBOSE
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VTR_LOG (" Computing from lower left edge (%d,%d):\n " , x, y);
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#endif
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- generic_compute_matrix (route_profiler, sampled_delta_delays,
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- x, y,
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- x, y,
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- grid.width () - 1 , grid.height () - 1 ,
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- router_opts,
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- measure_directconnect, allowed_types);
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+ generic_compute_matrix_expand (route_profiler, sampled_delta_delays,
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+ x, y,
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+ x, y,
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+ grid.width () - 1 , grid.height () - 1 ,
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+ router_opts,
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+ measure_directconnect, allowed_types);
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// Find the lowest x location on the bottom edge with a non-empty block
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src_type = nullptr ;
@@ -517,60 +681,60 @@ static vtr::Matrix<float> compute_delta_delays(
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#ifdef VERBOSE
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VTR_LOG (" Computing from left bottom edge (%d,%d):\n " , x, y);
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#endif
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- generic_compute_matrix (route_profiler, sampled_delta_delays,
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- x, y,
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- x, y,
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- grid.width () - 1 , grid.height () - 1 ,
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- router_opts,
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- measure_directconnect, allowed_types);
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+ generic_compute_matrix_expand (route_profiler, sampled_delta_delays,
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+ x, y,
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+ x, y,
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+ grid.width () - 1 , grid.height () - 1 ,
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+ router_opts,
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+ measure_directconnect, allowed_types);
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// Since the other delta delay values may have suffered from edge effects,
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// we recalculate deltas within regions B, C, E, F
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#ifdef VERBOSE
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VTR_LOG (" Computing from low/low:\n " );
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#endif
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- generic_compute_matrix (route_profiler, sampled_delta_delays,
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- low_x, low_y,
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- low_x, low_y,
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- grid.width () - 1 , grid.height () - 1 ,
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- router_opts,
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- measure_directconnect, allowed_types);
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+ generic_compute_matrix_expand (route_profiler, sampled_delta_delays,
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+ low_x, low_y,
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+ low_x, low_y,
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+ grid.width () - 1 , grid.height () - 1 ,
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+ router_opts,
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+ measure_directconnect, allowed_types);
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// Since the other delta delay values may have suffered from edge effects,
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// we recalculate deltas within regions D, E, G, H
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#ifdef VERBOSE
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VTR_LOG (" Computing from high/high:\n " );
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#endif
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- generic_compute_matrix (route_profiler, sampled_delta_delays,
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- high_x, high_y,
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- 0 , 0 ,
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- high_x, high_y,
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- router_opts,
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- measure_directconnect, allowed_types);
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+ generic_compute_matrix_expand (route_profiler, sampled_delta_delays,
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+ high_x, high_y,
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+ 0 , 0 ,
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+ high_x, high_y,
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+ router_opts,
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+ measure_directconnect, allowed_types);
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// Since the other delta delay values may have suffered from edge effects,
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// we recalculate deltas within regions A, B, D, E
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#ifdef VERBOSE
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VTR_LOG (" Computing from high/low:\n " );
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#endif
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- generic_compute_matrix (route_profiler, sampled_delta_delays,
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- high_x, low_y,
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- 0 , low_y,
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- high_x, grid.height () - 1 ,
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- router_opts,
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- measure_directconnect, allowed_types);
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+ generic_compute_matrix_expand (route_profiler, sampled_delta_delays,
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+ high_x, low_y,
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+ 0 , low_y,
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+ high_x, grid.height () - 1 ,
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+ router_opts,
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+ measure_directconnect, allowed_types);
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// Since the other delta delay values may have suffered from edge effects,
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// we recalculate deltas within regions E, F, H, I
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#ifdef VERBOSE
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VTR_LOG (" Computing from low/high:\n " );
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#endif
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- generic_compute_matrix (route_profiler, sampled_delta_delays,
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- low_x, high_y,
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- low_x, 0 ,
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- grid.width () - 1 , high_y,
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- router_opts,
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- measure_directconnect, allowed_types);
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+ generic_compute_matrix_expand (route_profiler, sampled_delta_delays,
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+ low_x, high_y,
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+ low_x, 0 ,
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+ grid.width () - 1 , high_y,
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+ router_opts,
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+ measure_directconnect, allowed_types);
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vtr::Matrix<float > delta_delays ({grid.width (), grid.height ()});
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for (size_t dx = 0 ; dx < sampled_delta_delays.dim_size (0 ); ++dx) {
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