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2 | 2 | ******************************************************************************
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3 | 3 | * @file stm32f1xx_hal_conf.h
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4 | 4 | * @author MCD Application Team
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5 |
| - * @version V1.0.4 |
6 |
| - * @date 29-April-2016 |
| 5 | + * @version V1.1.1 |
| 6 | + * @date 12-May-2017 |
7 | 7 | * @brief HAL configuration template file.
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8 | 8 | * This file should be copied to the application folder and renamed
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9 | 9 | * to stm32f1xx_hal_conf.h.
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10 | 10 | ******************************************************************************
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11 | 11 | * @attention
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12 | 12 | *
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13 |
| - * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| 13 | + * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
14 | 14 | *
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15 | 15 | * Redistribution and use in source and binary forms, with or without modification,
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16 | 16 | * are permitted provided that the following conditions are met:
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83 | 83 | #define HAL_UART_MODULE_ENABLED
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84 | 84 | //#define HAL_USART_MODULE_ENABLED
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85 | 85 | //#define HAL_WWDG_MODULE_ENABLED
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| 86 | +#define HAL_MMC_MODULE_ENABLED |
86 | 87 |
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87 | 88 | /* ########################## Oscillator Values adaptation ####################*/
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88 | 89 | /**
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92 | 93 | */
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93 | 94 | #if !defined (HSE_VALUE)
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94 | 95 | #if defined(USE_STM3210C_EVAL)
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95 |
| - #define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */ |
| 96 | + #define HSE_VALUE 25000000U /*!< Value of the External oscillator in Hz */ |
96 | 97 | #else
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97 |
| - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ |
| 98 | + #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ |
98 | 99 | #endif
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99 | 100 | #endif /* HSE_VALUE */
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100 | 101 |
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101 | 102 | #if !defined (HSE_STARTUP_TIMEOUT)
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102 |
| - #define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */ |
| 103 | + #define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */ |
103 | 104 | #endif /* HSE_STARTUP_TIMEOUT */
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104 | 105 |
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105 | 106 | /**
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108 | 109 | * (when HSI is used as system clock source, directly or through the PLL).
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109 | 110 | */
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110 | 111 | #if !defined (HSI_VALUE)
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111 |
| - #define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/ |
| 112 | + #define HSI_VALUE 8000000U /*!< Value of the Internal oscillator in Hz */ |
112 | 113 | #endif /* HSI_VALUE */
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113 | 114 |
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| 115 | +/** |
| 116 | + * @brief Internal Low Speed oscillator (LSI) value. |
| 117 | + */ |
| 118 | +#if !defined (LSI_VALUE) |
| 119 | + #define LSI_VALUE 40000U /*!< LSI Typical Value in Hz */ |
| 120 | +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz |
| 121 | + The real value may vary depending on the variations |
| 122 | + in voltage and temperature. */ |
114 | 123 | /**
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115 | 124 | * @brief External Low Speed oscillator (LSE) value.
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116 | 125 | * This value is used by the UART, RTC HAL module to compute the system frequency
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117 | 126 | */
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118 | 127 | #if !defined (LSE_VALUE)
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119 |
| - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/ |
| 128 | + #define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */ |
120 | 129 | #endif /* LSE_VALUE */
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121 | 130 |
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122 |
| - |
123 | 131 | #if !defined (LSE_STARTUP_TIMEOUT)
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124 |
| - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */ |
125 |
| -#endif /* HSE_STARTUP_TIMEOUT */ |
126 |
| - |
| 132 | + #define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */ |
| 133 | +#endif /* LSE_STARTUP_TIMEOUT */ |
127 | 134 |
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128 | 135 | /* Tip: To avoid modifying this file each time you need to use different HSE,
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129 | 136 | === you can define the HSE value in your toolchain compiler preprocessor. */
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132 | 139 | /**
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133 | 140 | * @brief This is the HAL system configuration section
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134 | 141 | */
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135 |
| -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ |
136 |
| -#define TICK_INT_PRIORITY ((uint32_t)0x000F) /*!< tick interrupt priority */ |
137 |
| -#define USE_RTOS 0 |
138 |
| -#define PREFETCH_ENABLE 1 |
| 142 | +#define VDD_VALUE 3300U /*!< Value of VDD in mv */ |
| 143 | +#define TICK_INT_PRIORITY 0x0FU /*!< tick interrupt priority */ |
| 144 | +#define USE_RTOS 0U |
| 145 | +#define PREFETCH_ENABLE 1U |
139 | 146 |
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140 | 147 | /* ########################## Assert Selection ############################## */
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141 | 148 | /**
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142 | 149 | * @brief Uncomment the line below to expanse the "assert_param" macro in the
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143 | 150 | * HAL drivers code
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144 | 151 | */
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145 |
| -/*#define USE_FULL_ASSERT 1*/ |
146 |
| - |
| 152 | +/* #define USE_FULL_ASSERT 1U */ |
147 | 153 |
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148 | 154 | /* ################## Ethernet peripheral configuration ##################### */
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149 | 155 |
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150 | 156 | /* Section 1 : Ethernet peripheral configuration */
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151 | 157 |
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152 | 158 | /* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
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153 |
| -#define MAC_ADDR0 2 |
154 |
| -#define MAC_ADDR1 0 |
155 |
| -#define MAC_ADDR2 0 |
156 |
| -#define MAC_ADDR3 0 |
157 |
| -#define MAC_ADDR4 0 |
158 |
| -#define MAC_ADDR5 0 |
| 159 | +#define MAC_ADDR0 2U |
| 160 | +#define MAC_ADDR1 0U |
| 161 | +#define MAC_ADDR2 0U |
| 162 | +#define MAC_ADDR3 0U |
| 163 | +#define MAC_ADDR4 0U |
| 164 | +#define MAC_ADDR5 0U |
159 | 165 |
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160 | 166 | /* Definition of the Ethernet driver buffers size and count */
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161 | 167 | #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
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162 | 168 | #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
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163 |
| -#define ETH_RXBUFNB ((uint32_t)8) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ |
164 |
| -#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ |
| 169 | +#define ETH_RXBUFNB 8U /* 8 Rx buffers of size ETH_RX_BUF_SIZE */ |
| 170 | +#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ |
165 | 171 |
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166 | 172 | /* Section 2: PHY configuration section */
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167 | 173 |
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168 | 174 | /* DP83848 PHY Address*/
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169 |
| -#define DP83848_PHY_ADDRESS 0x01 |
| 175 | +#define DP83848_PHY_ADDRESS 0x01U |
170 | 176 | /* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
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171 |
| -#define PHY_RESET_DELAY ((uint32_t)0x000000FF) |
| 177 | +#define PHY_RESET_DELAY 0x000000FFU |
172 | 178 | /* PHY Configuration delay */
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173 |
| -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) |
| 179 | +#define PHY_CONFIG_DELAY 0x00000FFFU |
174 | 180 |
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175 |
| -#define PHY_READ_TO ((uint32_t)0x0000FFFF) |
176 |
| -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) |
| 181 | +#define PHY_READ_TO 0x0000FFFFU |
| 182 | +#define PHY_WRITE_TO 0x0000FFFFU |
177 | 183 |
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178 | 184 | /* Section 3: Common PHY Registers */
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179 | 185 |
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180 |
| -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ |
181 |
| -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ |
| 186 | +#define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ |
| 187 | +#define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ |
182 | 188 |
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183 | 189 | #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */
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184 | 190 | #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */
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197 | 203 |
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198 | 204 | /* Section 4: Extended PHY Registers */
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199 | 205 |
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200 |
| -#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */ |
201 |
| -#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */ |
202 |
| -#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */ |
| 206 | +#define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */ |
| 207 | +#define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */ |
| 208 | +#define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */ |
203 | 209 |
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204 | 210 | #define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */
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205 | 211 | #define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */
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211 | 217 | #define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */
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212 | 218 | #define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */
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213 | 219 |
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| 220 | +/* ################## SPI peripheral configuration ########################## */ |
214 | 221 |
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| 222 | +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver |
| 223 | +* Activated: CRC code is present inside driver |
| 224 | +* Deactivated: CRC code cleaned from driver |
| 225 | +*/ |
| 226 | + |
| 227 | +#define USE_SPI_CRC 1U |
215 | 228 |
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216 | 229 | /* Includes ------------------------------------------------------------------*/
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217 | 230 | /**
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334 | 347 | #include "stm32f1xx_hal_pcd.h"
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335 | 348 | #endif /* HAL_PCD_MODULE_ENABLED */
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336 | 349 |
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337 |
| - |
338 | 350 | #ifdef HAL_HCD_MODULE_ENABLED
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339 | 351 | #include "stm32f1xx_hal_hcd.h"
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340 | 352 | #endif /* HAL_HCD_MODULE_ENABLED */
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341 | 353 |
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| 354 | +#ifdef HAL_MMC_MODULE_ENABLED |
| 355 | + #include "stm32f1xx_hal_mmc.h" |
| 356 | +#endif /* HAL_MMC_MODULE_ENABLED */ |
342 | 357 |
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343 | 358 | /* Exported macro ------------------------------------------------------------*/
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344 | 359 | #ifdef USE_FULL_ASSERT
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350 | 365 | * If expr is true, it returns no value.
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351 | 366 | * @retval None
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352 | 367 | */
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353 |
| - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) |
| 368 | + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) |
354 | 369 | /* Exported functions ------------------------------------------------------- */
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355 | 370 | void assert_failed(uint8_t* file, uint32_t line);
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356 | 371 | #else
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357 |
| - #define assert_param(expr) ((void)0) |
| 372 | + #define assert_param(expr) ((void)0U) |
358 | 373 | #endif /* USE_FULL_ASSERT */
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359 | 374 |
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360 | 375 | #ifdef __cplusplus
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