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Fix rustfmt (rust-lang#239)
* [fmt] manually fix some formatting * [fmt] reformat with rustfmt-nightly * [clippy] fix clippy issues
1 parent fb2e2ad commit f8a3d0c

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19 files changed

+179
-70
lines changed

19 files changed

+179
-70
lines changed

‎coresimd/src/arm/neon.rs

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -56,7 +56,6 @@ pub unsafe fn vaddq_s32(a: i32x4, b: i32x4) -> i32x4 {
5656
simd_add(a, b)
5757
}
5858

59-
6059
/// Vector add.
6160
#[inline(always)]
6261
#[target_feature = "+neon"]

‎coresimd/src/arm/v7.rs

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,6 @@ extern "C" {
4747
fn rbit_u32(i: i32) -> i32;
4848
}
4949

50-
5150
#[cfg(test)]
5251
mod tests {
5352
use arm::v7;

‎coresimd/src/macros.rs

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -539,7 +539,6 @@ macro_rules! test_bit_arithmetic_ {
539539
};
540540
}
541541

542-
543542
#[cfg(test)]
544543
#[macro_export]
545544
macro_rules! test_ops_si {

‎coresimd/src/runtime/x86.rs

Lines changed: 10 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -206,7 +206,8 @@ pub enum __Feature {
206206
avx512_ifma,
207207
/// AVX-512 VBMI (Vector Byte Manipulation Instructions)
208208
avx512_vbmi,
209-
/// AVX-512 VPOPCNTDQ (Vector Population Count Doubleword and Quadword)
209+
/// AVX-512 VPOPCNTDQ (Vector Population Count Doubleword and
210+
/// Quadword)
210211
avx512_vpopcntdq,
211212
/// FMA (Fused Multiply Add)
212213
fma,
@@ -301,7 +302,8 @@ pub fn detect_features() -> usize {
301302
// Contains information about bmi,bmi2, and avx2 support.
302303
let (extended_features_ebx, extended_features_ecx) = if max_basic_leaf >= 7
303304
{
304-
let CpuidResult { ebx, ecx, .. } = unsafe { __cpuid(0x0000_0007_u32) };
305+
let CpuidResult { ebx, ecx, .. } =
306+
unsafe { __cpuid(0x0000_0007_u32) };
305307
(ebx, ecx)
306308
} else {
307309
(0, 0) // CPUID does not support "Extended Features"
@@ -318,16 +320,19 @@ pub fn detect_features() -> usize {
318320
// EAX = 0x8000_0001, ECX=0: Queries "Extended Processor Info and Feature
319321
// Bits"
320322
let extended_proc_info_ecx = if extended_max_basic_leaf >= 1 {
321-
let CpuidResult { ecx, .. } = unsafe { __cpuid(0x8000_0001_u32) };
323+
let CpuidResult { ecx, .. } =
324+
unsafe { __cpuid(0x8000_0001_u32) };
322325
ecx
323326
} else {
324327
0
325328
};
326329

327330
{
328331
// borrows value till the end of this scope:
329-
let mut enable = |r, rb, f| if bit::test(r as usize, rb) {
330-
value = bit::set(value, f as u32);
332+
let mut enable = |r, rb, f| {
333+
if bit::test(r as usize, rb) {
334+
value = bit::set(value, f as u32);
335+
}
331336
};
332337

333338
enable(proc_info_ecx, 0, __Feature::sse3);

‎coresimd/src/v128.rs

Lines changed: 99 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -47,15 +47,105 @@ define_ty_doc! {
4747
/// 128-bit wide signed integer vector type
4848
}
4949

50-
define_from!(u64x2, i64x2, u32x4, i32x4, u16x8, i16x8, u8x16, i8x16, __m128i);
51-
define_from!(i64x2, u64x2, u32x4, i32x4, u16x8, i16x8, u8x16, i8x16, __m128i);
52-
define_from!(u32x4, u64x2, i64x2, i32x4, u16x8, i16x8, u8x16, i8x16, __m128i);
53-
define_from!(i32x4, u64x2, i64x2, u32x4, u16x8, i16x8, u8x16, i8x16, __m128i);
54-
define_from!(u16x8, u64x2, i64x2, u32x4, i32x4, i16x8, u8x16, i8x16, __m128i);
55-
define_from!(i16x8, u64x2, i64x2, u32x4, i32x4, u16x8, u8x16, i8x16, __m128i);
56-
define_from!(u8x16, u64x2, i64x2, u32x4, i32x4, u16x8, i16x8, i8x16, __m128i);
57-
define_from!(i8x16, u64x2, i64x2, u32x4, i32x4, u16x8, i16x8, u8x16, __m128i);
58-
define_from!(__m128i, i8x16, u64x2, i64x2, u32x4, i32x4, u16x8, i16x8, u8x16);
50+
define_from!(
51+
u64x2,
52+
i64x2,
53+
u32x4,
54+
i32x4,
55+
u16x8,
56+
i16x8,
57+
u8x16,
58+
i8x16,
59+
__m128i
60+
);
61+
define_from!(
62+
i64x2,
63+
u64x2,
64+
u32x4,
65+
i32x4,
66+
u16x8,
67+
i16x8,
68+
u8x16,
69+
i8x16,
70+
__m128i
71+
);
72+
define_from!(
73+
u32x4,
74+
u64x2,
75+
i64x2,
76+
i32x4,
77+
u16x8,
78+
i16x8,
79+
u8x16,
80+
i8x16,
81+
__m128i
82+
);
83+
define_from!(
84+
i32x4,
85+
u64x2,
86+
i64x2,
87+
u32x4,
88+
u16x8,
89+
i16x8,
90+
u8x16,
91+
i8x16,
92+
__m128i
93+
);
94+
define_from!(
95+
u16x8,
96+
u64x2,
97+
i64x2,
98+
u32x4,
99+
i32x4,
100+
i16x8,
101+
u8x16,
102+
i8x16,
103+
__m128i
104+
);
105+
define_from!(
106+
i16x8,
107+
u64x2,
108+
i64x2,
109+
u32x4,
110+
i32x4,
111+
u16x8,
112+
u8x16,
113+
i8x16,
114+
__m128i
115+
);
116+
define_from!(
117+
u8x16,
118+
u64x2,
119+
i64x2,
120+
u32x4,
121+
i32x4,
122+
u16x8,
123+
i16x8,
124+
i8x16,
125+
__m128i
126+
);
127+
define_from!(
128+
i8x16,
129+
u64x2,
130+
i64x2,
131+
u32x4,
132+
i32x4,
133+
u16x8,
134+
i16x8,
135+
u8x16,
136+
__m128i
137+
);
138+
define_from!(
139+
__m128i,
140+
i8x16,
141+
u64x2,
142+
i64x2,
143+
u32x4,
144+
i32x4,
145+
u16x8,
146+
i16x8,
147+
u8x16
148+
);
59149

60150
define_common_ops!(
61151
f64x2,

‎coresimd/src/x86/i586/avx.rs

Lines changed: 18 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -315,7 +315,6 @@ pub unsafe fn _mm256_div_pd(a: f64x4, b: f64x4) -> f64x4 {
315315
a / b
316316
}
317317

318-
319318
/// Round packed double-precision (64-bit) floating point elements in `a`
320319
/// according to the flag `b`. The value of `b` may be as follows:
321320
///
@@ -865,7 +864,8 @@ pub unsafe fn _mm256_extractf128_si256(a: __m256i, imm8: i32) -> __m128i {
865864

866865
/// Extract an 8-bit integer from `a`, selected with `imm8`. Returns a 32-bit
867866
/// integer containing the zero-extended integer data.
868-
/// See: https://reviews.llvm.org/D20468
867+
///
868+
/// See [LLVM commit D20468][https://reviews.llvm.org/D20468].
869869
#[inline(always)]
870870
#[target_feature = "+avx"]
871871
// This intrinsic has no corresponding instruction.
@@ -876,7 +876,8 @@ pub unsafe fn _mm256_extract_epi8(a: i8x32, imm8: i32) -> i32 {
876876

877877
/// Extract a 16-bit integer from `a`, selected with `imm8`. Returns a 32-bit
878878
/// integer containing the zero-extended integer data.
879-
/// See: https://reviews.llvm.org/D20468
879+
///
880+
/// See [LLVM commit D20468][https://reviews.llvm.org/D20468].
880881
#[inline(always)]
881882
#[target_feature = "+avx"]
882883
// This intrinsic has no corresponding instruction.
@@ -2983,7 +2984,6 @@ mod tests {
29832984
assert_eq!(r, e);
29842985
}
29852986

2986-
29872987
#[simd_test = "avx"]
29882988
unsafe fn _mm256_xor_pd() {
29892989
let a = f64x4::new(4., 9., 16., 25.);
@@ -4210,9 +4210,13 @@ mod tests {
42104210
25, 26, 27, 28,
42114211
29, 30, 31, 32,
42124212
));
4213-
let lo = __m128i::from(
4214-
i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16),
4215-
);
4213+
#[cfg_attr(rustfmt, rustfmt_skip)]
4214+
let lo = __m128i::from(i8x16::new(
4215+
1, 2, 3, 4,
4216+
5, 6, 7, 8,
4217+
9, 10, 11, 12,
4218+
13, 14, 15, 16,
4219+
));
42164220
let r = avx::_mm256_set_m128i(hi, lo);
42174221
#[cfg_attr(rustfmt, rustfmt_skip)]
42184222
let e = __m256i::from(i8x32::new(
@@ -4244,9 +4248,13 @@ mod tests {
42444248

42454249
#[simd_test = "avx"]
42464250
unsafe fn _mm256_setr_m128i() {
4247-
let lo = __m128i::from(
4248-
i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16),
4249-
);
4251+
#[cfg_attr(rustfmt, rustfmt_skip)]
4252+
let lo = __m128i::from(i8x16::new(
4253+
1, 2, 3, 4,
4254+
5, 6, 7, 8,
4255+
9, 10, 11, 12,
4256+
13, 14, 15, 16,
4257+
));
42504258
#[cfg_attr(rustfmt, rustfmt_skip)]
42514259
let hi = __m128i::from(i8x16::new(
42524260
17, 18, 19, 20, 21, 22, 23, 24,

‎coresimd/src/x86/i586/avx2.rs

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -242,7 +242,6 @@ pub unsafe fn _mm_blend_epi32(a: i32x4, b: i32x4, imm8: i32) -> i32x4 {
242242
}
243243
}
244244

245-
246245
/// Blend packed 32-bit integers from `a` and `b` using control mask `imm8`.
247246
#[inline(always)]
248247
#[target_feature = "+avx2"]
@@ -1438,7 +1437,6 @@ pub unsafe fn _mm256_min_epu8(a: u8x32, b: u8x32) -> u8x32 {
14381437
pminub(a, b)
14391438
}
14401439

1441-
14421440
/// Create mask from the most significant bit of each 8-bit element in `a`,
14431441
/// return the result.
14441442
#[inline(always)]
@@ -1517,7 +1515,6 @@ pub unsafe fn _mm256_mullo_epi16(a: i16x16, b: i16x16) -> i16x16 {
15171515
a * b
15181516
}
15191517

1520-
15211518
/// Multiply the packed 32-bit integers in `a` and `b`, producing
15221519
/// intermediate 64-bit integers, and return the low 16 bits of the
15231520
/// intermediate integers
@@ -2149,7 +2146,6 @@ pub unsafe fn _mm256_srav_epi32(a: i32x8, count: i32x8) -> i32x8 {
21492146
psravd256(a, count)
21502147
}
21512148

2152-
21532149
/// Shift packed 16-bit integers in `a` right by `count` while shifting in
21542150
/// zeros.
21552151
#[inline(always)]
@@ -3137,7 +3133,6 @@ mod tests {
31373133
assert_eq!(r, a);
31383134
}
31393135

3140-
31413136
#[simd_test = "avx2"]
31423137
unsafe fn _mm256_adds_epu16() {
31433138
let a =
@@ -4199,7 +4194,6 @@ mod tests {
41994194
assert_eq!(r, e);
42004195
}
42014196

4202-
42034197
#[simd_test = "avx2"]
42044198
unsafe fn _mm256_srlv_epi64() {
42054199
let a = i64x4::splat(2);
@@ -4540,7 +4534,6 @@ mod tests {
45404534
);
45414535
}
45424536

4543-
45444537
#[simd_test = "avx2"]
45454538
unsafe fn _mm_i32gather_epi64() {
45464539
let mut arr = [0i64; 128];
@@ -4802,7 +4795,6 @@ mod tests {
48024795
assert_eq!(r, f32x4::new(0.0, 16.0, 64.0, 256.0));
48034796
}
48044797

4805-
48064798
#[simd_test = "avx2"]
48074799
unsafe fn _mm_i64gather_epi64() {
48084800
let mut arr = [0i64; 128];

‎coresimd/src/x86/i586/sse.rs

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1514,7 +1514,6 @@ pub const _MM_HINT_T2: i8 = 1;
15141514
/// See [`_mm_prefetch`](fn._mm_prefetch.html).
15151515
pub const _MM_HINT_NTA: i8 = 0;
15161516

1517-
15181517
/// Fetch the cache line that contains address `p` using the given `strategy`.
15191518
///
15201519
/// The `strategy` must be one of:

‎coresimd/src/x86/i586/sse2.rs

Lines changed: 10 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -3921,9 +3921,12 @@ mod tests {
39213921
let r = sse2::_mm_cvtps_pd(f32x4::new(-1.0, 2.0, -3.0, 5.0));
39223922
assert_eq!(r, f64x2::new(-1.0, 2.0));
39233923

3924-
let r = sse2::_mm_cvtps_pd(
3925-
f32x4::new(f32::MAX, f32::INFINITY, f32::NEG_INFINITY, f32::MIN),
3926-
);
3924+
let r = sse2::_mm_cvtps_pd(f32x4::new(
3925+
f32::MAX,
3926+
f32::INFINITY,
3927+
f32::NEG_INFINITY,
3928+
f32::MIN,
3929+
));
39273930
assert_eq!(r, f64x2::new(f32::MAX as f64, f64::INFINITY));
39283931
}
39293932

@@ -3940,9 +3943,10 @@ mod tests {
39403943
let r = sse2::_mm_cvtpd_epi32(f64x2::new(f64::MAX, f64::MIN));
39413944
assert_eq!(r, i32x4::new(i32::MIN, i32::MIN, 0, 0));
39423945

3943-
let r = sse2::_mm_cvtpd_epi32(
3944-
f64x2::new(f64::INFINITY, f64::NEG_INFINITY),
3945-
);
3946+
let r = sse2::_mm_cvtpd_epi32(f64x2::new(
3947+
f64::INFINITY,
3948+
f64::NEG_INFINITY,
3949+
));
39463950
assert_eq!(r, i32x4::new(i32::MIN, i32::MIN, 0, 0));
39473951

39483952
let r = sse2::_mm_cvtpd_epi32(f64x2::new(f64::NAN, f64::NAN));

‎coresimd/src/x86/i586/sse3.rs

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -181,9 +181,13 @@ mod tests {
181181

182182
#[simd_test = "sse3"]
183183
unsafe fn _mm_lddqu_si128() {
184-
let a = __m128i::from(
185-
i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16),
186-
);
184+
#[cfg_attr(rustfmt, rustfmt_skip)]
185+
let a = __m128i::from(i8x16::new(
186+
1, 2, 3, 4,
187+
5, 6, 7, 8,
188+
9, 10, 11, 12,
189+
13, 14, 15, 16,
190+
));
187191
let r = sse3::_mm_lddqu_si128(&a);
188192
assert_eq!(a, r);
189193
}

‎coresimd/src/x86/i586/sse41.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -122,7 +122,8 @@ pub unsafe fn _mm_extract_ps(a: f32x4, imm8: u8) -> i32 {
122122

123123
/// Extract an 8-bit integer from `a`, selected with `imm8`. Returns a 32-bit
124124
/// integer containing the zero-extended integer data.
125-
/// See: https://reviews.llvm.org/D20468
125+
///
126+
/// See [LLVM commit D20468][https://reviews.llvm.org/D20468].
126127
#[inline(always)]
127128
#[target_feature = "+sse4.1"]
128129
#[cfg_attr(test, assert_instr(pextrb, imm8 = 0))]
@@ -1157,7 +1158,6 @@ mod tests {
11571158
assert_eq!(r, e);
11581159
}
11591160

1160-
11611161
#[simd_test = "sse4.1"]
11621162
unsafe fn _mm_dp_pd() {
11631163
let a = f64x2::new(2.0, 3.0);

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