@@ -815,6 +815,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
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| "atanf"
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| "log1pf"
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| "expm1f"
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+ | "tgammaf"
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=> {
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let [ f] = this. check_shim ( abi, Abi :: C { unwind : false } , link_name, args) ?;
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// FIXME: Using host floats.
@@ -830,6 +831,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
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"atanf" => f. atan ( ) ,
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"log1pf" => f. ln_1p ( ) ,
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"expm1f" => f. exp_m1 ( ) ,
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+ "tgammaf" => f. gamma ( ) ,
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_ => bug ! ( ) ,
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} ;
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this. write_scalar ( Scalar :: from_u32 ( res. to_bits ( ) ) , dest) ?;
@@ -866,6 +868,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
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| "atan"
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| "log1p"
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| "expm1"
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+ | "tgamma"
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=> {
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let [ f] = this. check_shim ( abi, Abi :: C { unwind : false } , link_name, args) ?;
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// FIXME: Using host floats.
@@ -881,6 +884,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
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"atan" => f. atan ( ) ,
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"log1p" => f. ln_1p ( ) ,
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"expm1" => f. exp_m1 ( ) ,
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+ "tgamma" => f. gamma ( ) ,
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_ => bug ! ( ) ,
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} ;
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this. write_scalar ( Scalar :: from_u64 ( res. to_bits ( ) ) , dest) ?;
@@ -917,6 +921,26 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
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let res = x. scalbn ( exp) ;
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this. write_scalar ( Scalar :: from_f64 ( res) , dest) ?;
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}
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+ "lgammaf_r" => {
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+ let [ x, signp] = this. check_shim ( abi, Abi :: C { unwind : false } , link_name, args) ?;
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+ // FIXME: Using host floats.
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+ let x = f32:: from_bits ( this. read_scalar ( x) ?. to_u32 ( ) ?) ;
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+ let signp = this. deref_pointer ( signp) ?;
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+
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+ let ( res, sign) = x. ln_gamma ( ) ;
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+ this. write_int ( sign, & signp) ?;
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+ this. write_scalar ( Scalar :: from_u32 ( res. to_bits ( ) ) , dest) ?;
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+ }
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+ "lgamma_r" => {
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+ let [ x, signp] = this. check_shim ( abi, Abi :: C { unwind : false } , link_name, args) ?;
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+ // FIXME: Using host floats.
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+ let x = f64:: from_bits ( this. read_scalar ( x) ?. to_u64 ( ) ?) ;
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+ let signp = this. deref_pointer ( signp) ?;
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+
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+ let ( res, sign) = x. ln_gamma ( ) ;
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+ this. write_int ( sign, & signp) ?;
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+ this. write_scalar ( Scalar :: from_u64 ( res. to_bits ( ) ) , dest) ?;
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+ }
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// Architecture-specific shims
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"llvm.x86.addcarry.64" if this. tcx . sess . target . arch == "x86_64" => {
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