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Core 2.0.1.1
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Diff for: ‎README.md

+4
Original file line numberDiff line numberDiff line change
@@ -27,6 +27,10 @@ You can use [Arduino-ESP32 Online Documentation](https://docs.espressif.com/proj
2727
* [FAQ](https://docs.espressif.com/projects/arduino-esp32/en/latest/faq.html)
2828
* [Troubleshooting](https://docs.espressif.com/projects/arduino-esp32/en/latest/troubleshooting.html)
2929

30+
### Supported Chips
31+
32+
Visit the [supported chips](https://docs.espressif.com/projects/arduino-esp32/en/latest/getting_started.html#supported-soc-s) documentation to see the list of current supported ESP32 SoCs.
33+
3034
### Decoding exceptions
3135

3236
You can use [EspExceptionDecoder](https://github.com/me-no-dev/EspExceptionDecoder) to get meaningful call trace.

Diff for: ‎boards.txt

+14-4
Original file line numberDiff line numberDiff line change
@@ -9690,10 +9690,20 @@ deneyapmini.build.boot=qio
96909690
deneyapmini.build.partitions=default
96919691
deneyapmini.build.defines=
96929692

9693-
deneyapmini.menu.CDCOnBoot.default=Disabled
9694-
deneyapmini.menu.CDCOnBoot.default.build.cdc_on_boot=0
9695-
deneyapmini.menu.CDCOnBoot.cdc=Enabled
9696-
deneyapmini.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
9693+
deneyapmini.menu.CDCOnBoot.default=Enabled
9694+
deneyapmini.menu.CDCOnBoot.default.build.cdc_on_boot=1
9695+
deneyapmini.menu.CDCOnBoot.cdc=Disabled
9696+
deneyapmini.menu.CDCOnBoot.cdc.build.cdc_on_boot=0
9697+
9698+
deneyapmini.menu.MSCOnBoot.default=Disabled
9699+
deneyapmini.menu.MSCOnBoot.default.build.msc_on_boot=0
9700+
deneyapmini.menu.MSCOnBoot.msc=Enabled
9701+
deneyapmini.menu.MSCOnBoot.msc.build.msc_on_boot=1
9702+
9703+
deneyapmini.menu.DFUOnBoot.default=Disabled
9704+
deneyapmini.menu.DFUOnBoot.default.build.dfu_on_boot=0
9705+
deneyapmini.menu.DFUOnBoot.dfu=Enabled
9706+
deneyapmini.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
96979707

96989708
deneyapmini.menu.PSRAM.disabled=Disabled
96999709
deneyapmini.menu.PSRAM.disabled.build.defines=

Diff for: ‎cores/esp32/cbuf.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -62,7 +62,7 @@ class cbuf
6262

6363
cbuf *next;
6464

65-
private:
65+
protected:
6666
inline char* wrap_if_bufend(char* ptr) const
6767
{
6868
return (ptr == _bufend) ? _buf : ptr;

Diff for: ‎cores/esp32/core_version.h

+4-4
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
#define ARDUINO_ESP32_GIT_VER 0xa443b816
2-
#define ARDUINO_ESP32_GIT_DESC 2.0.1
3-
#define ARDUINO_ESP32_RELEASE_2_0_1
4-
#define ARDUINO_ESP32_RELEASE "2_0_1"
1+
#define ARDUINO_ESP32_GIT_VER 0x48fb4e47
2+
#define ARDUINO_ESP32_GIT_DESC 2.0.1.1
3+
#define ARDUINO_ESP32_RELEASE_2_0_1_1
4+
#define ARDUINO_ESP32_RELEASE "2_0_1_1"

Diff for: ‎cores/esp32/esp32-hal-i2c-slave.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -302,7 +302,7 @@ esp_err_t i2cSlaveInit(uint8_t num, int sda, int scl, uint16_t slaveID, uint32_t
302302
i2c_ll_slave_init(i2c->dev);
303303
i2c_ll_set_fifo_mode(i2c->dev, true);
304304
i2c_ll_set_slave_addr(i2c->dev, slaveID, false);
305-
i2c_ll_set_tout(i2c->dev, 32000);
305+
i2c_ll_set_tout(i2c->dev, I2C_LL_MAX_TIMEOUT);
306306
i2c_slave_set_frequency(i2c, frequency);
307307

308308
if (!i2c_slave_check_line_state(sda, scl)) {

Diff for: ‎cores/esp32/esp32-hal-i2c.c

+3
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,7 @@
2424
#include "soc/soc_caps.h"
2525
#include "soc/i2c_periph.h"
2626
#include "hal/i2c_hal.h"
27+
#include "hal/i2c_ll.h"
2728
#include "driver/i2c.h"
2829

2930
typedef volatile struct {
@@ -91,6 +92,8 @@ esp_err_t i2cInit(uint8_t i2c_num, int8_t sda, int8_t scl, uint32_t frequency){
9192
} else {
9293
bus[i2c_num].initialized = true;
9394
bus[i2c_num].frequency = frequency;
95+
//Clock Stretching Timeout: 20b:esp32, 5b:esp32-c3, 24b:esp32-s2
96+
i2c_set_timeout((i2c_port_t)i2c_num, I2C_LL_MAX_TIMEOUT);
9497
}
9598
}
9699
#if !CONFIG_DISABLE_HAL_LOCKS

Diff for: ‎cores/esp32/esp32-hal-ledc.c

-19
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,6 @@
1717
#include "freertos/task.h"
1818
#include "freertos/semphr.h"
1919
#include "esp32-hal-matrix.h"
20-
#include "soc/soc_caps.h"
2120
#include "soc/ledc_reg.h"
2221
#include "soc/ledc_struct.h"
2322
#include "driver/periph_ctrl.h"
@@ -332,21 +331,3 @@ double ledcChangeFrequency(uint8_t chan, double freq, uint8_t bit_num)
332331
double res_freq = _ledcSetupTimerFreq(chan, freq, bit_num);
333332
return res_freq;
334333
}
335-
336-
static int8_t pin_to_channel[SOC_GPIO_PIN_COUNT] = { 0 };
337-
static int cnt_channel = SOC_LEDC_CHANNEL_NUM;
338-
void analogWrite(uint8_t pin, int value) {
339-
// Use ledc hardware for internal pins
340-
if (pin < SOC_GPIO_PIN_COUNT) {
341-
if (pin_to_channel[pin] == 0) {
342-
if (!cnt_channel) {
343-
log_e("No more analogWrite channels available! You can have maximum %u", SOC_LEDC_CHANNEL_NUM);
344-
return;
345-
}
346-
pin_to_channel[pin] = cnt_channel--;
347-
ledcAttachPin(pin, cnt_channel);
348-
ledcSetup(cnt_channel, 1000, 8);
349-
}
350-
ledcWrite(pin_to_channel[pin] - 1, value);
351-
}
352-
}

Diff for: ‎cores/esp32/esp32-hal.h

-2
Original file line numberDiff line numberDiff line change
@@ -90,8 +90,6 @@ void yield(void);
9090
#include "esp32-hal-psram.h"
9191
#include "esp32-hal-cpu.h"
9292

93-
void analogWrite(uint8_t pin, int value);
94-
9593
//returns chip temperature in Celsius
9694
float temperatureRead();
9795

Diff for: ‎package.json

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
{
22
"name": "framework-arduinoespressif32",
33
"description": "Arduino Wiring-based Framework (ESP32 Core) for Tasmota",
4-
"version": "2.0.1",
4+
"version": "2.0.1+1",
55
"url": "https://github.com/tasmota/arduino-esp32"
66
}

Diff for: ‎platform.txt

+6-6
Large diffs are not rendered by default.

Diff for: ‎tools/platformio-build-esp32.py

+3-1
Original file line numberDiff line numberDiff line change
@@ -129,6 +129,7 @@
129129
"-u", "pthread_include_pthread_impl",
130130
"-u", "pthread_include_pthread_cond_impl",
131131
"-u", "pthread_include_pthread_local_storage_impl",
132+
"-u", "pthread_include_pthread_rwlock_impl",
132133
"-u", "ld_include_highint_hdl",
133134
"-u", "start_app",
134135
"-u", "start_app_other_cores",
@@ -332,9 +333,10 @@
332333
"UNITY_INCLUDE_CONFIG_H",
333334
"WITH_POSIX",
334335
"_GNU_SOURCE",
335-
("IDF_VER", '\\"v4.4-dev-3631-g7033e3b57\\"'),
336+
("IDF_VER", '\\"v4.4-dev-3728-g7cac8278e\\"'),
336337
"ESP_PLATFORM",
337338
"NDEBUG",
339+
"_POSIX_READER_WRITER_LOCKS",
338340
"ARDUINO_ARCH_ESP32",
339341
"ESP32",
340342
("F_CPU", "$BOARD_F_CPU"),

Diff for: ‎tools/platformio-build-esp32c3.py

+3-1
Original file line numberDiff line numberDiff line change
@@ -126,6 +126,7 @@
126126
"-u", "pthread_include_pthread_impl",
127127
"-u", "pthread_include_pthread_cond_impl",
128128
"-u", "pthread_include_pthread_local_storage_impl",
129+
"-u", "pthread_include_pthread_rwlock_impl",
129130
"-u", "start_app",
130131
"-u", "__ubsan_include",
131132
"-u", "vfs_include_syscalls_impl",
@@ -291,9 +292,10 @@
291292
"UNITY_INCLUDE_CONFIG_H",
292293
"WITH_POSIX",
293294
"_GNU_SOURCE",
294-
("IDF_VER", '\\"v4.4-dev-3631-g7033e3b57\\"'),
295+
("IDF_VER", '\\"v4.4-dev-3728-g7cac8278e\\"'),
295296
"ESP_PLATFORM",
296297
"NDEBUG",
298+
"_POSIX_READER_WRITER_LOCKS",
297299
"ARDUINO_ARCH_ESP32",
298300
"ESP32",
299301
("F_CPU", "$BOARD_F_CPU"),

Diff for: ‎tools/platformio-build-esp32s2.py

+3-1
Original file line numberDiff line numberDiff line change
@@ -124,6 +124,7 @@
124124
"-u", "pthread_include_pthread_impl",
125125
"-u", "pthread_include_pthread_cond_impl",
126126
"-u", "pthread_include_pthread_local_storage_impl",
127+
"-u", "pthread_include_pthread_rwlock_impl",
127128
"-u", "ld_include_highint_hdl",
128129
"-u", "start_app",
129130
"-u", "__ubsan_include",
@@ -318,9 +319,10 @@
318319
"UNITY_INCLUDE_CONFIG_H",
319320
"WITH_POSIX",
320321
"_GNU_SOURCE",
321-
("IDF_VER", '\\"v4.4-dev-3631-g7033e3b57\\"'),
322+
("IDF_VER", '\\"v4.4-dev-3728-g7cac8278e\\"'),
322323
"ESP_PLATFORM",
323324
"NDEBUG",
325+
"_POSIX_READER_WRITER_LOCKS",
324326
"ARDUINO_ARCH_ESP32",
325327
"ESP32",
326328
("F_CPU", "$BOARD_F_CPU"),

Diff for: ‎tools/sdk/esp32/include/config/sdkconfig.h

+2-1
Original file line numberDiff line numberDiff line change
@@ -639,6 +639,7 @@
639639
#define CONFIG_OPTIMIZATION_LEVEL_RELEASE CONFIG_COMPILER_OPTIMIZATION_SIZE
640640
#define CONFIG_POST_EVENTS_FROM_IRAM_ISR CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR
641641
#define CONFIG_POST_EVENTS_FROM_ISR CONFIG_ESP_EVENT_POST_FROM_ISR
642+
#define CONFIG_REDUCE_PHY_TX_POWER CONFIG_ESP_PHY_REDUCE_TX_POWER
642643
#define CONFIG_SCAN_DUPLICATE_BY_DEVICE_ADDR CONFIG_BTDM_SCAN_DUPL_TYPE_DEVICE
643644
#define CONFIG_SEMIHOSTFS_HOST_PATH_MAX_LEN CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN
644645
#define CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS
@@ -676,5 +677,5 @@
676677
#define CONFIG_ULP_COPROC_RESERVE_MEM CONFIG_ESP32_ULP_COPROC_RESERVE_MEM
677678
#define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
678679
#define CONFIG_WIFI_LWIP_ALLOCATION_FROM_SPIRAM_FIRST CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP
679-
#define CONFIG_ARDUINO_IDF_COMMIT "7033e3b57"
680+
#define CONFIG_ARDUINO_IDF_COMMIT "7cac8278e"
680681
#define CONFIG_ARDUINO_IDF_BRANCH "release/v4.4"

Diff for: ‎tools/sdk/esp32/include/driver/include/driver/mcpwm.h

-2
Original file line numberDiff line numberDiff line change
@@ -174,7 +174,6 @@ typedef enum {
174174
/**
175175
* @brief Interrupt masks for MCPWM capture
176176
*/
177-
__attribute__ ((deprecated("please use callback function to avoid directly accessing registers")))
178177
typedef enum {
179178
MCPWM_LL_INTR_CAP0 = BIT(27), ///< Capture 0 happened
180179
MCPWM_LL_INTR_CAP1 = BIT(28), ///< Capture 1 happened
@@ -922,7 +921,6 @@ esp_err_t mcpwm_sync_invert_gpio_synchro(mcpwm_unit_t mcpwm_num, mcpwm_sync_sign
922921
* - ESP_OK Success
923922
* - ESP_ERR_INVALID_ARG Function pointer error.
924923
*/
925-
__attribute__((deprecated("interrupt events are handled by driver, please use callback")))
926924
esp_err_t mcpwm_isr_register(mcpwm_unit_t mcpwm_num, void (*fn)(void *), void *arg, int intr_alloc_flags,
927925
intr_handle_t *handle);
928926

Diff for: ‎tools/sdk/esp32/include/efuse/include/esp_efuse.h

+6-4
Original file line numberDiff line numberDiff line change
@@ -6,11 +6,9 @@
66

77
#pragma once
88

9-
#ifdef __cplusplus
10-
extern "C" {
11-
#endif
12-
9+
#include <stdbool.h>
1310
#include <stdint.h>
11+
1412
#include "esp_err.h"
1513
#include "esp_log.h"
1614
#include "soc/soc_caps.h"
@@ -29,6 +27,10 @@ extern "C" {
2927
#include "esp32h2/rom/secure_boot.h"
3028
#endif
3129

30+
#ifdef __cplusplus
31+
extern "C" {
32+
#endif
33+
3234
#define ESP_ERR_EFUSE 0x1600 /*!< Base error code for efuse api. */
3335
#define ESP_OK_EFUSE_CNT (ESP_ERR_EFUSE + 0x01) /*!< OK the required number of bits is set. */
3436
#define ESP_ERR_EFUSE_CNT_IS_FULL (ESP_ERR_EFUSE + 0x02) /*!< Error field is full. */

Diff for: ‎tools/sdk/esp32/include/esp_phy/include/phy.h

+7
Original file line numberDiff line numberDiff line change
@@ -68,6 +68,13 @@ void phy_close_rf(void);
6868
void phy_xpd_tsens(void);
6969
#endif
7070

71+
#if CONFIG_IDF_TARGET_ESP32C3
72+
/**
73+
* @brief Update internal state of PHY when wifi deinit powers off the wifi power domain.
74+
*/
75+
void phy_init_flag(void);
76+
#endif
77+
7178
/**
7279
* @brief Store and load PHY digital registers.
7380
*

Diff for: ‎tools/sdk/esp32/include/esp_timer/include/esp_timer.h

+22-13
Original file line numberDiff line numberDiff line change
@@ -1,16 +1,8 @@
1-
// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
2-
//
3-
// Licensed under the Apache License, Version 2.0 (the "License");
4-
// you may not use this file except in compliance with the License.
5-
// You may obtain a copy of the License at
6-
//
7-
// http://www.apache.org/licenses/LICENSE-2.0
8-
//
9-
// Unless required by applicable law or agreed to in writing, software
10-
// distributed under the License is distributed on an "AS IS" BASIS,
11-
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12-
// See the License for the specific language governing permissions and
13-
// limitations under the License.
1+
/*
2+
* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
146

157
#pragma once
168

@@ -83,11 +75,28 @@ typedef struct {
8375
bool skip_unhandled_events; //!< Skip unhandled events for periodic timers
8476
} esp_timer_create_args_t;
8577

78+
79+
/**
80+
* @brief Minimal initialization of esp_timer
81+
*
82+
* @note This function is called from startup code. Applications do not need
83+
* to call this function before using other esp_timer APIs.
84+
*
85+
* This function can be called very early in startup process, after this call
86+
* only esp_timer_get_time function can be used.
87+
*
88+
* @return
89+
* - ESP_OK on success
90+
*/
91+
esp_err_t esp_timer_early_init(void);
92+
8693
/**
8794
* @brief Initialize esp_timer library
8895
*
8996
* @note This function is called from startup code. Applications do not need
9097
* to call this function before using other esp_timer APIs.
98+
* Before calling this function, esp_timer_early_init must be called by the
99+
* startup code.
91100
*
92101
* @return
93102
* - ESP_OK on success

Diff for: ‎tools/sdk/esp32/include/freertos/port/xtensa/include/freertos/portmacro.h

+31-14
Original file line numberDiff line numberDiff line change
@@ -155,15 +155,20 @@ void vPortAssertIfInISR(void);
155155
BaseType_t xPortInterruptedFromISRContext(void);
156156

157157
/**
158-
* @brief Disable interrupts in a nested manner
158+
* @brief Disable interrupts in a nested manner (meant to be called from ISRs)
159159
*
160-
* - Cleaner solution allows nested interrupts disabling and restoring via local registers or stack.
161-
* - They can be called from interrupts too.
162-
* - WARNING Only applies to current CPU.
163-
* @note [refactor-todo] Define this as portSET_INTERRUPT_MASK_FROM_ISR() instead
164-
* @return unsigned Previous interrupt state
160+
* @warning Only applies to current CPU.
161+
* @return UBaseType_t Previous interrupt level
165162
*/
166-
static inline unsigned __attribute__((always_inline)) portENTER_CRITICAL_NESTED(void);
163+
static inline UBaseType_t xPortSetInterruptMaskFromISR(void);
164+
165+
/**
166+
* @brief Reenable interrupts in a nested manner (meant to be called from ISRs)
167+
*
168+
* @warning Only applies to current CPU.
169+
* @param prev_level Previous interrupt level
170+
*/
171+
static inline void vPortClearInterruptMaskFromISR(UBaseType_t prev_level);
167172

168173
/* ---------------------- Spinlocks ------------------------
169174
* - Modifications made to critical sections to support SMP
@@ -416,8 +421,6 @@ static inline BaseType_t IRAM_ATTR xPortGetCoreID(void);
416421

417422
// --------------------- Interrupts ------------------------
418423

419-
#define portEXIT_CRITICAL_NESTED(state) do { portbenchmarkINTERRUPT_RESTORE(state); XTOS_RESTORE_JUST_INTLEVEL(state); } while (0)
420-
421424
/**
422425
* - Only applies to current core
423426
* - These cannot be nested. They should be used with a lot of care and cannot be called from interrupt level.
@@ -430,8 +433,8 @@ static inline BaseType_t IRAM_ATTR xPortGetCoreID(void);
430433
/**
431434
* ISR versions to enable/disable interrupts
432435
*/
433-
#define portSET_INTERRUPT_MASK_FROM_ISR() portENTER_CRITICAL_NESTED()
434-
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(state) portEXIT_CRITICAL_NESTED(state)
436+
#define portSET_INTERRUPT_MASK_FROM_ISR() xPortSetInterruptMaskFromISR()
437+
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(prev_level) vPortClearInterruptMaskFromISR(prev_level)
435438

436439
#define portASSERT_IF_IN_ISR() vPortAssertIfInISR()
437440

@@ -530,11 +533,17 @@ static inline BaseType_t IRAM_ATTR xPortGetCoreID(void);
530533

531534
// --------------------- Interrupts ------------------------
532535

533-
static inline unsigned portENTER_CRITICAL_NESTED(void)
536+
static inline UBaseType_t xPortSetInterruptMaskFromISR(void)
534537
{
535-
unsigned state = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL);
538+
UBaseType_t prev_int_level = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL);
536539
portbenchmarkINTERRUPT_DISABLE();
537-
return state;
540+
return prev_int_level;
541+
}
542+
543+
static inline void vPortClearInterruptMaskFromISR(UBaseType_t prev_level)
544+
{
545+
portbenchmarkINTERRUPT_RESTORE(prev_level);
546+
XTOS_RESTORE_JUST_INTLEVEL(prev_level);
538547
}
539548

540549
// ---------------------- Spinlocks ------------------------
@@ -737,6 +746,14 @@ bool xPortcheckValidStackMem(const void *ptr);
737746
#define portVALID_TCB_MEM(ptr) xPortCheckValidTCBMem(ptr)
738747
#define portVALID_STACK_MEM(ptr) xPortcheckValidStackMem(ptr)
739748

749+
750+
751+
/* ---------------------------------------------------- Deprecate ------------------------------------------------------
752+
* - Pull in header containing deprecated macros here
753+
* ------------------------------------------------------------------------------------------------------------------ */
754+
755+
#include "portmacro_deprecated.h"
756+
740757
#ifdef __cplusplus
741758
}
742759
#endif

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