@@ -139,28 +139,6 @@ static raw_ostream &operator<<(raw_ostream &OS, const OperandInfo &OI) {
139
139
140
140
namespace llvm {
141
141
namespace RISCVVType {
142
- // / Return the RISCVII::VLMUL that is two times VLMul.
143
- // / Precondition: VLMul is not LMUL_RESERVED or LMUL_8.
144
- static RISCVII::VLMUL twoTimesVLMUL (RISCVII::VLMUL VLMul) {
145
- switch (VLMul) {
146
- case RISCVII::VLMUL::LMUL_F8:
147
- return RISCVII::VLMUL::LMUL_F4;
148
- case RISCVII::VLMUL::LMUL_F4:
149
- return RISCVII::VLMUL::LMUL_F2;
150
- case RISCVII::VLMUL::LMUL_F2:
151
- return RISCVII::VLMUL::LMUL_1;
152
- case RISCVII::VLMUL::LMUL_1:
153
- return RISCVII::VLMUL::LMUL_2;
154
- case RISCVII::VLMUL::LMUL_2:
155
- return RISCVII::VLMUL::LMUL_4;
156
- case RISCVII::VLMUL::LMUL_4:
157
- return RISCVII::VLMUL::LMUL_8;
158
- case RISCVII::VLMUL::LMUL_8:
159
- default :
160
- llvm_unreachable (" Could not multiply VLMul by 2" );
161
- }
162
- }
163
-
164
142
// / Return EMUL = (EEW / SEW) * LMUL where EEW comes from Log2EEW and LMUL and
165
143
// / SEW are from the TSFlags of MI.
166
144
static std::pair<unsigned , bool >
@@ -577,9 +555,8 @@ static OperandInfo getOperandInfo(const MachineOperand &MO,
577
555
case RISCV::VFWCVT_F_X_V:
578
556
case RISCV::VFWCVT_F_F_V: {
579
557
unsigned Log2EEW = IsMODef ? MILog2SEW + 1 : MILog2SEW;
580
- RISCVII::VLMUL EMUL =
581
- IsMODef ? RISCVVType::twoTimesVLMUL (MIVLMul) : MIVLMul;
582
- return OperandInfo (EMUL, Log2EEW);
558
+ return OperandInfo (RISCVVType::getEMULEqualsEEWDivSEWTimesLMUL (Log2EEW, MI),
559
+ Log2EEW);
583
560
}
584
561
585
562
// Def and Op1 uses EEW=2*SEW and EMUL=2*LMUL. Op2 uses EEW=SEW and EMUL=LMUL
@@ -599,9 +576,8 @@ static OperandInfo getOperandInfo(const MachineOperand &MO,
599
576
bool IsOp1 = HasPassthru ? MO.getOperandNo () == 2 : MO.getOperandNo () == 1 ;
600
577
bool TwoTimes = IsMODef || IsOp1;
601
578
unsigned Log2EEW = TwoTimes ? MILog2SEW + 1 : MILog2SEW;
602
- RISCVII::VLMUL EMUL =
603
- TwoTimes ? RISCVVType::twoTimesVLMUL (MIVLMul) : MIVLMul;
604
- return OperandInfo (EMUL, Log2EEW);
579
+ return OperandInfo (RISCVVType::getEMULEqualsEEWDivSEWTimesLMUL (Log2EEW, MI),
580
+ Log2EEW);
605
581
}
606
582
607
583
// Vector Integer Extension
@@ -644,9 +620,8 @@ static OperandInfo getOperandInfo(const MachineOperand &MO,
644
620
bool IsOp1 = HasPassthru ? MO.getOperandNo () == 2 : MO.getOperandNo () == 1 ;
645
621
bool TwoTimes = IsOp1;
646
622
unsigned Log2EEW = TwoTimes ? MILog2SEW + 1 : MILog2SEW;
647
- RISCVII::VLMUL EMUL =
648
- TwoTimes ? RISCVVType::twoTimesVLMUL (MIVLMul) : MIVLMul;
649
- return OperandInfo (EMUL, Log2EEW);
623
+ return OperandInfo (RISCVVType::getEMULEqualsEEWDivSEWTimesLMUL (Log2EEW, MI),
624
+ Log2EEW);
650
625
}
651
626
652
627
// Vector Mask Instructions
0 commit comments