Skip to content

Commit 5c318aa

Browse files
authored
Merge pull request arduino#134 from beeryt/patch-1
Wiring: Clean up repeated pin description access
2 parents 1672e71 + 206a7ac commit 5c318aa

File tree

1 file changed

+14
-10
lines changed

1 file changed

+14
-10
lines changed

cores/arduino/wiring_digital.c

+14-10
Original file line numberDiff line numberDiff line change
@@ -30,39 +30,43 @@ void pinMode( uint32_t ulPin, uint32_t ulMode )
3030
return ;
3131
}
3232

33+
EPortType port = g_APinDescription[ulPin].ulPort;
34+
uint32_t pin = g_APinDescription[ulPin].ulPin;
35+
uint32_t pinMask = (1ul << pin);
36+
3337
// Set pin mode according to chapter '22.6.3 I/O Pin Configuration'
3438
switch ( ulMode )
3539
{
3640
case INPUT:
3741
// Set pin to input mode
38-
PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg=(uint8_t)(PORT_PINCFG_INEN) ;
39-
PORT->Group[g_APinDescription[ulPin].ulPort].DIRCLR.reg = (uint32_t)(1<<g_APinDescription[ulPin].ulPin) ;
42+
PORT->Group[port].PINCFG[pin].reg=(uint8_t)(PORT_PINCFG_INEN) ;
43+
PORT->Group[port].DIRCLR.reg = pinMask ;
4044
break ;
4145

4246
case INPUT_PULLUP:
4347
// Set pin to input mode with pull-up resistor enabled
44-
PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg=(uint8_t)(PORT_PINCFG_INEN|PORT_PINCFG_PULLEN) ;
45-
PORT->Group[g_APinDescription[ulPin].ulPort].DIRCLR.reg = (uint32_t)(1<<g_APinDescription[ulPin].ulPin) ;
48+
PORT->Group[port].PINCFG[pin].reg=(uint8_t)(PORT_PINCFG_INEN|PORT_PINCFG_PULLEN) ;
49+
PORT->Group[port].DIRCLR.reg = pinMask ;
4650

4751
// Enable pull level (cf '22.6.3.2 Input Configuration' and '22.8.7 Data Output Value Set')
48-
PORT->Group[g_APinDescription[ulPin].ulPort].OUTSET.reg = (uint32_t)(1<<g_APinDescription[ulPin].ulPin) ;
52+
PORT->Group[port].OUTSET.reg = pinMask ;
4953
break ;
5054

5155
case INPUT_PULLDOWN:
5256
// Set pin to input mode with pull-down resistor enabled
53-
PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg=(uint8_t)(PORT_PINCFG_INEN|PORT_PINCFG_PULLEN) ;
54-
PORT->Group[g_APinDescription[ulPin].ulPort].DIRCLR.reg = (uint32_t)(1<<g_APinDescription[ulPin].ulPin) ;
57+
PORT->Group[port].PINCFG[pin].reg=(uint8_t)(PORT_PINCFG_INEN|PORT_PINCFG_PULLEN) ;
58+
PORT->Group[port].DIRCLR.reg = pinMask ;
5559

5660
// Enable pull level (cf '22.6.3.2 Input Configuration' and '22.8.6 Data Output Value Clear')
57-
PORT->Group[g_APinDescription[ulPin].ulPort].OUTCLR.reg = (uint32_t)(1<<g_APinDescription[ulPin].ulPin) ;
61+
PORT->Group[port].OUTCLR.reg = pinMask ;
5862
break ;
5963

6064
case OUTPUT:
6165
// enable input, to support reading back values, with pullups disabled
62-
PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg=(uint8_t)(PORT_PINCFG_INEN) ;
66+
PORT->Group[port].PINCFG[pin].reg=(uint8_t)(PORT_PINCFG_INEN) ;
6367

6468
// Set pin to output mode
65-
PORT->Group[g_APinDescription[ulPin].ulPort].DIRSET.reg = (uint32_t)(1<<g_APinDescription[ulPin].ulPin) ;
69+
PORT->Group[port].DIRSET.reg = pinMask ;
6670
break ;
6771

6872
default:

0 commit comments

Comments
 (0)