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target/105753: Fix ICE in add_clobbers due to extra PARALLEL in insn.
This patch removes the superfluous parallel in [u]divmod patterns in the AVR backend. Effect of extra parallel is that add_clobbers reaches gcc_unreachable() because the clobbers for [u]divmod are missing. If an insn has multiple parts like clobbers, the parallel around the parts of the insn pattern is implicit. gcc/ PR target/105753 * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi): Remove superfluous "parallel" in insn pattern. ([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of printing error text to assembly. gcc/testsuite/ PR target/105753 * gcc.target/avr/torture/pr105753.c: New test.
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2 files changed

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‎gcc/config/avr/avr.md

+64-62
Original file line numberDiff line numberDiff line change
@@ -3705,17 +3705,17 @@
37053705
;; CSE has problems to operate on hard regs.
37063706
;;
37073707
(define_insn_and_split "divmodqi4"
3708-
[(set (match_operand:QI 0 "pseudo_register_operand" "")
3709-
(div:QI (match_operand:QI 1 "pseudo_register_operand" "")
3710-
(match_operand:QI 2 "pseudo_register_operand" "")))
3711-
(set (match_operand:QI 3 "pseudo_register_operand" "")
3708+
[(set (match_operand:QI 0 "pseudo_register_operand")
3709+
(div:QI (match_operand:QI 1 "pseudo_register_operand")
3710+
(match_operand:QI 2 "pseudo_register_operand")))
3711+
(set (match_operand:QI 3 "pseudo_register_operand")
37123712
(mod:QI (match_dup 1) (match_dup 2)))
37133713
(clobber (reg:QI 22))
37143714
(clobber (reg:QI 23))
37153715
(clobber (reg:QI 24))
37163716
(clobber (reg:QI 25))]
37173717
""
3718-
"this divmodqi4 pattern should have been splitted;"
3718+
{ gcc_unreachable(); }
37193719
""
37203720
[(set (reg:QI 24) (match_dup 1))
37213721
(set (reg:QI 22) (match_dup 2))
@@ -3751,17 +3751,17 @@
37513751
[(set_attr "type" "xcall")])
37523752

37533753
(define_insn_and_split "udivmodqi4"
3754-
[(set (match_operand:QI 0 "pseudo_register_operand" "")
3755-
(udiv:QI (match_operand:QI 1 "pseudo_register_operand" "")
3756-
(match_operand:QI 2 "pseudo_register_operand" "")))
3757-
(set (match_operand:QI 3 "pseudo_register_operand" "")
3758-
(umod:QI (match_dup 1) (match_dup 2)))
3759-
(clobber (reg:QI 22))
3760-
(clobber (reg:QI 23))
3761-
(clobber (reg:QI 24))
3762-
(clobber (reg:QI 25))]
3763-
""
3764-
"this udivmodqi4 pattern should have been splitted;"
3754+
[(set (match_operand:QI 0 "pseudo_register_operand")
3755+
(udiv:QI (match_operand:QI 1 "pseudo_register_operand")
3756+
(match_operand:QI 2 "pseudo_register_operand")))
3757+
(set (match_operand:QI 3 "pseudo_register_operand")
3758+
(umod:QI (match_dup 1) (match_dup 2)))
3759+
(clobber (reg:QI 22))
3760+
(clobber (reg:QI 23))
3761+
(clobber (reg:QI 24))
3762+
(clobber (reg:QI 25))]
3763+
""
3764+
{ gcc_unreachable(); }
37653765
""
37663766
[(set (reg:QI 24) (match_dup 1))
37673767
(set (reg:QI 22) (match_dup 2))
@@ -3793,17 +3793,17 @@
37933793
[(set_attr "type" "xcall")])
37943794

37953795
(define_insn_and_split "divmodhi4"
3796-
[(set (match_operand:HI 0 "pseudo_register_operand" "")
3797-
(div:HI (match_operand:HI 1 "pseudo_register_operand" "")
3798-
(match_operand:HI 2 "pseudo_register_operand" "")))
3799-
(set (match_operand:HI 3 "pseudo_register_operand" "")
3796+
[(set (match_operand:HI 0 "pseudo_register_operand")
3797+
(div:HI (match_operand:HI 1 "pseudo_register_operand")
3798+
(match_operand:HI 2 "pseudo_register_operand")))
3799+
(set (match_operand:HI 3 "pseudo_register_operand")
38003800
(mod:HI (match_dup 1) (match_dup 2)))
38013801
(clobber (reg:QI 21))
38023802
(clobber (reg:HI 22))
38033803
(clobber (reg:HI 24))
38043804
(clobber (reg:HI 26))]
38053805
""
3806-
"this should have been splitted;"
3806+
{ gcc_unreachable(); }
38073807
""
38083808
[(set (reg:HI 24) (match_dup 1))
38093809
(set (reg:HI 22) (match_dup 2))
@@ -3839,17 +3839,17 @@
38393839
[(set_attr "type" "xcall")])
38403840

38413841
(define_insn_and_split "udivmodhi4"
3842-
[(set (match_operand:HI 0 "pseudo_register_operand" "")
3843-
(udiv:HI (match_operand:HI 1 "pseudo_register_operand" "")
3844-
(match_operand:HI 2 "pseudo_register_operand" "")))
3845-
(set (match_operand:HI 3 "pseudo_register_operand" "")
3842+
[(set (match_operand:HI 0 "pseudo_register_operand")
3843+
(udiv:HI (match_operand:HI 1 "pseudo_register_operand")
3844+
(match_operand:HI 2 "pseudo_register_operand")))
3845+
(set (match_operand:HI 3 "pseudo_register_operand")
38463846
(umod:HI (match_dup 1) (match_dup 2)))
38473847
(clobber (reg:QI 21))
38483848
(clobber (reg:HI 22))
38493849
(clobber (reg:HI 24))
38503850
(clobber (reg:HI 26))]
38513851
""
3852-
"this udivmodhi4 pattern should have been splitted.;"
3852+
{ gcc_unreachable(); }
38533853
""
38543854
[(set (reg:HI 24) (match_dup 1))
38553855
(set (reg:HI 22) (match_dup 2))
@@ -4090,14 +4090,14 @@
40904090
;; implementation works the other way round.
40914091

40924092
(define_insn_and_split "divmodpsi4"
4093-
[(parallel [(set (match_operand:PSI 0 "pseudo_register_operand" "")
4094-
(div:PSI (match_operand:PSI 1 "pseudo_register_operand" "")
4095-
(match_operand:PSI 2 "pseudo_register_operand" "")))
4096-
(set (match_operand:PSI 3 "pseudo_register_operand" "")
4097-
(mod:PSI (match_dup 1)
4098-
(match_dup 2)))
4099-
(clobber (reg:DI 18))
4100-
(clobber (reg:QI 26))])]
4093+
[(set (match_operand:PSI 0 "pseudo_register_operand")
4094+
(div:PSI (match_operand:PSI 1 "pseudo_register_operand")
4095+
(match_operand:PSI 2 "pseudo_register_operand")))
4096+
(set (match_operand:PSI 3 "pseudo_register_operand")
4097+
(mod:PSI (match_dup 1)
4098+
(match_dup 2)))
4099+
(clobber (reg:DI 18))
4100+
(clobber (reg:QI 26))]
41014101
""
41024102
{ gcc_unreachable(); }
41034103
""
@@ -4139,14 +4139,14 @@
41394139
[(set_attr "type" "xcall")])
41404140

41414141
(define_insn_and_split "udivmodpsi4"
4142-
[(parallel [(set (match_operand:PSI 0 "pseudo_register_operand" "")
4143-
(udiv:PSI (match_operand:PSI 1 "pseudo_register_operand" "")
4144-
(match_operand:PSI 2 "pseudo_register_operand" "")))
4145-
(set (match_operand:PSI 3 "pseudo_register_operand" "")
4146-
(umod:PSI (match_dup 1)
4147-
(match_dup 2)))
4148-
(clobber (reg:DI 18))
4149-
(clobber (reg:QI 26))])]
4142+
[(set (match_operand:PSI 0 "pseudo_register_operand")
4143+
(udiv:PSI (match_operand:PSI 1 "pseudo_register_operand")
4144+
(match_operand:PSI 2 "pseudo_register_operand")))
4145+
(set (match_operand:PSI 3 "pseudo_register_operand")
4146+
(umod:PSI (match_dup 1)
4147+
(match_dup 2)))
4148+
(clobber (reg:DI 18))
4149+
(clobber (reg:QI 26))]
41504150
""
41514151
{ gcc_unreachable(); }
41524152
""
@@ -4190,17 +4190,18 @@
41904190
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
41914191

41924192
(define_insn_and_split "divmodsi4"
4193-
[(parallel [(set (match_operand:SI 0 "pseudo_register_operand" "")
4194-
(div:SI (match_operand:SI 1 "pseudo_register_operand" "")
4195-
(match_operand:SI 2 "pseudo_register_operand" "")))
4196-
(set (match_operand:SI 3 "pseudo_register_operand" "")
4197-
(mod:SI (match_dup 1) (match_dup 2)))
4198-
(clobber (reg:SI 18))
4199-
(clobber (reg:SI 22))
4200-
(clobber (reg:HI 26))
4201-
(clobber (reg:HI 30))])]
4193+
[(set (match_operand:SI 0 "pseudo_register_operand")
4194+
(div:SI (match_operand:SI 1 "pseudo_register_operand")
4195+
(match_operand:SI 2 "pseudo_register_operand")))
4196+
(set (match_operand:SI 3 "pseudo_register_operand")
4197+
(mod:SI (match_dup 1)
4198+
(match_dup 2)))
4199+
(clobber (reg:SI 18))
4200+
(clobber (reg:SI 22))
4201+
(clobber (reg:HI 26))
4202+
(clobber (reg:HI 30))]
42024203
""
4203-
"this divmodsi4 pattern should have been splitted;"
4204+
{ gcc_unreachable(); }
42044205
""
42054206
[(set (reg:SI 22) (match_dup 1))
42064207
(set (reg:SI 18) (match_dup 2))
@@ -4236,17 +4237,18 @@
42364237
[(set_attr "type" "xcall")])
42374238

42384239
(define_insn_and_split "udivmodsi4"
4239-
[(parallel [(set (match_operand:SI 0 "pseudo_register_operand" "")
4240-
(udiv:SI (match_operand:SI 1 "pseudo_register_operand" "")
4241-
(match_operand:SI 2 "pseudo_register_operand" "")))
4242-
(set (match_operand:SI 3 "pseudo_register_operand" "")
4243-
(umod:SI (match_dup 1) (match_dup 2)))
4244-
(clobber (reg:SI 18))
4245-
(clobber (reg:SI 22))
4246-
(clobber (reg:HI 26))
4247-
(clobber (reg:HI 30))])]
4240+
[(set (match_operand:SI 0 "pseudo_register_operand")
4241+
(udiv:SI (match_operand:SI 1 "pseudo_register_operand")
4242+
(match_operand:SI 2 "pseudo_register_operand")))
4243+
(set (match_operand:SI 3 "pseudo_register_operand")
4244+
(umod:SI (match_dup 1)
4245+
(match_dup 2)))
4246+
(clobber (reg:SI 18))
4247+
(clobber (reg:SI 22))
4248+
(clobber (reg:HI 26))
4249+
(clobber (reg:HI 30))]
42484250
""
4249-
"this udivmodsi4 pattern should have been splitted;"
4251+
{ gcc_unreachable(); }
42504252
""
42514253
[(set (reg:SI 22) (match_dup 1))
42524254
(set (reg:SI 18) (match_dup 2))

‎gcc/testsuite/gcc.target/avr/torture/pr105753.c

+13
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,13 @@
1+
int digit_sum (unsigned long n)
2+
{
3+
int sum = 0;
4+
5+
do
6+
{
7+
int x = n % 10;
8+
n /= 10;
9+
sum += x;
10+
} while(n);
11+
12+
return sum;
13+
}

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