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system(F4) update STM32F4xx HAL Drivers to v1.8.2
Included in STM32CubeF4 FW v1.28.0 Signed-off-by: Frederic Pillon <[email protected]>
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Diff for: ‎system/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h

+378-58
Large diffs are not rendered by default.

Diff for: ‎system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h

+29-29
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,7 @@
2121
#define __STM32F4xx_ADC_H
2222

2323
#ifdef __cplusplus
24-
extern "C" {
24+
extern "C" {
2525
#endif
2626

2727
/* Includes ------------------------------------------------------------------*/
@@ -101,11 +101,11 @@ typedef struct
101101
If trigger is set to ADC_SOFTWARE_START, this parameter is discarded.
102102
This parameter can be a value of @ref ADC_External_trigger_edge_Regular */
103103
FunctionalState DMAContinuousRequests; /*!< Specifies whether the DMA requests are performed in one shot mode (DMA transfer stop when number of conversions is reached)
104-
or in Continuous mode (DMA transfer unlimited, whatever number of conversions).
105-
Note: In continuous mode, DMA must be configured in circular mode. Otherwise an overrun will be triggered when DMA buffer maximum pointer is reached.
106-
Note: This parameter must be modified when no conversion is on going on both regular and injected groups (ADC disabled, or ADC enabled without continuous mode or external trigger that could launch a conversion).
107-
This parameter can be set to ENABLE or DISABLE. */
108-
}ADC_InitTypeDef;
104+
or in Continuous mode (DMA transfer unlimited, whatever number of conversions).
105+
Note: In continuous mode, DMA must be configured in circular mode. Otherwise an overrun will be triggered when DMA buffer maximum pointer is reached.
106+
Note: This parameter must be modified when no conversion is on going on both regular and injected groups (ADC disabled, or ADC enabled without continuous mode or external trigger that could launch a conversion).
107+
This parameter can be set to ENABLE or DISABLE. */
108+
} ADC_InitTypeDef;
109109

110110

111111

@@ -130,7 +130,7 @@ typedef struct
130130
sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
131131
Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 4us min). */
132132
uint32_t Offset; /*!< Reserved for future use, can be set to 0 */
133-
}ADC_ChannelConfTypeDef;
133+
} ADC_ChannelConfTypeDef;
134134

135135
/**
136136
* @brief ADC Configuration multi-mode structure definition
@@ -150,7 +150,7 @@ typedef struct
150150
is interrupt mode or in polling mode.
151151
This parameter can be set to ENABLE or DISABLE */
152152
uint32_t WatchdogNumber; /*!< Reserved for future use, can be set to 0 */
153-
}ADC_AnalogWDGConfTypeDef;
153+
} ADC_AnalogWDGConfTypeDef;
154154

155155
/**
156156
* @brief HAL ADC state machine: ADC states definition (bitfields)
@@ -217,7 +217,7 @@ typedef struct
217217
void (* MspInitCallback)(struct __ADC_HandleTypeDef *hadc); /*!< ADC Msp Init callback */
218218
void (* MspDeInitCallback)(struct __ADC_HandleTypeDef *hadc); /*!< ADC Msp DeInit callback */
219219
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
220-
}ADC_HandleTypeDef;
220+
} ADC_HandleTypeDef;
221221

222222
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
223223
/**
@@ -401,7 +401,7 @@ typedef void (*pADC_CallbackTypeDef)(ADC_HandleTypeDef *hadc); /*!< pointer to
401401
* @}
402402
*/
403403

404-
/** @defgroup ADC_EOCSelection ADC EOC Selection
404+
/** @defgroup ADC_EOCSelection ADC EOC Selection
405405
* @{
406406
*/
407407
#define ADC_EOC_SEQ_CONV 0x00000000U
@@ -562,10 +562,10 @@ typedef void (*pADC_CallbackTypeDef)(ADC_HandleTypeDef *hadc); /*!< pointer to
562562
* @{
563563
*/
564564
/* Initialization/de-initialization functions ***********************************/
565-
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc);
565+
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef *hadc);
566566
HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc);
567-
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc);
568-
void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc);
567+
void HAL_ADC_MspInit(ADC_HandleTypeDef *hadc);
568+
void HAL_ADC_MspDeInit(ADC_HandleTypeDef *hadc);
569569

570570
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
571571
/* Callbacks Register/UnRegister functions ***********************************/
@@ -580,25 +580,25 @@ HAL_StatusTypeDef HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_Ca
580580
* @{
581581
*/
582582
/* I/O operation functions ******************************************************/
583-
HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc);
584-
HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc);
585-
HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
583+
HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef *hadc);
584+
HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef *hadc);
585+
HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef *hadc, uint32_t Timeout);
586586

587-
HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout);
587+
HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef *hadc, uint32_t EventType, uint32_t Timeout);
588588

589-
HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc);
590-
HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc);
589+
HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef *hadc);
590+
HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef *hadc);
591591

592-
void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc);
592+
void HAL_ADC_IRQHandler(ADC_HandleTypeDef *hadc);
593593

594-
HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
595-
HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc);
594+
HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length);
595+
HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef *hadc);
596596

597-
uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc);
597+
uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef *hadc);
598598

599-
void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc);
600-
void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc);
601-
void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc);
599+
void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc);
600+
void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef *hadc);
601+
void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef *hadc);
602602
void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc);
603603
/**
604604
* @}
@@ -608,8 +608,8 @@ void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc);
608608
* @{
609609
*/
610610
/* Peripheral Control functions *************************************************/
611-
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig);
612-
HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig);
611+
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef *hadc, ADC_ChannelConfTypeDef *sConfig);
612+
HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef *hadc, ADC_AnalogWDGConfTypeDef *AnalogWDGConfig);
613613
/**
614614
* @}
615615
*/
@@ -618,7 +618,7 @@ HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDG
618618
* @{
619619
*/
620620
/* Peripheral State functions ***************************************************/
621-
uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc);
621+
uint32_t HAL_ADC_GetState(ADC_HandleTypeDef *hadc);
622622
uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
623623
/**
624624
* @}

Diff for: ‎system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h

+15-15
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,7 @@
2121
#define __STM32F4xx_ADC_EX_H
2222

2323
#ifdef __cplusplus
24-
extern "C" {
24+
extern "C" {
2525
#endif
2626

2727
/* Includes ------------------------------------------------------------------*/
@@ -106,7 +106,7 @@ typedef struct
106106
If trigger is set to ADC_INJECTED_SOFTWARE_START, this parameter is discarded.
107107
Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
108108
configure a channel on injected group can impact the configuration of other channels previously set. */
109-
}ADC_InjectionConfTypeDef;
109+
} ADC_InjectionConfTypeDef;
110110

111111
/**
112112
* @brief ADC Configuration multi-mode structure definition
@@ -119,7 +119,7 @@ typedef struct
119119
This parameter can be a value of @ref ADCEx_Direct_memory_access_mode_for_multi_mode */
120120
uint32_t TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases.
121121
This parameter can be a value of @ref ADC_delay_between_2_sampling_phases */
122-
}ADC_MultiModeTypeDef;
122+
} ADC_MultiModeTypeDef;
123123

124124
/**
125125
* @}
@@ -264,20 +264,20 @@ typedef struct
264264
*/
265265

266266
/* I/O operation functions ******************************************************/
267-
HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
268-
HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
269-
HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
270-
HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
271-
HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
272-
uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
273-
HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
274-
HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc);
275-
uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc);
276-
void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
267+
HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef *hadc);
268+
HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef *hadc);
269+
HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef *hadc, uint32_t Timeout);
270+
HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef *hadc);
271+
HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef *hadc);
272+
uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef *hadc, uint32_t InjectedRank);
273+
HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length);
274+
HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc);
275+
uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc);
276+
void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef *hadc);
277277

278278
/* Peripheral Control functions *************************************************/
279-
HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
280-
HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode);
279+
HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef *hadc, ADC_InjectionConfTypeDef *sConfigInjected);
280+
HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode);
281281

282282
/**
283283
* @}

Diff for: ‎system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_can.h

+33-20
Original file line numberDiff line numberDiff line change
@@ -102,21 +102,25 @@ typedef struct
102102
{
103103
uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit
104104
configuration, first one for a 16-bit configuration).
105-
This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
105+
This parameter must be a number between
106+
Min_Data = 0x0000 and Max_Data = 0xFFFF. */
106107

107108
uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit
108109
configuration, second one for a 16-bit configuration).
109-
This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
110+
This parameter must be a number between
111+
Min_Data = 0x0000 and Max_Data = 0xFFFF. */
110112

111113
uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number,
112114
according to the mode (MSBs for a 32-bit configuration,
113115
first one for a 16-bit configuration).
114-
This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
116+
This parameter must be a number between
117+
Min_Data = 0x0000 and Max_Data = 0xFFFF. */
115118

116119
uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number,
117120
according to the mode (LSBs for a 32-bit configuration,
118121
second one for a 16-bit configuration).
119-
This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
122+
This parameter must be a number between
123+
Min_Data = 0x0000 and Max_Data = 0xFFFF. */
120124

121125
uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1U) which will be assigned to the filter.
122126
This parameter can be a value of @ref CAN_filter_FIFO */
@@ -205,7 +209,11 @@ typedef struct
205209
/**
206210
* @brief CAN handle Structure definition
207211
*/
212+
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
208213
typedef struct __CAN_HandleTypeDef
214+
#else
215+
typedef struct
216+
#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
209217
{
210218
CAN_TypeDef *Instance; /*!< Register base address */
211219

@@ -294,11 +302,11 @@ typedef void (*pCAN_CallbackTypeDef)(CAN_HandleTypeDef *hcan); /*!< pointer to
294302
#define HAL_CAN_ERROR_RX_FOV0 (0x00000200U) /*!< Rx FIFO0 overrun error */
295303
#define HAL_CAN_ERROR_RX_FOV1 (0x00000400U) /*!< Rx FIFO1 overrun error */
296304
#define HAL_CAN_ERROR_TX_ALST0 (0x00000800U) /*!< TxMailbox 0 transmit failure due to arbitration lost */
297-
#define HAL_CAN_ERROR_TX_TERR0 (0x00001000U) /*!< TxMailbox 0 transmit failure due to transmit error */
305+
#define HAL_CAN_ERROR_TX_TERR0 (0x00001000U) /*!< TxMailbox 0 transmit failure due to transmit error */
298306
#define HAL_CAN_ERROR_TX_ALST1 (0x00002000U) /*!< TxMailbox 1 transmit failure due to arbitration lost */
299-
#define HAL_CAN_ERROR_TX_TERR1 (0x00004000U) /*!< TxMailbox 1 transmit failure due to transmit error */
307+
#define HAL_CAN_ERROR_TX_TERR1 (0x00004000U) /*!< TxMailbox 1 transmit failure due to transmit error */
300308
#define HAL_CAN_ERROR_TX_ALST2 (0x00008000U) /*!< TxMailbox 2 transmit failure due to arbitration lost */
301-
#define HAL_CAN_ERROR_TX_TERR2 (0x00010000U) /*!< TxMailbox 2 transmit failure due to transmit error */
309+
#define HAL_CAN_ERROR_TX_TERR2 (0x00010000U) /*!< TxMailbox 2 transmit failure due to transmit error */
302310
#define HAL_CAN_ERROR_TIMEOUT (0x00020000U) /*!< Timeout error */
303311
#define HAL_CAN_ERROR_NOT_INITIALIZED (0x00040000U) /*!< Peripheral not initialized */
304312
#define HAL_CAN_ERROR_NOT_READY (0x00080000U) /*!< Peripheral not ready */
@@ -329,7 +337,8 @@ typedef void (*pCAN_CallbackTypeDef)(CAN_HandleTypeDef *hcan); /*!< pointer to
329337
#define CAN_MODE_NORMAL (0x00000000U) /*!< Normal mode */
330338
#define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */
331339
#define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */
332-
#define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */
340+
#define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with
341+
silent mode */
333342
/**
334343
* @}
335344
*/
@@ -644,7 +653,8 @@ void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan);
644653

645654
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
646655
/* Callbacks Register/UnRegister functions ***********************************/
647-
HAL_StatusTypeDef HAL_CAN_RegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID, void (* pCallback)(CAN_HandleTypeDef *_hcan));
656+
HAL_StatusTypeDef HAL_CAN_RegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID,
657+
void (* pCallback)(CAN_HandleTypeDef *_hcan));
648658
HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID);
649659

650660
#endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */
@@ -658,7 +668,7 @@ HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_Ca
658668
*/
659669

660670
/* Configuration functions ****************************************************/
661-
HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, CAN_FilterTypeDef *sFilterConfig);
671+
HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_FilterTypeDef *sFilterConfig);
662672

663673
/**
664674
* @}
@@ -674,14 +684,16 @@ HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan);
674684
HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan);
675685
HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan);
676686
HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
677-
uint32_t HAL_CAN_IsSleepActive(CAN_HandleTypeDef *hcan);
678-
HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, CAN_TxHeaderTypeDef *pHeader, uint8_t aData[], uint32_t *pTxMailbox);
687+
uint32_t HAL_CAN_IsSleepActive(const CAN_HandleTypeDef *hcan);
688+
HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, const CAN_TxHeaderTypeDef *pHeader,
689+
const uint8_t aData[], uint32_t *pTxMailbox);
679690
HAL_StatusTypeDef HAL_CAN_AbortTxRequest(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes);
680-
uint32_t HAL_CAN_GetTxMailboxesFreeLevel(CAN_HandleTypeDef *hcan);
681-
uint32_t HAL_CAN_IsTxMessagePending(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes);
682-
uint32_t HAL_CAN_GetTxTimestamp(CAN_HandleTypeDef *hcan, uint32_t TxMailbox);
683-
HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]);
684-
uint32_t HAL_CAN_GetRxFifoFillLevel(CAN_HandleTypeDef *hcan, uint32_t RxFifo);
691+
uint32_t HAL_CAN_GetTxMailboxesFreeLevel(const CAN_HandleTypeDef *hcan);
692+
uint32_t HAL_CAN_IsTxMessagePending(const CAN_HandleTypeDef *hcan, uint32_t TxMailboxes);
693+
uint32_t HAL_CAN_GetTxTimestamp(const CAN_HandleTypeDef *hcan, uint32_t TxMailbox);
694+
HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo,
695+
CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]);
696+
uint32_t HAL_CAN_GetRxFifoFillLevel(const CAN_HandleTypeDef *hcan, uint32_t RxFifo);
685697

686698
/**
687699
* @}
@@ -729,8 +741,8 @@ void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
729741
* @{
730742
*/
731743
/* Peripheral State and Error functions ***************************************/
732-
HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef *hcan);
733-
uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
744+
HAL_CAN_StateTypeDef HAL_CAN_GetState(const CAN_HandleTypeDef *hcan);
745+
uint32_t HAL_CAN_GetError(const CAN_HandleTypeDef *hcan);
734746
HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan);
735747

736748
/**
@@ -806,7 +818,8 @@ HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan);
806818
#define IS_CAN_TX_MAILBOX(TRANSMITMAILBOX) (((TRANSMITMAILBOX) == CAN_TX_MAILBOX0 ) || \
807819
((TRANSMITMAILBOX) == CAN_TX_MAILBOX1 ) || \
808820
((TRANSMITMAILBOX) == CAN_TX_MAILBOX2 ))
809-
#define IS_CAN_TX_MAILBOX_LIST(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= (CAN_TX_MAILBOX0 | CAN_TX_MAILBOX1 | CAN_TX_MAILBOX2))
821+
#define IS_CAN_TX_MAILBOX_LIST(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= (CAN_TX_MAILBOX0 | CAN_TX_MAILBOX1 | \
822+
CAN_TX_MAILBOX2))
810823
#define IS_CAN_STDID(STDID) ((STDID) <= 0x7FFU)
811824
#define IS_CAN_EXTID(EXTID) ((EXTID) <= 0x1FFFFFFFU)
812825
#define IS_CAN_DLC(DLC) ((DLC) <= 8U)

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